KR20070113864A - Liquid crystal display panel and method of manufacturing the same - Google Patents

Abstract

An LCD(Liquid Crystal Display) panel and a method for manufacturing the same are provided to solve a problem that liquid crystals are not moved according as transmittance is deteriorated by a vertical electric field partially formed between a common electrode and a pixel electrode. An LCD panel includes a first insulating substrate(111), a common electrode, an insulating layer(131), a pixel electrode, a liquid crystal layer and a second insulating substrate. The common electrode is formed on the first insulating substrate and includes a pair of sub common electrodes(182) having a section part between the sub common electrodes. The insulating layer is formed on the common electrodes. The pixel electrode is formed on the insulating layer and includes a sub pixel electrode(162) positioned between the pair of sub common electrodes by being spaced from the pair of sub common electrodes. The liquid crystal layer is formed on the pixel electrode. The second insulating plate is opposite to the first insulating plate and has the liquid crystal layer between the first insulating plate and the second insulating plate.

Description

Liquid crystal display panel and its manufacturing method {LIQUID CRYSTAL DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME}

1 is a layout view of a liquid crystal display panel according to an exemplary embodiment of the present invention.

2 is a view for explaining a common electrode in a liquid crystal display panel according to an embodiment of the present invention;

3 is a cross-sectional view taken along line III-III of FIG. 1,

4 is an enlarged view of a portion A of FIG. 3,

5A and 5B illustrate a method of manufacturing a liquid crystal display panel according to an exemplary embodiment of the present invention.

Explanation of Signs of Major Parts of Drawings

121: gate line 122: gate electrode

123: common electrode line 131: gate insulating film

132: semiconductor layer 133: ohmic contact layer

141: data line 142: source electrode

143: drain electrode 151: protective film

160: pixel electrode 162: sub pixel electrode

180: common electrode 182: sub common electrode

The present invention relates to a liquid crystal display panel and a method of manufacturing the same.

The liquid crystal display device includes a liquid crystal display panel, and the liquid crystal display panel includes a thin film transistor substrate on which a thin film transistor is formed, a color filter substrate on which a color filter is formed, and a liquid crystal display panel on which a liquid crystal layer is positioned. . Since the liquid crystal display panel is a non-light emitting device, a backlight unit for irradiating light is disposed on the rear surface of the thin film transistor substrate. The liquid crystal display device having such a configuration is advantageous for thin, small size, and low power consumption, but has disadvantages in size, realization of full color, contrast enhancement, and viewing angle.

In order to improve the viewing angle of the LCD panel, a patterned vertically aligned (PVA) mode, an in-plane switching (IPS) mode, and a fringe-field switching (FFS) mode have been developed.

In the FFS mode, both the common electrode and the pixel electrode are formed on the thin film transistor substrate, and an image is formed by adjusting a horizontal electric field between the common electrode and the pixel electrode. However, a portion in which the movement of the liquid crystal is not controlled due to a vertical electric field partially formed between the common electrode and the pixel electrode may cause a problem in that the transmittance is lowered.

Accordingly, an object of the present invention is to provide a liquid crystal display panel having excellent viewing angle and high transmittance.

Another object of the present invention is to provide a method of manufacturing a liquid crystal display panel having excellent viewing angle and high transmittance.

The object is that the first insulating substrate; A common electrode formed on the first insulating substrate and including a pair of sub common electrodes having a cutoff portion therebetween; An insulating film formed on the common electrode; A pixel electrode formed on the insulating layer, the pixel electrode including a sub pixel electrode spaced apart from the pair of sub common electrodes and positioned between the pair of sub common electrodes; A liquid crystal layer formed on the pixel electrode; The liquid crystal display panel may include a second insulating substrate facing the first insulating substrate with the liquid crystal layer interposed therebetween.

It is preferable that the said incision part extends long and is provided in plurality.

The cutout is preferably inclined.

The common electrode and the pixel electrode are preferably made of a transparent conductive material.

Preferably, the opening, the sub common electrode, and the sub pixel electrode have a band shape, and an interval between adjacent sub pixel electrodes is about 80% to 120% of the width of the sub pixel electrode.

The width of the sub common electrode is preferably about 50% to 80% of the width of the sub pixel electrode.

The spacing between the sub common electrode and the sub pixel electrode is preferably about 0.3 μm to 1 μm.

An object of the present invention and the insulating substrate; A common electrode formed on the insulating substrate and including a plurality of sub common electrodes extending for a long time; An insulating film formed on the common electrode; It is also achieved by a liquid crystal display panel including a pixel electrode formed on the insulating film and extending for a long time and including a plurality of sub pixel electrodes that do not overlap with the plurality of sub common electrodes.

Another object of the present invention is to form a first transparent conductive layer on an insulating substrate; Forming a common electrode including a plurality of sub common electrodes extending by photolithography using a mask having a plurality of light blocking patterns extending over the first transparent conductive layer; Forming an insulating film on the common electrode; Forming a second transparent conductive layer on the insulating film; The second transparent conductive layer is formed by photolithography using the mask, and is formed by a method of manufacturing a liquid crystal display panel, the method including forming a plurality of sub-pixel electrodes that do not overlap with the plurality of sub common electrodes.

The interval between the sub common electrode and the sub pixel electrode may be adjusted by changing an exposure time for forming the common electrode.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. In the following description, a film is formed (located) on another layer, not only when two films are in contact with each other but also when another film is between two layers. It also includes the case where it exists.

1 is a layout view of a liquid crystal display panel according to an exemplary embodiment of the present invention, FIG. 2 is a diagram illustrating a common electrode in the liquid crystal display panel according to an exemplary embodiment of the present invention, and FIG. 3 is III- of FIG. 1. It is sectional drawing along III.

The liquid crystal display panel 10 according to an exemplary embodiment of the present invention includes a thin film transistor substrate 100, a color filter substrate 200 facing the thin film transistor substrate, and a liquid crystal layer 300 disposed therebetween.

First, the thin film transistor substrate 100 will be described.

The common electrode 180 is formed on the first insulating substrate 111. The common electrode 180 is separated for each pixel and each has a rectangular shape. A plurality of cutouts 181 are formed in the common electrode 180. The cutout 181 extends long, and a portion extending between the cutouts 181 forms the sub common electrode 182.

The cutout 181 is inclined with respect to the gate line 121, and has an overall symmetrical shape with respect to the common electrode line 123. The sub common electrode 182 is also inclined according to the shape of the cutout 181 and has a vertically symmetrical shape.

The sub common electrode 182 in the present invention represents a portion of the common electrode 180 positioned between the cutouts 181. The shape of the sub common electrode 182 may be extended, but is not limited thereto.

The common electrode 180 may be made of indium tin oxide (ITO) or indium zinc oxide (IZO), which are transparent conductive materials.

Gate wirings 121, 122, and 123 are formed on the first insulating substrate 111. The gate wirings 121, 122, and 123 may be a metal single layer or multiple layers. The gate wires 121, 122, and 123 are common to overlap the gate line 121 extending in the horizontal direction, the gate electrode 122 connected to the gate line 121, and the pixel electrode 160 to form a storage capacitor. The electrode line 123 is included. The common electrode line 123 contacts the common electrode 180 in the middle of the pixel to apply a common voltage to the common electrode 180.

Unlike the embodiment, a separate insulating film may be formed between the common electrode 180 and the common electrode line 123, and in this case, a contact hole is formed in the insulating film for connection between the common electrode 180 and the common electrode line 123. do.

On the first insulating substrate 111, a gate insulating layer 131 made of silicon nitride (SiNx) or the like covers the gate lines 121, 122, and 123.

A semiconductor layer 132 made of a semiconductor such as amorphous silicon is formed on the gate insulating layer 131 of the gate electrode 122, and n + is doped with silicide or n-type impurities at a high concentration on the semiconductor layer 132. An ohmic contact layer 133 made of a material such as hydrogenated amorphous silicon is formed. The ohmic contact layer 133 is removed from the channel portion between the source electrode 142 and the drain electrode 143.

Data lines 141, 142, and 143 are formed on the ohmic contact layer 133 and the gate insulating layer 131. The data lines 141, 142, and 143 may also be a single layer or multiple layers of a metal layer. The data wires 141, 142, and 143 are formed in a vertical direction and branch to the data line 141 and the data line 141 that cross the gate line 121 to form a pixel, and to the upper portion of the ohmic contact layer 133. An extended source electrode 142 and a drain electrode 143 which are separated from the source electrode 142 and are formed on the ohmic contact layer 133 opposite to the source electrode 142.

The passivation layer 151 is formed on the data wires 131, 132, and 133 and the semiconductor layer 132 not covered by the data lines. In the passivation layer 151, a contact hole 171 exposing the drain electrode 143 is formed.

The pixel electrode 160 is formed on the passivation layer 151. The pixel electrodes 160 are separated for each pixel and each has a rectangular shape. A plurality of cutouts 161 are formed in the pixel electrode 160. The cutout 161 extends long, and a portion extending between the cutouts 161 forms the sub pixel electrode 162.

The incision 161 is inclined and has a form that is vertically symmetrical throughout. According to the shape of the cutout 161, the sub pixel electrode 162 is also inclined and has a vertically symmetrical shape.

The cutouts 161 and 181 are formed in parallel with each other, and the sub common electrode 181 and the sub pixel electrode 161 are formed in parallel with each other.

The pixel electrode 160 may be made of indium tin oxide (ITO) or indium zinc oxide (IZO), which are transparent conductive materials.

The common electrode 180 and the pixel electrode 160 described above are formed over substantially the same area. However, the sub common electrode 182 and the sub pixel electrode 162 are provided not to overlap each other.

Next, the color filter substrate 200 will be described.

The black matrix 221 is formed on the second insulating substrate 211. The black matrix 221 generally distinguishes between red, green, and blue filters, and serves to block direct light irradiation to the thin film transistor positioned on the thin film transistor substrate 100. The black matrix 221 is usually made of a photosensitive organic material to which black pigment is added. As the black pigment, carbon black or titanium oxide is used.

The color filter 231 is formed by repeating the red, green, and blue filters with the black matrix 221 as the boundary. The color filter 231 serves to impart color to light emitted from the backlight unit (not shown) and passed through the liquid crystal layer 300. The color filter 231 is usually made of a photosensitive organic material.

The liquid crystal layer 300 is positioned between the thin film transistor substrate 100 and the color filter substrate 200. The liquid crystal layer 300 has a positive dielectric anisotropy and rotates on a plane according to an electric field to form a screen.

The reason why the transmittance of the liquid crystal display panel 10 is improved will be described with reference to FIG. 4 as follows. 4 is an enlarged view of a portion A of FIG. 3.

As described above, the sub pixel electrode 162 and the sub common electrode 182 do not overlap each other. On the other hand, since the sub pixel electrode 162 and the sub common electrode 182 occupy most of the pixel area, most of the liquid crystal layer 300 forms an electric field formed by the sub pixel electrode 162 and the sub common electrode 182. Affected by

In an embodiment, the interval w1 between the sub pixel electrodes 162, that is, the width of the opening 161 is constant, and the width w2 of each sub pixel electrode 162 is also constant. The width of the opening 161 may be 80% to 120% of the width w2 of the sub pixel electrode 162. More specifically, the interval w1 between the sub pixel electrodes 162 and the width w2 of each sub pixel electrode 162 are the same and may be about 4 μm.

The gate insulating layer 131 and the passivation layer 151 may be disposed between the sub pixel electrode 162 and the sub common electrode 182, and may have thicknesses of about 4000 μs and about 2000 μs, respectively. The gate insulating layer 131 and the passivation layer 151 may be made of silicon nitride.

The sub common electrode 182 is positioned in the center of the adjacent sub pixel electrode 162. The width w3 of the sub common electrode 182 may be 50% to 80% of the width w1 of the opening 161. An interval w4 between the sub common electrode 182 and the adjacent sub pixel electrode 162 may be about 0.3 μm to 1 μm.

In this way, since the sub pixel electrode 162 and the sub common electrode 182 are spaced apart at a predetermined interval w4, the electric field is mainly formed in the horizontal direction and the electric field formation in the vertical direction is suppressed. Therefore, the liquid crystal 300 affected by the vertical electric field is reduced, thereby improving transmittance.

Herein, as the distance w4 between the sub pixel electrode 162 and the sub common electrode 182 increases, the electric field formation in the vertical direction is effectively suppressed. However, as the interval w4 increases, there is a problem that a high driving voltage is required to form an appropriate electric field. If the distance w4 is narrowed, the electric field in the vertical direction increases, which hinders the improvement of transmittance.

5A and 5B illustrate a method of manufacturing a liquid crystal display panel according to an exemplary embodiment of the present invention.

In the method described herein, the common electrode 180 and the pixel electrode 160 are patterned using the same mask 400, and only the process of forming the common electrode 180 will be described.

5A illustrates a state in which the transparent conductive layer 183 and the photosensitive layer 190 are sequentially formed on the first insulating substrate 111 and the photosensitive layer 190 is exposed.

The transparent conductive layer 183 may be formed by sputtering ITO or IZO, and the photosensitive layer 190 may be formed through slit coating, spin coating, screen coating, or the like.

The exposure of the photosensitive layer 190 is formed using the mask 400. The mask 400 may also be used to form the pixel electrode 160. The mask 400 includes a base plate 410 made of quartz or the like and a light blocking pattern 420 formed on the base plate 410. The light blocking pattern 420 is made of chromium or the like, and is not formed at portions corresponding to the cutouts 161 and 181. The light blocking pattern 420 extends long, and the width w5 and the distance d6 are provided in the same manner.

The exposure is performed in this state, and the exposure is performed more intensely than usual, that is, for a longer time.

5B illustrates a state in which the photosensitive layer 190 is developed after exposure. The part covered by the light blocking pattern 420 is decomposed and removed, and the part covered by the light blocking pattern 420 remains.

Here, since the exposure is made strong, the width w7 of the remaining photosensitive layer 190 becomes slightly smaller than the width w5 of the light blocking pattern 420. Accordingly, the gap w8 between the photosensitive layers 190 is larger than the gap w6 between the light blocking patterns 420.

Thereafter, when the transparent conductive layer 183 is etched using the photosensitive layer 190 as a mask, the common electrode 180 shown in FIG. 3 is formed. The width w3 of the common electrode 180 corresponds to the width w7 of the photosensitive layer 190.

As described above, the width w3 of the transparent electrode layer 183 may be changed by adjusting the exposure amount of the photosensitive layer 190.

Although not shown, the gate insulating layer 131 and the passivation layer 151 are formed, and then the pixel electrode 160 is formed. The pixel electrode 160 is formed in a similar manner to the common electrode 180, but the mask 400 aligns the sub pixel electrode 161 and the sub common electrode 181 so that they do not overlap each other.

When the exposure for forming the pixel electrode 160 is normally performed, the sub pixel electrode 162 having a width similar to the width w5 of the light blocking pattern 420 may be obtained.

In the above-described embodiments, the pixel electrode 160 and the common electrode 180 are formed using the same mask 400. Unlike the exemplary embodiment, the pixel electrode 160 and the common electrode 180 may be formed using different masks.

Although embodiments of the present invention have been shown and described, it will be apparent to those skilled in the art that the present embodiments may be modified without departing from the spirit or principles of the present invention. The scope of the present invention will be defined by the appended claims and their equivalents.

As described above, according to the present invention, a liquid crystal display panel having excellent viewing angle and high transmittance is provided.

In addition, a method of manufacturing a liquid crystal display panel having excellent viewing angle and high transmittance is provided.

Claims (10)

A first insulating substrate; A common electrode formed on the first insulating substrate and including a pair of sub common electrodes having a cutoff portion therebetween; An insulating film formed on the common electrode; A pixel electrode formed on the insulating layer, the pixel electrode including a sub pixel electrode spaced apart from the pair of sub common electrodes and positioned between the pair of sub common electrodes; A liquid crystal layer formed on the pixel electrode; And a second insulating substrate facing the first insulating substrate with the liquid crystal layer interposed therebetween. The method of claim 1, The cutout is elongated and is provided in plurality, characterized in that the liquid crystal display panel. The method of claim 2, And the cutout portion is inclined. The method of claim 2, And the common electrode and the pixel electrode are made of a transparent conductive material. The method of claim 1, The opening, the sub common electrode, and the sub pixel electrode have a band shape, And a gap between the adjacent sub pixel electrodes is about 80% to 120% of the width of the sub pixel electrode. The method of claim 5, The width of the sub common electrode is about 50% to 80% of the width of the sub pixel electrode. The method of claim 5, And a distance between the sub common electrode and the sub pixel electrode is about 0.3 μm to 1 μm. An insulating substrate; A common electrode formed on the insulating substrate and including a plurality of sub common electrodes extending for a long time; An insulating film formed on the common electrode; And a pixel electrode formed on the insulating layer and extending for a long time and including a plurality of sub pixel electrodes not overlapping the plurality of sub common electrodes. Forming a first transparent conductive layer on the insulating substrate; Forming a common electrode including a plurality of sub common electrodes extending by photolithography using a mask having a plurality of light blocking patterns extending over the first transparent conductive layer; Forming an insulating film on the common electrode; Forming a second transparent conductive layer on the insulating film; And etching the second transparent conductive layer using the mask to form a plurality of sub pixel electrodes which are extended and are not overlapped with the plurality of sub common electrodes. The method of claim 9, The interval between the sub common electrode and the sub pixel electrode is controlled by changing an exposure time for forming the common electrode.

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