KR20070092426A - Method for measuring overlay - Google Patents

Abstract

A method for measuring an overlay is provided to reduce an error rate in an overlay measurement process by generating an interlock control signal according to a compared result of a set shot reference point and a measured shot reference point. A reference recipe for measuring an overlay is inputted into an equipment computer(S100). A map corresponding to a wafer for measuring the overlay is set in the equipment computer according to the reference recipe(S200). A distance from central coordinates of the wafer corresponding to a center of the wafer to shot center coordinates corresponding to centers of chips formed on the wafer is recognized according to the map of the equipment computer(S400). A predetermined alignment mark formed at an edge of the chip is measured and a measured shot reference point corresponding to a position of the alignment mark is obtained by using an optic system connected to the equipment computer(S500). The equipment computer outputs an interlock control signal when the measured shot reference point and the set reference point exceed a critical value by comparing the measured shot reference point and the set reference point with each other(S600-S800).

Description

Overlay measurement method {Method for measuring overlay}

1 is a diagram schematically showing a semiconductor manufacturing facility management system for explaining the overlay measurement method according to an embodiment of the present invention.

FIG. 2 is a flowchart illustrating an overlay measuring method using the overlay measuring apparatus of FIG. 1. FIG.

Explanation of symbols on the main parts of the drawings

100: overlay measurement equipment 110: equipment computer

120: host computer

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to an overlay measurement method for calculating an overlay correction value using an overlay pattern formed on a wafer.

In recent years, with the rapid dissemination of information media such as computers, semiconductor devices are also rapidly developing. In terms of its function, the semiconductor device is required to operate at a high speed and to have a large storage capacity. In response to these demands, manufacturing techniques are being developed for semiconductor devices to improve the degree of integration, reliability, response speed and the like.

Accordingly, each unit process that can guarantee a high production yield is being developed as part of strengthening the competitiveness in the semiconductor industry, and at the same time, methods and apparatuses for measuring process errors in each unit process have been actively studied. In particular, in the case of the photo-lithographic process, which is one of the core semiconductor manufacturing processes, there is a need for a process development and an apparatus for performing the process that can cope with the change in the process conditions frequently.

One of the problems to be considered in the photolithography process is misalignment of the photoresist pattern formed by exposure and development. The misalignment has become a more serious problem as accurate alignment becomes increasingly difficult due to the reduction of the alignment margin due to the high integration of semiconductor devices, the large diameter of the wafer, and the increase of the photolithography process. In order to prevent the misalignment, optimization of overlay metrology, which is an operation of checking the degree of alignment of the photoresist pattern formed on the wafer, is essential.

Overlay metrology methods for optimizing such overlay metrology are disclosed in US Pat. Nos. 5,696,835 and 6,357,131.

Referring to the conventional overlay measurement method, first, in order to perform overlay measurement of the wafer, a reference recipe containing information of a chip pattern image formed on a reticle in an exposure apparatus used in forming the photoresist pattern is required. At this time, the reference recipe is output from a host computer that controls the facility computer of the overlay metrology facility. Accordingly, the overlay metrology facility sets a map corresponding to the plurality of chip patterns formed on the wafer using the reference recipe output from the host computer. In this case, the number of the chip pattern may vary depending on the size of the wafer, the number of the chip pattern may vary depending on the size of the chip pattern formed on the same wafer. For example, chip patterns formed on one wafer of 8 inches are formed in various numbers such as about 77 (5X), 40, 17 (25X), and the like. Accordingly, the facility computer must set up a complex map using the reference recipe containing the chip pattern image corresponding to the overlay measurement of the wafer on which the chip patterns having various shapes and numbers are formed. However, when an incorrect reference recipe is input to the facility computer due to an error of the host computer or an operator, the facility computer creates a map according to the wrong reference recipe and overlay measurement is performed based on the map, resulting in overlay measurement failure. It can also cause a major accident in the semiconductor production line.

For example, the facility computer may form a photoresist pattern (e.g., an alignment measurement pattern) on the wafer using an optical device of the overlay metrology facility, and a lower pattern layer (e.g., a reference pattern). In this case, the overlay layers using the overlay mark formed on the scribe line outside the wafer chip area may be difficult because the pattern layers formed in the cells of the wafer are too complex to measure the overlay. Can be performed.

In more detail, the overlay measurement is generally performed according to a predetermined ratio or the size of the wafer according to the number of shots included in one wafer. In addition, overlay metrology is performed sequentially from the entire area to the local area of the wafer using optics in an overlay metrology facility. In this case, the facility computer controlling the overlay metrology facility may cause the optical device to designate the alignment marks as a reference point to increase the magnification in the optical device and to measure the overlay mark.

That is, when a wafer on which a photo process using a reticle has been completed is placed in an overlay metrology facility, the facility computer first starts a plurality of chips formed on the wafer from the center of the wafer in order for the overlay metrology facility to measure overlay marks on the wafer. By recognizing the distance to the center position, the lens of the optical device can be controlled to find and enlarge the chip. In this case, the optical device is controlled to enlarge to image a pattern having a size of about 12 mm.

In addition, the lens of the optical device corresponds to the edge of the chip at the center of the chip, and find and enlarge the first alignment mark having a '┏', '┓', '┖' or '┛' shape, The first alignment mark is controlled to find and enlarge a second alignment mark having a '+' shape spaced apart at a predetermined distance and vertically intersected. In this case, the optical device is controlled to enlarge to image a pattern having a size of about 750 μm.

Further, the facility computer corresponds to a position corresponding to the second alignment mark at a set position coordinate (eye point) corresponding to the first alignment mark by using a distance between the first alignment mark and the second alignment mark arbitrarily designated by the operator. A control signal is output to shift the focus of the lens to a coordinate (shot reference point). However, when the map set in the facility computer is set by the wrong reference recipe, the center position of the second alignment mark in the map coincides with the center position of the second alignment mark measured by the optical device. Step pitch mismatch failures that do not occur may be caused.

The overlay mark having a predetermined distance from a position coordinate (shot reference point) corresponding to the second alignment mark may be measured by using the distance between the second alignment mark and the overlay mark formed on the map.

The facility computer measures an overlay mark having a predetermined distance from a position coordinate (shot reference point) corresponding to the second alignment mark by using the distance between the second alignment mark and the overlay mark formed on the reticle. You can calculate the value.

As described above, the overlay measurement method according to the prior art has the following problems.

In the conventional overlay measurement method, the reference recipe defining the various chip patterns is mixed incorrectly in a facility computer of an overlay metrology facility for performing overlay measurement corresponding to various types of chip patterns formed on one wafer. When inputted, the facility computer has a disadvantage in that the production yield is lowered because it generates a map according to an inaccurate reference recipe and overlay measurement is performed based on the map, which may cause overlay measurement failure due to staff pitch mismatch. .

An object of the present invention for solving the above problems, even if the reference recipe defining the various types of chip patterns are mixed and incorrectly input in the facility computer of the overlay metrology facility according to the incorrect reference recipe in the facility computer It is to provide an overlay measuring method that can increase or maximize the production yield by preventing the overlay measurement is performed based on the map.

According to an aspect of the present invention for achieving the above object, an overlay metrology method comprises the steps of: inputting a reference recipe for overlay metrology into the facility computer; Setting, at the facility computer, a map corresponding to the wafer on which the overlay metrology is to be performed according to the reference recipe; Recognizing a distance from a wafer center coordinate corresponding to the center of the wafer to a shot center coordinate corresponding to the plurality of chip centers formed on the wafer according to the map set by the facility computer; Using the optical device connected to the facility computer, measure a predetermined alignment mark formed at the edge of the chip at a predetermined distance from the center of the chip, and obtain a measurement shot reference point corresponding to the position of the alignment mark in the facility computer. Doing; And an interlock control signal from the design computer when the measured shot reference point and the set reference point deviate by more than an allowable value by comparing the measured shot reference point acquired by the optical device with any set shot reference point set by the facility computer. It characterized in that it comprises the step of outputting.

Hereinafter, an overlay measurement method according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below. Embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and the like of the elements in the drawings are exaggerated to emphasize a more clear description, and the elements denoted by the same reference numerals in the drawings means the same elements. In the following description of the present invention, if it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

1 is a diagram schematically showing a semiconductor manufacturing facility management system for explaining the overlay measurement method according to an embodiment of the present invention.

As shown in FIG. 1, the semiconductor manufacturing facility management system includes overlay metrology facilities 100 that perform overlay metrology to calculate correction values of a plurality of overlay patterns formed on a wafer, and each overlay metrology facility 100. Are connected online with the facility computers 110 to directly control the overlay metrology facility 100 so that the overlay metrology facility 100 can proceed with the process. The facility computer 110 is configured to include a host computer 120 that is connected and has a database that provides a great deal of information needed to control the overlay metrology facility 100.

Although not shown, a virtual simulation of an overlay measurement method performed online by the host computer 120 and inputting or outputting information related to a semiconductor manufacturing process by an operator or an engineer and performed by the overlay metrology facility 100 is performed. RDM computer 130 for processing and transmitting to the facility computer 110 and a server for connecting each other online between the facility computer 110, the host computer 120 and the RDM computer 130 further comprises: It may be configured.

Here, the overlay measurement facility 100 may measure the center position of the preceding pattern formed through the preceding process and the center position of the subsequent pattern formed through the subsequent process so as to monitor the progress of the semiconductor manufacturing process (patterning process). It is formed to be.

For example, the overlay metrology facility 100 includes a wafer station for aligning and supporting the wafer on which the overlay pattern is formed in one direction and horizontally moving the wafer to a predetermined position, and the overlay formed on the wafer supported by the wafer station. And an optical device configured to enlarge and project the pattern to acquire a pattern image corresponding to the overlay pattern.

The facility computer 110 determines whether the semiconductor process of the wafer is normal by using a pattern image corresponding to the overlay pattern obtained by the optical device of the overlay metrology facility 100, and determines the overlay pattern. The overlay correction value may be calculated to reset or partially change the process conditions of another wafer which subsequently performs the corresponding semiconductor process.

Since the facility computer 110 and the RDM computer 130 and the server communicate with each other by a Semi Equipment Communications Standard (SECS) protocol, which is a communication protocol of a semiconductor device, data is shared or exchanged, and the server and the host computer ( 120) communicates with each other while communicating by Transmission Control Protocol / Internet Protocol (TCP / IP), which is a general communication protocol.

Referring to the overlay measurement method of the present invention using the semiconductor manufacturing management system configured as described above are as follows.

2 is a flowchart illustrating an overlay measuring method using the overlay measuring apparatus 100 of FIG. 1.

As shown in FIG. 2, in the overlay metrology method according to the present invention, first, the host computer 120 outputs a reference recipe for performing the overlay metrology to the facility computer 110 (S100). Here, the host computer 120 outputs the reference recipe corresponding to the chip pattern image formed on the reticle of the exposure apparatus for forming the photoresist pattern formed on the wafer, to the facility computer 110. For example, the reference recipe defines information corresponding to the type and size of the chip pattern image, and information corresponding to the position of the first alignment mark, the second alignment mark, and the overlay mark formed in the chip pattern. To include numbers or letters.

Next, the facility computer 110 sets a map corresponding to the entire wafer on which the overlay measurement is to be performed according to the reference recipe (S200). Here, the facility computer 110 uses the chip pattern image corresponding to the information included in the reference recipe to easily determine the position where a plurality of chip patterns formed on the entire wafer are formed. Set. In this case, the map is set such that the plurality of chip patterns are disposed radially with respect to the center of the wafer. For example, chip patterns formed on one wafer having a diameter of 8 inches are formed in various numbers such as about 77 (5X), 40, 17 (25X), and the like. Accordingly, the facility computer 110 may set a complex map by using the reference recipe containing the chip pattern image corresponding to the overlay measurement of the wafer on which the chip patterns having various shapes and numbers are formed. Thereafter, the facility computer 110 may perform overlay measurement using the overlay pattern formed on the wafer through the overlay measurement facility 100.

Next, the wafers are aligned at the wafer station of the overlay metrology facility 100, and the overlay metrology is performed through the optical device (S300). Here, the center position of the wafer is determined while being aligned in one direction with respect to the flat zone or notch formed in the wafer. In addition, the optical apparatus sequentially performs a series of processes for enlarging and finding the overlay pattern while searching for and moving the overlay patterns formed on the plurality of chip patterns spaced apart by a predetermined distance from the center position of the wafer.

First, the lens of the optical device focuses on the center of the wafer to focus, and at the center position of the wafer by using the distance between the center positions of the plurality of chip patterns formed on the map and the center positions of the wafers. The focus is horizontally moved to the chip center position (shot center) (S400). At this time, the lens of the optical device is focused to recognize the pattern of about 12mm size formed in the chip center position. In addition, the facility computer 110 may display the distance from the center position of the wafer to the chip center position (shot center) as R1.

Thereafter, the facility computer 110 outputs a control signal so that the lens of the optical device is controlled at a magnification capable of imaging the chip pattern of about 750 μm, which is larger than the 12 mm, and uses the information of the map. Focusing the lens of the optical device adjacent to the first alignment mark at a set position eye point corresponding to a first alignment mark formed at the edge of the chip with a predetermined distance from the center of the chip pattern. The distance to the position coordinate (shot reference point) corresponding to the second alignment mark is measured and displayed (S500). In this case, the set position coordinates (eye points) corresponding to the first alignment mark 140 are generally at an alignment mark that can obtain the best image in the chip pattern through the overlay metrology facility 100. The location is arbitrarily displayed or selected by the facility computer 110 or by the operator. For example, a lens of the optical device may have a '┏', '┓', '┖' or '┛' shape of the edge formed at the edge of the chip at the center of the chip pattern having a rectangular edge. By the facility computer 110 to find and enlarge a first alignment mark, and to find and enlarge a second alignment mark of a '+' shape spaced vertically and intersected at a predetermined distance from the first alignment mark. Controlled. In addition, the facility computer 110 may indicate a value corresponding to the distance from the center of the chip pattern to the position of the second alignment mark as R2.

However, when a map in which a plurality of pattern images are arranged throughout the wafer is set according to a reference recipe that is incorrectly input to the facility computer 110 by the host computer 120 or an operator, the second formed on the map. The center position of the alignment mark (for example, the set shot reference point) and the center position of the measurement second alignment mark (for example, the measurement shot reference point) measured by the lens of the optical device do not coincide with each other and are shifted in one direction ( may appear.

Accordingly, the facility computer 110 compares the center position of the second alignment mark formed on the map with the center position of the second alignment mark measured by the lens of the optical apparatus (S600). If the transition appears differently, the overlay measurement facility 100 outputs an interlock control signal such that subsequent overlay measurement is no longer performed (S900).

For example, the facility computer 110 may be configured even if the center position of the second alignment mark formed in the map and the center position of the second alignment mark measured by the lens of the optical device are completely coincident or partially coincident with each other. It may be given a certain tolerance (S700) to be carried out a subsequent overlay measurement process (S800). In addition, the facility computer 110 may determine the distance from the position coordinates (shot reference point) corresponding to the center position of the second alignment mark to the overlay mark coordinate by using the distance between the second alignment mark and the overlay mark formed on the map. Recognizing and outputting a control signal for controlling the lens of the optical device to enlarge the overlay mark. In this case, the optical device of the overlay metrology facility 100 may control to enlarge and image the overlay mark of about 50 μm. The facility computer 110 may display the distance from the shot reference point coordinates to the overlay mark coordinates as R3. In addition, the facility computer 110 calculates an overlay correction value using an overlay pattern image corresponding to the overlay pattern magnified by the lens of the optical device to correct the overlay so that the exposure process in the exposure facility is normally performed. The value may be output to the exposure apparatus through the host computer 120.

On the other hand, the facility computer 110 does not coincide with the center position of the second alignment mark formed in the map and the center position of the second alignment mark measured by the lens of the optical device, and removes the allowance. In this case, the facility computer 110 outputs an interlock control signal to prevent a subsequent overlay measurement process (S900) and resets the map using the reference recipe (S200).

Therefore, in the overlay measurement method according to the present invention, the center position (setting) of the second alignment mark in the map set in the facility computer 110 according to the reference recipe defining various kinds of chip patterns output from the host computer 120. The shot reference point) and the center position (measurement shot reference point) of the second alignment mark measured by the optical device of the overlay metrology facility 100, and when they come off above the allowable value, by generating an interlock control signal. On the basis of the map set according to the incorrect reference recipe in the facility computer 110, even when the reference recipes defining the various types of chip patterns are mixed and incorrectly input in the facility computer 110 of the overlay metrology facility 100, By preventing overlay metrology, it is possible to prevent the occurrence of overlay metrology so that production yield can be increased or maximized. There.

In addition, the description of the above embodiment is merely given by way of example with reference to the drawings in order to provide a more thorough understanding of the present invention, it should not be construed as limiting the present invention. In addition, various changes and modifications can be made by those skilled in the art without departing from the basic principles of the present invention.

As described above, according to the present invention, the center position (set shot reference point) of the second alignment mark in the map set in the facility computer according to the reference recipe defining various types of chip patterns output from the host computer, and the overlay measurement By comparing the center position (measurement shot reference point) of the second alignment mark measured by the optical device of the equipment and removing each other more than the allowable value, the various types of the above-mentioned various kinds of equipments of the overlay measuring equipment are generated by generating an interlock control signal. Even if the reference recipes that define the chip pattern are mixed and entered incorrectly, overlay measurement can be prevented from being performed based on the map set according to the incorrect reference recipe in the facility computer, thereby preventing the occurrence of overlay measurement failure. There is an effect that can increase or maximize the yield.

Claims (2)

Inputting a reference recipe for overlay metrology into the facility computer; Setting, at the facility computer, a map corresponding to the wafer on which the overlay metrology is to be performed according to the reference recipe; Recognizing a distance from a wafer center coordinate corresponding to the center of the wafer to a shot center coordinate corresponding to the plurality of chip centers formed on the wafer according to the map set by the facility computer; Using the optical device connected to the facility computer, measure a predetermined alignment mark formed at the edge of the chip at a predetermined distance from the center of the chip, and obtain a measurement shot reference point corresponding to the position of the alignment mark in the facility computer. Doing; And When the measurement shot reference point and the set reference point deviate by more than the allowable value by comparing the measurement shot reference point acquired by the optical device with any set shot reference point set by the facility computer, the design computer generates an interlock control signal. Overlay measuring method comprising the step of outputting. The method of claim 1, And if the design computer outputs an interlock control signal, resetting the map using a reference recipe output from the host computer.

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