JP2011066323A - Method for correction of exposure treatment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for correction of an exposure treatment capable of improving overlay accuracy in a lithography process. <P>SOLUTION: The method for correction of the exposure treatment includes: a step of dividing the region in the surface of a semiconductor substrate into a first region which is near the center, and a second region which is in the outer circumference side of the first region; a step of measuring an overlay misalignment from a standard position in the coordinate of a measuring point in the first region of the pattern projected by a projection exposure for measurement, a step of calculating the overlay misalignment calculation value of the first region of the projection exposure for measurement based on the overlay misalignment quantity and the coordinates of the measuring point; a step of calculating a first correction value by a first correction formula based on the calculated value of the overlay misalignment and the coordinate of the first region; a step of correcting the overlay misalignment in the projection exposure in the first region in accordance with the first correction value; a step of calculating a second correction value by a second correction formula which is different from the first correction formula based on the calculated value of the overlay misalignment and the coordinate of the second region; and a step of correcting the overlay misalignment in the projection exposure in the second region based on the second correction value. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an exposure processing correction method for projecting and exposing a pattern formed on a mask onto a semiconductor substrate.

  In an exposure apparatus used in a lithography process of a semiconductor manufacturing process, an original plate (mask) and a transfer substrate (semiconductor substrate (wafer)) are aligned.

  This alignment can be broadly divided into two types: a die-by-die method in which alignment is performed for each exposure shot with respect to the background of the substrate to be transferred, and a global alignment method in which alignment is performed with a representative shot.

  In the die-by-die method, it is impossible to align with a shot in which a base mark is not formed on the outer periphery of the wafer.

  Further, in the global alignment method, with the higher order of the misalignment correction formula for improving overlay accuracy, the influence of misalignment on the wafer outer periphery due to the higher order correction residue cannot be overlooked (for example, Patent Document 1). reference.).

JP 2003-163156 A

  The present invention provides an exposure processing correction method capable of improving the overlay accuracy of a lithography process.

A correction method according to an embodiment according to an aspect of the present invention includes:
A method for correcting an exposure process for projecting and exposing a pattern formed on a mask onto a semiconductor substrate,
Measuring the amount of misalignment from the reference position of the pattern projected by the measurement projection exposure in the coordinates of the measurement point of the first region in the vicinity of the center in the plane of the semiconductor substrate;
Based on the misalignment amount and the coordinates of the measurement point, calculate a misalignment calculation value of the measurement projection exposure of the first region,
Based on the misalignment calculation value and the coordinates of the first region, a first correction value is calculated by a first correction formula, and the projection of the first region is calculated according to the first correction value. Correct misalignment in exposure,
Based on the calculated misalignment value and the coordinates of the second region on the outer periphery side of the semiconductor substrate with respect to the first region, the second correction value is obtained by a second correction equation different from the first correction equation. The misalignment in the projection exposure of the second area is corrected based on the calculated second correction value.

A correction method according to an embodiment according to another aspect of the present invention includes:
A method for correcting an exposure process for projecting and exposing a pattern formed on a mask onto a semiconductor substrate,
Measuring the amount of misalignment from the reference position of the pattern projected by the measurement projection exposure in the coordinates of the measurement point of the first region in the vicinity of the center in the plane of the semiconductor substrate;
Based on the misalignment amount and the coordinates of the measurement point, calculate a misalignment calculation value of the measurement projection exposure of the first region,
According to the misalignment calculation value, correct misalignment in the projection exposure of the first region,
Based on the calculated misalignment value and the coordinates of the second region on the outer periphery side of the semiconductor substrate relative to the first region, a correction value is calculated by a correction formula, and the second value is calculated based on the correction value. The misalignment in the projection exposure of the area is corrected.

  According to the exposure processing correction method of the present invention, it is possible to improve the overlay accuracy in the lithography process.

It is a block diagram which shows an example of a structure of the exposure system 1 which concerns on Example 1 which is 1 aspect of this invention. It is a flowchart which shows an example of the exposure procedure of the exposure system 1 shown in FIG. It is a schematic diagram of a wafer showing a wafer coordinate system of a semiconductor substrate (wafer) and a shot coordinate system of an alignment measurement shot. It is a figure which shows an example of the relationship between the wafer in-plane coordinate and the amount of misalignment of exposure processing. It is a figure which shows an example of the alignment detectable shot in a wafer surface, and a non-detectable shot. It is a figure which shows the other example of the alignment detectable shot in a wafer surface, and a non-detectable shot. It is a figure which shows the relationship between the division system in a wafer surface, and the alignment system to apply.

  Embodiments according to the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing an example of the configuration of an exposure system 1 according to a first embodiment which is an aspect of the present invention. In the present embodiment, for example, in order to manufacture the same product, the exposure system 1 is operated with a so-called lot in which, for example, about 20 semiconductor substrates (wafers) are grouped together as a basic structural unit.

  The “alignment” described below measures the background measurement pattern projected by projection exposure using the alignment scope built in the exposure apparatus, calculates the amount of deviation from the reference position, and the correction amount in the calculation unit within the exposure apparatus And the exposure process is executed with this correction value.

  Further, “alignment inspection” is to measure the relative displacement between the measurement pattern and the background measurement pattern for which the exposure processing has been completed by the optical system of the misalignment inspection apparatus. A pattern pair composed of the measurement pattern and the background measurement pattern for which the exposure process has been completed is referred to as an “alignment inspection mark (alignment mark)”.

  By calculating the correction value at the time of exposure from the misalignment inspection result and inputting the correction value to the main lot or the next lot to be refined, the overlay accuracy of the main lot or the next lot can be improved. it can.

  As shown in FIG. 1, the exposure system 1 includes a system control unit 10, a data server 13, a lot storage 16, an exposure device group 17, and a misalignment inspection device group 19.

  The exposure device group 17 includes a plurality of exposure devices 18a, 18b, and 18c.

  The misalignment inspection apparatus group 19 includes two misalignment inspection apparatuses 20a and 20b.

  The data server 13 includes a lot history database 15 for managing information such as manufacturing process and history of product lots and misalignment correction values input to the exposure apparatuses 18a, 18b and 18c, and misalignment inspection apparatuses 20a and 20b. A lot inspection database 14 for managing information such as the amount of misalignment of the product lot measured in step 1 and measurement point coordinates in overlay inspection.

  In addition, the system control unit 10 includes a calculation unit 11 and a data transfer unit 12.

  The data transfer unit 12 is provided for the exposure devices 18 a to 18 c of the exposure device group 17, the misalignment inspection devices 20 a and 20 b of the misalignment inspection device group 19, the data server 13, and the arithmetic unit 11 of the system control unit 10. Send and receive data.

  The calculation unit 11 calculates a misalignment calculation value (parameter k) based on the misalignment amount and the measurement point coordinates (x, y) based on the past lot data or data for each semiconductor substrate constituting the lot. .

  Further, based on the obtained misalignment calculation value (parameter k), the calculation unit 11 sets correction values and the like of the exposure processes 18a, 18b, and 18c for this lot, and further, exposure apparatuses 18a, 18b, 18c, An instruction to the misalignment inspection devices 20a and 20b, the data server, and the data transfer unit 12 is given.

  Next, an example of an exposure procedure of the exposure system 1 having the above configuration will be described.

  FIG. 2 is a flowchart showing an example of an exposure procedure of the exposure system 1 shown in FIG.

  As shown in FIG. 2, first, the lot information of the main lot entering the exposure process is recognized (step S1). For example, a lot ID number of a so-called lot box in which semiconductor substrates in a lot are stored together is read by a bar code reader or the like.

  The read lot ID number is sent to the calculation unit 11 via the data transfer unit 12. Then, by referring to this ID number according to an instruction from the calculation unit 11, the following existing data is searched from the lot history database 15 (step S2). The existing data includes a product name, a process name, an exposure apparatus when exposing the background, exposure conditions, exposure date and time, misalignment inspection data described later, and the like. For example, the misalignment inspection data is searched for lots having the same product, the same process, and the same exposure apparatus used for the exposure process.

  The amount of misalignment of the corresponding lot, the measurement point coordinates, and the like are read out from the existing data of the corresponding lot by the search to the calculation unit 10 for all the corresponding lots, for example.

  Next, the computing unit 10 calculates a misalignment calculation value (parameter k) of the misalignment inspection shot of the first region based on the read misalignment amount and the measurement point coordinates (step S3). As will be described later, the correction value calculated from the measured misalignment inspection data is data measured from a preceding lot that has been subjected to an exposure process prior to the present lot to be exposed (step). S4, S5).

  Here, in order to improve the overlay accuracy of the exposure process, it is effective to increase the number of alignment measurement shots or the misalignment inspection shots in the exposure process. In particular, regarding the alignment in the exposure process, it is necessary to set the number of alignment measurement shots so that the throughput of the exposure apparatus is not reduced by the alignment measurement time.

  Hereinafter, the first embodiment will be described using an example to which the above-described global alignment method is applied.

  FIG. 3 is a schematic diagram of a wafer showing a wafer coordinate system of a semiconductor substrate (wafer) and a shot coordinate system of alignment measurement or misalignment inspection shots.

  As shown in FIG. 3, in an arbitrary exposure shot on the wafer, the shot center coordinate which is the center coordinate of the shot in the wafer coordinate system is set to (X, Y). In addition, the measurement point coordinate in the exposure shot in the exposure shot coordinate system is (x, y). The misalignment amount at the alignment measurement point is (dx, dy).

  Before the exposure process in step S6, alignment with respect to the base of the semiconductor substrate is performed. The alignment mark transferred to the base of the semiconductor substrate is measured by an alignment scope built in the exposure devices 18a, 18b, 18c. As a result, the misalignment amount (dx, dy) from the reference position in the measurement point coordinates (x, y) of the measurement point of the base pattern that is the alignment destination is measured. This misalignment amount corresponds to a deviation from a predetermined position of the pattern transferred to the semiconductor substrate by projection exposure.

  Here, the region in the plane of the semiconductor substrate (wafer) is divided into a first region near the center and a second region on the outer peripheral side of the first region, as will be described later. As will be described later, the first area is an area where the misalignment amount from the reference position for projection exposure can be measured, and the second area is an area where the misalignment amount from the reference position for projection exposure cannot be measured.

  Then, the in-exposure-apparatus calculation unit (not shown) uses the following equation (1), based on the misalignment amount (dx, dy) and the measurement point coordinates (x, y) of the measurement point, The misalignment calculation value (parameter k) of the alignment measurement shot in the area is calculated.

A not-shown in-exposure-apparatus calculation unit calculates the parameter k so that the residues α _x and α _{y in} Equation (1) are minimized for each alignment measurement shot. In other words, the actual misalignment amount measured by the misalignment inspection apparatus is subjected to least square fitting using, for example, a shift component, a wafer magnification component, a wafer rotation component, a shot magnification component, a shot rotation component, and the like.

If there is one alignment mark pair in the exposure shot, the solution of equation (1) cannot be obtained. However, when there are three or more alignment mark pairs, the solution of equation (1) can be obtained.

The parameters k ₁ and k ₂ obtained by this equation (1) are shift components. Parameters k ₃ and k ₄ are shot magnification components of the exposure shot. Parameters k ₅ and k ₆ are shot rotation components of the exposure shot. If there is only _one alignment mark pair in the exposure shot, only the parameters k ₁ and k ₂ are obtained.

Then, the calculation unit 11 inputs the parameters k _{1 to} k ₆ obtained from each alignment measurement shot and the shot center coordinates (X, Y) in the wafer coordinate system into the equation (2), and the residues α _{1 to} α ₆ are the smallest. Parameters P _{1mn to} P _6mn (correction values) are calculated (step S4).

In the first embodiment, Equation (1) is a linear equation of the in-shot coordinate system (x, y). However, when the number of measurement points in the alignment measurement shot is 6 or more, it can be approximated by the second-order or higher expression (1). Incidentally, if the expression (1) is quadratic, for approximating up to k ₁ to k _12, it is necessary to increase the expression representing the parameter k of the formula (2) to 12.

  As described above, Expression (2) is a function of shot center coordinates (X, Y). “M + n” in the equation (2) corresponds to the order of the XY function. The higher the order, the better the accuracy of alignment correction value fitting.

  However, in the XY function, as the values of X and Y increase, the correction amount for the misalignment amount increases. For example, FIG. 4 is a diagram showing an example of the relationship between the wafer in-plane coordinates and the exposure misalignment amount. In FIG. 4, the point whose wafer in-plane coordinate is 0 mm indicates the center of the wafer (semiconductor substrate).

  As shown in FIG. 4, there is a possibility that the difference between the misalignment amount based on the correction formula and the actual (measured) misalignment amount becomes large at the outer periphery of the wafer.

  Therefore, in the first embodiment, the region in the wafer surface is divided into two or more regions, and the correction value is calculated by changing the order of the XY function in each of the divided regions. As described above, in the first embodiment, the region in the wafer plane is divided into the first region near the center and the second region on the outer peripheral side of the first region.

  FIG. 5 is a diagram illustrating an example of an alignment detectable shot and a non-detectable shot in the wafer surface.

  In FIG. 5, the other blank shots are alignment-detectable shots (first region: a region where the amount of misalignment from the projection exposure reference position can be measured). Furthermore, the shots indicated by crosses are shots where alignment cannot be detected (second region: a region where the amount of misalignment from the projection exposure reference position cannot be measured).

  For the alignment detectable shot, a correction value is calculated from the alignment measurement result using equations (1) and (2).

  For example, for alignment-detectable shots, the upper limit of “m + n” in equation (2) is set to “5” (that is, quintic function fitting), and alignment detection is performed. The first correction value is calculated in the possible shot area.

  That is, the in-exposure-apparatus calculation unit (not shown) calculates the first correction value by the equation (2) (first correction equation) that is a quintic function based on the misalignment calculation value and the coordinates of the first region. calculate.

  On the other hand, for shots where alignment is not detectable, for example, the upper limit of “m + n” in equation (2) is set to “3” (ie cubic function fitting). Then, the second correction value is calculated in the region where the alignment cannot be detected. As a result, correction is performed so that the correction amount does not become too large on the outer periphery of the wafer.

  In other words, the in-exposure-apparatus calculation unit (not shown) has a cubic function (2) (second correction formula different from the first correction formula) based on the misalignment calculation value and the coordinates of the second region. To calculate the second correction value.

  As described above, in the first embodiment, the first and second correction values are calculated by changing the order of the expression (2) according to the region in the wafer surface by the above-described step S6.

  The exposure apparatus corrects misalignment in the projection exposure of the first region according to the first correction value. Further, the exposure apparatus corrects misalignment in the projection exposure of the second region based on the second correction value.

  Thus, the misalignment of the exposure process is corrected according to the area of the wafer based on the correction value. As a result, the overlay accuracy can be improved also at the outer peripheral portion of the wafer.

  Next, the exposure processing in which the above correction is performed is performed on the lot. For example, this lot configured with about 20 semiconductor substrates as a unit is introduced into the exposure apparatus. The semiconductor substrates introduced into the exposure apparatus are exposed one by one. The exposure to the semiconductor substrate is performed, for example, using one chip or a plurality of chips in the semiconductor substrate as one shot unit.

  After the exposure is completed, for example, the semiconductor substrate is extracted from the lot, and the semiconductor substrate is introduced into the misalignment inspection apparatuses 20a and 20b, and the misalignment inspection is executed (step S7).

  The misalignment inspection mark transferred to the base of the extracted semiconductor substrate is measured by misalignment inspection devices 20a and 20b. As a result, the misalignment amount (dx, dy) from the reference position in the measurement point coordinates (x, y) of the measurement points in the first region of the misalignment inspection is measured.

  Next, the misalignment inspection apparatuses 20 a and 20 b transmit the obtained misalignment inspection data to the calculation unit 11 via the data transfer unit 12. Then, the calculation unit 11 compares the obtained misalignment inspection data with a predetermined standard of this lot, and determines whether the standard is within the standard or not (step S8).

  Regardless of whether it is within the standard or not, the obtained misalignment inspection data is stored in the lot inspection database 14. For example, the data within the standard is stored in a predetermined file in the lot inspection database 14 for use in calculating the misalignment correction value of the subsequent lot (step S10). When calculating the correction value from the misalignment inspection result, the correction value may be calculated by a method similar to the method for obtaining the alignment correction value.

  On the other hand, the non-standard data is stored in another file of the lot inspection database 14 so as to be used, for example, when analyzing a non-standard cause (step S9).

  With the above flow, the exposure procedure of the exposure system 1 according to the first embodiment is completed.

  As described above, in this embodiment, the region in the plane of the semiconductor substrate is divided into regions corresponding to the measurable shot and the non-measurable shot. However, in an actual semiconductor substrate, distortion due to a wafer chuck, distortion due to a CMP process, distortion due to a thermal process, distortion due to a diffusion process, and the like occur. For this reason, according to the factor of the distortion which arises in a semiconductor substrate, you may divide the area | region in a wafer surface into this 1st area | region and this 2nd area | region.

  Further, the above-described area may be divided even in the area where alignment measurement is possible.

  As described above, according to the exposure processing correction method according to the present embodiment, it is possible to improve the overlay accuracy of the lithography process.

  Thereby, the yield of the semiconductor chip can be improved. Furthermore, it is possible to reduce re-exposure processing and improve the processing capability of the photoresist coating and developing apparatus or the pattern forming apparatus. That is, the productivity of the semiconductor device can be improved.

  In the above-described first embodiment, the example in which the global alignment method is applied to the exposure process in the region near the center of the semiconductor substrate has been described.

  As described above, it is effective to increase the number of sampling shots for alignment in order to improve the overlay accuracy.

  In the second embodiment, an example in which the die-by-die method is applied to the exposure process in the region near the center of the semiconductor substrate will be described. In the second embodiment as well, a case where the exposure system 1 shown in FIG. 1 is operated will be described.

  Up to step S5 in FIG. 2, in the same manner as in the first embodiment, the in-exposure apparatus calculation unit (not shown) performs alignment measurement shots in the first area based on the read misalignment amount and measurement point coordinates. The misalignment calculation value (parameter k) is calculated. Here, in Example 2, a misalignment calculation value (parameter k) is calculated for each alignment measurement shot in the first region.

  Then, in the alignment in the exposure apparatus in step S6, as in the first embodiment, for the shot in which alignment is not detectable, the measurement result in the alignment detectable shot is expressed by, for example, “m + n” in Expression (2). The upper limit is set to “3” (that is, cubic function fitting), and the correction value is calculated in the region where the alignment cannot be detected. As a result, correction is performed so that the correction amount does not become too large on the outer periphery of the wafer.

  In other words, the calculation unit 11 performs the second correction based on the misalignment calculation value and the coordinates of the second region by using the cubic function (2) (second correction formula different from the first correction formula). Calculate the value.

  As described above, according to the alignment in the exposure apparatus in step S6 described above, in the first embodiment, the first and second correction values are obtained by changing the order of Expression (2) according to the region in the wafer surface. Is calculated.

  Then, the exposure apparatus corrects the misalignment in the projection exposure of the first region for each exposure shot in accordance with the misalignment calculation value. Further, the exposure apparatus corrects misalignment in the projection exposure of the second region based on the correction value.

  The subsequent exposure procedure flow is the same as in the first embodiment.

  As described above, also in this example, the region in the plane of the semiconductor substrate was divided into regions corresponding to the measurable shot and the non-measurable shot. However, as in the first embodiment, the region in the wafer surface may be divided into the first region and the second region according to the factor of the distortion generated in the semiconductor substrate.

  Further, the above-described area may be divided even in the area where alignment measurement is possible.

  Here, FIG. 6 is a diagram illustrating other examples of alignment detectable shots and non-detectable shots in the wafer plane. FIG. 7 is a diagram showing the relationship between the divided regions in the wafer surface and the alignment method to be applied.

  For example, as shown in FIG. 6, the wafer surface is divided into four (first area: A, B, C, second area: D). Then, as shown in FIG. 7, the misalignment calculation value and the correction value may be calculated by combining the global alignment method and the die-by-die method.

  As described above, according to the exposure processing correction method according to the present embodiment, it is possible to improve the overlay accuracy of the lithography process.

DESCRIPTION OF SYMBOLS 1 Exposure system 10 System control part 11 Operation part 12 Data delivery part 13 Data server 15 Lot history database 16 Lot storage 17 Exposure apparatus group 18a, 18b, 18c Exposure apparatus 19 Misalignment inspection apparatus group 20a, 20b Misalignment inspection apparatus

Claims (5)

A method for correcting an exposure process for projecting and exposing a pattern formed on a mask onto a semiconductor substrate,
Measuring the amount of misalignment from the reference position of the pattern projected by the measurement projection exposure in the coordinates of the measurement point of the first region in the vicinity of the center in the plane of the semiconductor substrate;
Based on the misalignment amount and the coordinates of the measurement point, calculate a misalignment calculation value of the measurement projection exposure of the first region,
Based on the misalignment calculation value and the coordinates of the first region, a first correction value is calculated by a first correction formula, and the projection of the first region is calculated according to the first correction value. Correct misalignment in exposure,
Based on the calculated misalignment value and the coordinates of the second region on the outer peripheral side of the semiconductor substrate with respect to the first region, the second correction value is obtained by a second correction equation different from the first correction equation. An exposure processing correction method comprising: calculating and correcting misalignment in the projection exposure of the second region based on the second correction value. A method for correcting an exposure process for projecting and exposing a pattern formed on a mask onto a semiconductor substrate,
Measuring the amount of misalignment from the reference position of the pattern projected by the measurement projection exposure in the coordinates of the measurement point of the first region in the vicinity of the center in the plane of the semiconductor substrate;
Based on the misalignment amount and the coordinates of the measurement point, calculate a misalignment calculation value of the measurement projection exposure of the first region,
According to the misalignment calculation value, correct misalignment in the projection exposure of the first region,
Based on the calculated misalignment value and the coordinates of the second region on the outer periphery side of the semiconductor substrate relative to the first region, a correction value is calculated by a correction formula, and the second value is calculated based on the correction value. A correction method for an exposure process, wherein a misalignment in the projection exposure of the region is corrected. 3. The exposure processing according to claim 1, wherein the misalignment calculation value is an exposure shot shift component of the projection exposure, a shot magnification component of the exposure shot, and a shot rotation component of the exposure shot. Correction method. In accordance with the cause of the distortion generated in the semiconductor substrate, the in-plane region of the semiconductor substrate is divided into a first region near the center and a second region on the outer peripheral side of the first region. The exposure processing correction method according to claim 1, wherein the exposure processing correction method is a correction method.   The exposure processing correction method according to claim 1, wherein the second region is a region in which an amount of misalignment from a reference position of projection exposure cannot be measured.

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