KR20070082637A - Display device - Google Patents

Abstract

A display device is provided to mount a data driving unit to a display panel by winding a pixel in a row direction and thus, reducing the number of data driving integrated circuits. A gate driving unit(400) generates a scan signal. A data driving unit(500) generates a data signal. A plurality of scan signal lines(G1-Gn) transmit the scan signal. A plurality of data lines(D1-Dm) intersect the scan signal line and transmit the data signal. A plurality of pixels have a first side formed in parallel with the scan signal lines, and a second side formed in parallel with the data line and being shorter than the adjacent first side. In the pixel of neighboring columns, the first sides are disposed to be deviated. A length ratio of the first side to the second side is 3:1. The pixels have red, green and blue colors.

Description

Display device {DISPLAY DEVICE}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a block diagram of a data driver of a liquid crystal display according to an exemplary embodiment of the present invention.

4 is a signal waveform diagram illustrating an operation of a liquid crystal display according to an exemplary embodiment of the present invention.

The present invention relates to a display device.

In recent years, with the reduction in weight and thickness of personal computers and televisions, display devices are also required to be lighter and thinner, and cathode ray tubes (CRTs) are being replaced by flat panel displays.

Such flat panel displays include liquid crystal displays (LCDs), field emission displays (FEDs), organic light emitting displays, plasma display panels (PDPs), and the like. There is this.

In general, in an active matrix flat panel display, a plurality of pixels are arranged in a matrix form, and an image is displayed by controlling the light intensity of each pixel according to given luminance information. Among them, the liquid crystal display includes two display panels including a pixel electrode and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The liquid crystal display device applies an electric field to the liquid crystal layer, and adjusts the intensity of the electric field to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image.

Due to the recent increase in the demand of mobile communication and multimedia devices, the demand for liquid crystal display devices is increasing. Such liquid crystal display devices are Wide Video Graphic Array (WVGA), Video Graphic Array (VGA), Wide Quarter Video (WQVGA). Graphic Array) Super resolution is required.

In addition, such a liquid crystal display device requires a method of reducing cost by forming a display area, a gate driver, and a data driver in one integrated circuit (1-Chip).

However, as the pixels of the ultra high resolution liquid crystal display increase, the number of data lines increases, and accordingly, the area of the data driver increases. Therefore, in the case of the liquid crystal display device in which one side of the display area is connected to the gate driver and the other side is connected to the data driver, it is difficult to implement an integrated circuit including the data driver.

Accordingly, an object of the present invention is to provide a liquid crystal display device implemented as one integrated circuit by reducing the number of data drivers.

According to an aspect of the present invention, there is provided a display device including a gate driver for generating a scan signal, a data driver for generating a data signal, a plurality of scan signal lines for transmitting the scan signal, and an intersection with the scan signal line. A plurality of data lines carrying the data signal, and

A first side parallel to the scan signal line and a second side parallel to the data line, the second side being shorter than the neighboring first side, and including a plurality of pixels forming a column, wherein the pixels in the neighboring column are the first side They are arranged to be offset from each other.

The ratio of the length of the first side and the second side may be 3: 1.

The pixel may represent red, green, or blue.

The red, green, and blue pixels may be repeated in sequence to form columns.

The data driver may transfer the data signal to at least two pixels through one data line during one horizontal period.

The plurality of pixels in odd-numbered columns may sequentially display red, green, and blue, and the plurality of pixels in even-numbered columns may sequentially display blue, red, and green.

The data driver outputs the data signals in the order of red, green, and blue through the odd-numbered data lines during the one horizontal period, and in the order of blue, red, and green through the even-numbered data lines. The data signal can be output.

The pixels in the odd-numbered column may sequentially display blue, red, and green, and the pixels in the even-numbered column may sequentially display red, green, and blue.

The data driver outputs the data signal in the order of blue, red, and green through the odd-numbered data lines during the one horizontal period, and the data in the order of red, green, and blue through the even-numbered data lines. Can output a signal.

The scan driver and the data driver may be formed on a substrate together with the plurality of pixels.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A display device according to an embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a data driver 500 connected thereto. ) Includes a gray voltage generator 550 connected thereto, and a signal controller 600 controlling the gray voltage generator 550.

The liquid crystal panel assembly 300 includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m and a plurality of pixels connected to the plurality of display signal lines G ₁ -G _n , D ₁ -D _m , and arranged in substantially rows.

The display signal lines G ₁ -G _n and D ₁ -D _{m each} include a plurality of scan signal lines G ₁ -G _n transmitting scan signals and a plurality of data lines D ₁ -D _m transferring data signals. Include.

The scan signal lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

The pixel has a long structure in the row direction, and when the row direction is the first side and the column direction is the second side, the first side may have a length three times that of the second side.

Therefore, the liquid crystal display of the present invention reduces the number of pixels in the row direction and increases the number of pixels in the column direction in the display area of the same size as the conventional one, while maintaining the number of pixels in the entire data line ( D ₁ -D _m ) can be reduced.

These pixels form a column, and the pixels forming the odd-numbered column and the pixels forming the even-numbered column are arranged so that the first sides thereof are shifted from each other. For example, with respect to the pixels forming the odd-numbered column, the pixels forming the even-numbered column may be arranged down by a predetermined length in the column direction.

Therefore, the scan signal lines G ₁ -G _n extending in the row direction cross the pixels in the odd column, bend down by a predetermined length, cross the pixels in the even column, and bend up again by the predetermined length, and then the odd number. Across the pixels of the column.

On the contrary, the pixels forming the odd-numbered column may be arranged down by a predetermined length with respect to the pixels forming the even-numbered column.

Referring to FIG. 2, the liquid crystal panel assembly 300 includes a gap between the lower and upper panels 100 and 200 facing each other, the liquid crystal layer 3 interposed therebetween, and the lower and upper panels 100 and 200. (Iii) include spacers (not shown) which are to some extent compressively deformed.

To each pixel, for example, the i-th (i = 1, 2, ..., n) scan signal line G _i and the j-th (j = 1, 2, ..., m) data line D _j . The connected pixel includes a switching element Q connected to the signal lines G _i and D _j , a liquid crystal capacitor Clc, and a storage capacitor Cst connected thereto. Holding capacitor Cst can be omitted as needed.

The switching element Q is a three-terminal element such as a thin film transistor provided in the lower panel 100, the control terminal of which is connected to the scan signal line G _i , and the input terminal of which is connected to the data line D _j . The output terminal is connected to the liquid crystal capacitor Clc and the storage capacitor Cst.

The liquid crystal capacitor Clc has two terminals, the pixel electrode 191 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 191 and 270 is a dielectric material. Function as. The pixel electrode 191 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives the common voltage Vcom. Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, at least one of the two electrodes 191 and 270 may be formed in a linear or bar shape.

The storage capacitor Cst, which serves as an auxiliary part of the liquid crystal capacitor Clc, is formed by overlapping a separate signal line (not shown) and the pixel electrode 191 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage Vcom is applied to the separate signal line. However, the storage capacitor Cst may be formed such that the pixel electrode 191 overlaps the shear scan signal line immediately above the insulator.

On the other hand, in order to implement color display, each pixel may display one of the primary colors uniquely (spatial division) or each pixel may alternately display the primary colors over time (time division). Spatial and temporal sums ensure that the desired color is recognized. Examples of the primary colors include three primary colors such as red, green, and blue. 1 and 2 illustrate that each pixel includes a color filter 230 representing one of the primary colors in an area of the upper panel 200 corresponding to the pixel electrode 191. Unlike FIG. 2, the color filter 230 may be formed above or below the pixel electrode 191 of the lower panel 100. The color filter 230 is disposed repeatedly according to the column. For example, the pixels of odd-numbered columns are provided with color filters 230 in the order of red, green, and blue (R, G, B), and the pixels of even-numbered columns are blue, red, and green (B, R, The color filter 230 of G) may be provided.

The pixels of the three primary colors form one dot DT, which is a basic unit of image display. The color filter 230 is arranged in a delta structure, and as shown in FIG. 1, four pixels connected to the first and second data lines D1 and D2 and the first and second scan signal lines G1 and G2. Can implement two dots in combination with triangles. Therefore, such a liquid crystal display can increase the resolution and is effective for displaying moving pictures and curves.

From now on, a pixel including the red color filter 230 is referred to as a red pixel, a pixel including the green color filter 230 is referred to as a green pixel, and a pixel including the blue color filter 230 is referred to as a blue pixel.

Referring back to FIG. 1, the gray voltage generator 550 generates two gray voltage sets (or reference gray voltage sets) related to the transmittance of the pixel PX. One of the two sets has a positive value for the common voltage Vcom and the other set has a negative value.

The gate driver 400 is connected to the scan signal lines G ₁ -G _n of the liquid crystal panel assembly 300 and includes a combination of a high voltage Von for turning on the switching element Q and a low voltage Voff for turning off. The scan signal is applied to the scan signal lines G ₁ -G _n .

The data driver 500 is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300, and selects a gray voltage from the gray voltage generator 550 and uses the data line D ₁ as a data signal. -D _m ).

The scan driver 400 or the data driver 500 may be mounted directly on the display panel 300 in the form of at least one driver integrated circuit chip, or mounted on a flexible printed circuit film (not shown). The display panel 300 may be attached to the display panel 300 in the form of a tape carrier package (TCP). Alternatively, the scan driver 400 or the data driver 500 may be integrated in the display panel 300.

The signal controller 600 controls the gate driver 400, the data driver 500, and the like.

The signal controller 600 receives input image signals R, G, and B and an input control signal for controlling the display thereof from an external graphic controller (not shown). The input control signal includes a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock MCLK, a data enable signal DE, and the like.

The signal controller 600 applies the input image signals R, G, and B to the operating conditions of the liquid crystal panel assembly 300 and the data driver 500 based on the input image signals R, G, and B and the input control signal. After appropriately processing and generating the gate control signal CONT1 and the data control signal CONT2, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal ( DAT) to the data driver 500.

The gate control signal CONT1 includes a scan start signal STV indicating the start of scanning and at least one clock signal controlling the output period of the high voltage Von. The gate control signal CONT1 may also further include an output enable signal OE that defines the duration of the high voltage Von.

The data control signal CONT2 is a load signal LOAD and a data clock for applying a data signal to the horizontal synchronization start signal STH and the data lines D ₁ -D _m indicating the start of transmission of the group of image data DAT. Signal HCLK. The data control signal CONT2 also inverts the voltage polarity of the image data signal relative to the common voltage Vcom (hereinafter referred to as "polarity of the image data signal" by reducing the "voltage polarity of the image data signal with respect to the common voltage"). It may further include an inversion signal RVS.

3 is a block diagram of a data driver of a liquid crystal display according to an exemplary embodiment of the present invention.

The data driver 500 includes a plurality of data driver integrated circuits for supplying a data signal to the data lines D ₁ -D _m . The data driver integrated circuits include a shift register 510 which is sequentially connected as shown in FIG. 3, A latch unit 530, a digital-to-analog converter 550, and a buffer 570.

When the shift register 510 receives the horizontal synchronization start signal STH (or the shift clock signal), the shift register 510 sequentially shifts the input image data DAT according to the data clock signal HCLK and transfers the image data DAT to the latch unit 530. When the data driver 500 includes a plurality of data driver integrated circuits, the shift register 510 shifts all the image data DAT in charge of the shift register 510, and then shifts the shift clock signal to a neighboring data driver integrated circuit. Export to the shift register.

When the data DAT corresponding to one pixel is 8 bits, the latch unit 530 includes 24 latches, and the 24 latches include the red, green, and blue (R, G, B) pixels of one frame. Each bit of 8-bit data DAT is supplied and stored for a predetermined time. The latch unit 530 outputs 8-bit data DAT of the pixel to the digital-analog converter 550 according to the load signal LOAD.

At this time, the latch unit 530 of the data driving integrated circuit connected to the odd-numbered data lines D _2k-1 , k = 1, 2, ... m / 2 is red, green, and blue according to the load signal LOAD. The latch unit 530 of the data driving integrated circuit outputs the data DAT in the order of the (R, G, B) pixels, and is connected to the even-numbered data lines D _2k , k = 1, 2, ... m / 2. ) Outputs data DAT in order of blue, red, and green (B, R, G) pixels according to the load signal LOAD. On the contrary, when the arrangement of the color filter 230 is reversed from the odd number to the even number, the order of outputting the data DAT from the latch unit 530 to the digital-to-analog converter 550 may also be reversed.

The digital-to-analog converter 550 converts 8-bit data DAT of one pixel into an analog data voltage Vdat and outputs it to the buffer 570.

The buffer 570 outputs the data voltage Vdat from the digital-to-analog converter 550 through the output terminals Y ₁ -Y _r , which are converted into one horizontal period (or “1H”) (horizontal sync signal Hsync). ), Half the period of the data enable signal DE]. The output terminals Y ₁ -Y _r are connected to the corresponding data lines D ₁ -D _m .

As such, since the data DAT of three pixels may be processed in one data driving integrated circuit, the number of data driving integrated circuits may be reduced to one third, thus integrating data driving in a non-display area outside the display panel. The circuit can be sufficiently mounted to implement a chip on glass (COG).

Next, the operation of the liquid crystal display will be described in detail.

4 is a signal waveform diagram illustrating an operation of a liquid crystal display according to an exemplary embodiment of the present invention.

According to the data control signal CONT2 from the signal controller 600, the data driver 500 receives the digital image data DAT for a group of pixels and converts the digital image data DAT into an analog data signal Vdat. After conversion to, apply it to the corresponding data lines D ₁ -D _m . During one horizontal period (1H), the odd-numbered data lines (D _2k-1 , k = 1, 2, ... m / 2) receive data signals Vdat of red, green, and blue (R, G, B) pixels. The even-numbered data lines D _2k , k = 1, 2, ... m / 2 sequentially output data signals Vdat of blue, red, and green (B, R, G) pixels.

The gate driver 400 sequentially scans the scan signals of the three scan signal lines G1, G2, and G3 to the high voltage Von level during one horizontal period 1H according to the gate control signal CONT1 from the signal controller 600. The high voltage Von is maintained for one third of one horizontal period 1H, and then lowered to the low voltage Voff.

The gate driver 400 turns on the switching element Q connected to the first scan signal line G ₁ by applying the high voltage Von to the first scan signal line G ₁ . Then, the data signal Vdat applied to the data lines D ₁ -D _m is applied to the corresponding pixel through the switching element Q turned on. That is, the pixel connected to the odd-numbered data lines D _2k-1 , k = 1, 2,... M / 2 and the first scan signal line G1 receives the data signal Vdat of the red (R) pixel. The pixels connected to the even-numbered data lines D _2k , k = 1, 2, ... m / 2 and the first scan signal line G1 receive the data signal Vdat of the blue (B) pixel.

The difference between the voltage of the data signal Vdat applied to the pixel and the common voltage Vcom is represented as the charging voltage of the liquid crystal capacitor C _LC , that is, the pixel voltage. The arrangement of the liquid crystal molecules varies according to the magnitude of the pixel voltage, thereby changing the polarization of light passing through the liquid crystal layer 3. The change in polarization is represented as a change in the transmittance of light by the polarizer attached to the liquid crystal panel assembly 300, and thus a desired image may be displayed.

Subsequently, the pixel connected to the odd-numbered data lines D _2k-1 , k = 1, 2,... M / 2 and the second scan signal line G2 receives the data signal Vdat of the green (G) pixel. A pixel that transmits light and is connected to the even-numbered data lines D _2k , k = 1, 2, ... m / 2 and the second scan signal line G2 receives the data signal Vdat of the red (R) pixel. Transmits light Next, the pixel connected to the odd-numbered data lines D _2k-1 , k = 1, 2,... M / 2 and the third scan signal line G3 receives the data signal Vdat of the blue (B) pixel. A pixel that transmits light and is connected to the even-numbered data lines D _2k , k = 1, 2, ... m / 2 and the third scan signal line G3 receives the data signal Vdat of the green (G) pixel. Transmits light

By repeating this process, high voltages Von are sequentially applied to all the scan signal lines G ₁ -G _n to apply the image data signal Vdat to all the pixels to display an image of one frame.

As described above, since the liquid crystal display of the present invention has a delta structure, four pixels may implement two dots in a combination of triangles. Therefore, high resolution may be realized as compared with a general stripe structure or a mosaic structure.

When one frame ends, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the image data signal Vdat applied to each pixel is opposite to the polarity of the previous frame. (“Invert frame”). At this time, even in one frame, the polarity of the data signal Vdat flowing through one data line D ₁ -D _m is changed according to the characteristics of the inversion signal RVS (eg, reverse inversion, point inversion), The polarities of the data signals Vdat applied to the row may also be different (eg, thermal inversion and point inversion).

As described above, according to the present invention, the data driver may be mounted on the display panel by widening the pixels in the row direction to reduce the number of data driver integrated circuits. In addition, such a liquid crystal display has a delta structure, which is effective for expression of moving pictures and curves.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (10)

A gate driver for generating a scan signal, A data driver for generating a data signal, A plurality of scan signal lines for transferring the scan signals, A plurality of data lines intersecting the scan signal lines and transferring the data signals, and A plurality of pixels having a first side parallel to the scan signal line and a second side parallel to the data line and shorter than the adjacent first side, and forming a column Including; The pixels of neighboring columns are arranged such that the first sides are shifted from each other. Display device. In claim 1, The ratio of the lengths of the first side and the second side is 3: 1. In claim 2, And the pixel is red, green, or blue. In claim 3, And red, green, and blue pixels are sequentially repeated to form columns. In claim 4, And the data driver transfers the data signal to at least two pixels through one data line during one horizontal period. In claim 5, The plurality of pixels of the odd-numbered columns sequentially display red, green, and blue, And a plurality of pixels of even-numbered columns sequentially displaying blue, red, and green. In claim 6, The data driver Outputting the data signal in the order of red, green, and blue through the odd-numbered data lines during the one horizontal period; A display device for outputting the data signal in the order of blue, red, and green through an even-numbered data line. In claim 5, The pixels in the odd-numbered columns display blue, red, and green in turn, A display device in which the pixels in the even-numbered columns sequentially display red, green, and blue colors. In claim 8, The data driver Output the data signals in the order of blue, red, and green through the odd-numbered data lines during the one horizontal period; A display device for outputting the data signal in the order of red, green, and blue through the even-numbered data line. In claim 5, The scan driver and the data driver are formed on a substrate together with the plurality of pixels.

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