KR20070067997A - Method for fabricating a semiconductor device - Google Patents

Abstract

A method for fabricating a semiconductor device is provided to minimize attach of a polysilicon layer caused by a cleaning process performed after a trench formation process is performed, by forming a floating gate composed of a doped or undoped triple polysilicon layer. A tunnel oxide layer(102), a first polysilicon layer(104), a second polysilicon layer(106), a third polysilicon layer(108), a buffer oxide layer and a nitride layer are sequentially formed on a semiconductor substrate(100). The nitride layer, the buffer oxide layer, the third polysilicon layer, the second polysilicon layer, the first polysilicon layer, the tunnel oxide layer and the semiconductor substrate are partially etched to form a floating gate pattern and a trench. A wall oxide layer can be formed on the floating gate pattern and the trench. After a gap-fill process is performed to form an insulation layer(116) on the floating gate pattern and in the trench, a part of the insulation layer is recessed. The buffer oxide layer and the nitride layer are removed.

Description

Method for fabricating a semiconductor device

1A to 1C are cross-sectional views illustrating a process of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

         100 semiconductor substrate 102 tunnel oxide film

         104: first polysilicon film 106: second polysilicon film

         108: third polysilicon film 110: buffer oxide film

         112 nitride layer 114 floating gate pattern and trench

         116: insulating film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and in particular, a subsequent trench forming process by forming a floating gate formed on a semiconductor substrate of a flash memory device into a doped or undoped triple polysilicon film. A method of manufacturing a semiconductor device capable of minimizing the attack of a polysilicon film by a cleaning process performed later.

As an example of a semiconductor device, a flash memory device has advantages of EPROM having programming and erasing characteristics and EEPROM having electrical programming and erasing characteristics. It is a device manufactured using. Such a flash memory device realizes a bit storage state as one transistor, and can be electrically programmed and erased.

Such flash memory cells generally have a vertically stacked gate structure having a floating gate formed on a silicon substrate. The multilayer gate structure typically includes one or more tunnel oxide or dielectric films and a control gate formed on or around the floating gate.

Hereinafter, the manufacturing method of the conventional semiconductor element is briefly described, and the problems of the prior art are derived.

A tunnel oxide film, a floating silicon polysilicon film, and a nitride film are formed over the semiconductor substrate, and then a photosensitive film pattern is formed over the nitride film.

In this case, the floating silicon polysilicon layer is formed of an undoped polysilicon layer on the tunnel oxide layer, and a doped polysilicon layer (Doped-Poly) is formed on the undoped polysilicon layer (Undoped-Poly). To form a floating gate.

In other words, the floating gate, which plays an important role in a NAND flash device, such as programming and erasing, is formed of a double structure of an undoped polysilicon layer and a doped polysilicon layer.

Using the photoresist pattern as a mask, the nitride film, the polysilicon film for floating gate, the tunnel oxide film, and a portion of the semiconductor substrate are etched to form a floating gate pattern and a trench.

However, as NAND flash devices are gradually miniaturized in recent years, the aspect ratio is increased, and accordingly, an excessive plasma condition causes an attack on the floating gate pattern during the deposition of an insulating layer by a subsequent gap fill process. .

In general, the doped polysilicon film has a faster oxidation rate than the undoped polysilicon film, so that when exposed to plasma, the doped polysilicon film on the upper portion of the floating gate pattern receives more attack. Tends to oxidize.

The polysilicon film oxidized by the attack is etched during the subsequent cleaning process, resulting in a loss.

SUMMARY OF THE INVENTION An object of the present invention is to form a floating gate formed on an upper surface of a semiconductor substrate with a doped or undoped triple polysilicon film, thereby attacking the polysilicon film by a cleaning process performed after a subsequent trench formation process ( It is to provide a method of manufacturing a semiconductor device that can minimize the attack.

In accordance with another aspect of the present invention, a method of manufacturing a semiconductor device includes sequentially forming a tunnel oxide film, a first polysilicon film, a second polysilicon film, a third polysilicon film, a buffer oxide film, and a nitride film on an upper surface of a semiconductor substrate; Etching a portion of the nitride film, the buffer oxide film, the third polysilicon film, the second polysilicon film, the first polysilicon film, the tunnel oxide film, and the semiconductor substrate to form a floating gate pattern and a trench; Performing a gap fill process to form an insulating film inside the floating gate pattern and the trench, and then partially recessing the insulating film; And removing the buffer oxide film and the nitride film.

The first polysilicon film and the third polysilicon film are formed of an undoped polysilicon film, and the second polysilicon film is formed of a doped polysilicon film.

The second polysilicon film forms Group 5 elements such as P and As at a doping energy of 10 to 50K and a doping concentration of E ¹⁰ to E ²⁰ [atoms / cc].

The first polysilicon film, the second polysilicon film, and the third polysilicon film are each formed to a thickness of 100 to 500 mm 3.

Before the gap fill process, a wall oxide layer is formed on the floating gate pattern and the trench surface. The insulating film is an HDP film.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1A to 1C are cross-sectional views illustrating a process of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

Referring to FIG. 1A, a tunnel oxide layer 102, a first polysilicon layer 104 for floating gates, a second polysilicon layer 106, a third polysilicon layer 108, and a buffer are disposed on a semiconductor substrate 100. After the oxide film 110 and the nitride film 112 are sequentially formed, a photoresist pattern (not shown) is formed on the nitride film 112.

Here, the first polysilicon film 104 and the third polysilicon film 108 are formed of an undoped polysilicon film (Undoped-Poly), and the second polysilicon film 106 is a doped polysilicon film ( Doped-Poly).

The second polysilicon film 106, which is a doped polysilicon film (Doped-Poly), has a doping energy of 10 to 50K and a doping concentration of E ¹⁰ to E ²⁰ [atoms / cc] for Group 5 elements such as P and As. To form.

The first polysilicon film 104, the second polysilicon film 106, and the third polysilicon film 108 are each formed to a thickness of 100 to 500 mm 3.

FIG. 1B is a cross-sectional view of a semiconductor device having undergone the following process of FIG. 1A. Referring to FIG. 1B, the photoresist layer pattern (not shown) is used as a mask, and the nitride layer 112, the buffer oxide layer 110, the third polysilicon layer 108, the second polysilicon layer 106, and the first polysilicon layer are formed. A portion of the 104, the tunnel oxide film 102 and the semiconductor substrate 100 are etched to form a floating gate pattern and a trench 114.

Here, since the third polysilicon film 108, which is not doped and is relatively slow in oxidation, is formed on the second polysilicon 106, which is a doped polysilicon film, the floating gate pattern and the trench 114 are formed. When exposed to the plasma to form a), the second polysilicon layer 106, which is a doped polysilicon layer, is not subjected to an attack.

FIG. 1C is a cross-sectional view of a semiconductor device having undergone the following process of FIG. 1B. Referring to FIG. 1C, after forming a monthly oxide film (not shown) on the floating gate pattern and the trench 114, a gap fill process of filling the insulating film 116 is performed.

The insulating film 116 is preferably formed of an HDP film. Since the monthly oxide film (not shown) is an oxide-based material such as an HDP film, the distinction is not clear.

Next, after the insulating film 116 is planarized using an oxide chemical mechanical polishing (CMP) slurry, the nitride film (with the peripheral circuit region blocked) to recess only the insulating film 116 in the cell region. 112) A photoresist pattern (not shown) is formed on the top.

After the insulating film 114 is recessed using the photoresist pattern (not shown) as a mask, the photoresist pattern (not shown) is removed.

After removing the material remaining on the nitride film 112 with the BOE solution, the nitride film 112 is removed using phosphoric acid.

At this time, the third polysilicon film 108 exposed after the nitride film 112 is removed by the BOE solution or phosphoric acid as described above is an undoped polysilicon film, which is not oxidized and is not damaged by a subsequent cleaning process. .

Next, a dielectric film (not shown), a fourth polysilicon film (not shown), a tungsten silicide film (not shown), and a hard mask film (not shown) are formed on the entire structure, and then a gate etching process is performed. To form a gate.

As described above, the present invention is performed after the subsequent trench formation process by forming a floating gate formed on the semiconductor substrate 100 as a triple polysilicon layer doped or undoped. Attack of the polysilicon film due to the cleaning process can be minimized.

Although the present invention has been described with reference to the embodiments illustrated in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible.

Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

According to the present invention, a floating gate formed on a semiconductor substrate is formed of a doped or undoped triple polysilicon film, thereby attacking the polysilicon film by a cleaning process performed after a subsequent trench formation process. Minimize Attack.

Claims (6)

Sequentially forming a tunnel oxide film, a first polysilicon film, a second polysilicon film, a third polysilicon film, a buffer oxide film, and a nitride film on the semiconductor substrate; Etching a portion of the nitride film, the buffer oxide film, the third polysilicon film, the second polysilicon film, the first polysilicon film, the tunnel oxide film, and the semiconductor substrate to form a floating gate pattern and a trench; Performing a gap fill process to form an insulating film inside the floating gate pattern and the trench, and then partially recessing the insulating film; And Removing the buffer oxide film and the nitride film; Method for manufacturing a semiconductor device comprising a. The method of claim 1, The first polysilicon film and the third polysilicon film are formed of an undoped polysilicon film (Undoped-Poly), and the second polysilicon film is a semiconductor device manufacturing method of forming a doped polysilicon (Doped-Poly) . The method of claim 1, The second polysilicon film forms a group 5 element such as P or As at a doping energy of 10 to 50K and a doping concentration of E ¹⁰ to E ²⁰ [atoms / cc]. The method of claim 1, The first polysilicon film, the second polysilicon film, and the third polysilicon film are each formed in a thickness of 100 to 500 GPa. The method of claim 1, A method of manufacturing a semiconductor device, wherein a wall oxide film is formed on a floating gate pattern and a trench surface before the gap fill process is performed. The method of claim 1, The insulating film is a HDP film manufacturing method of a semiconductor device.

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