KR20070001550A - Manufacturing method of semiconductor device - Google Patents

Abstract

A method for manufacturing a semiconductor device is provided to increase yield and to improve reliability of a device operation by using a hard mask and a metal spacer during a contact hole forming process. A first interlayer dielectric(30), a lower conductive wire(32), a second interlayer dielectric(34), and a hard mask layer(36) are sequentially formed on a semiconductor substrate having a predetermined lower structure. The hard mask layer is selectively etched by using a contact mask to form a hard mask layer pattern exposing the second interlayer dielectric. A metal spacer(40) is formed on a sidewall of the hard mask layer pattern. The exposed second interlayer dielectric is etched by using the hard mask layer pattern and the metal spacer as masks to form a second contact hole(41) exposing the lower conductive wire.

Description

Manufacturing method of semiconductor device

1A to 1E are manufacturing process diagrams of a semiconductor device according to a first embodiment of the present invention.

2A to 2F are manufacturing process diagrams of a semiconductor device according to a second embodiment of the present invention.

         <Explanation of symbols for the main parts of the drawings>

10, 30: first interlayer insulating film 12, 32: lower conductive wiring

14, 34: second interlayer insulating film 16, 36: hard mask layer

18, 38: photosensitive film 19, 39: the first contact hole

20, 40: metal layer 21, 41: second contact hole

42: boron containing layer 44: tungsten layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device capable of effectively and efficiently forming a fine and high aspect ratio contact hole using a hard mask and a spacer.

The recent trend of high integration of semiconductor devices has been greatly influenced by the development of fine pattern formation technology, and the miniaturization of photoresist patterns, which are widely used as masks such as etching or ion implantation processes, are essential in the manufacturing process of semiconductor devices.

Since the resolution (R) of the photosensitive film pattern is proportional to the light source wavelength (λ) of the reduced exposure apparatus used, the wavelength of the light source is reduced to improve the light resolution of the reduced exposure apparatus. The method of using a C, method of forming a separate thin film on the wafer which can improve the image contrast, the CEL method, the three-layer resist method or the silicide method have been developed and the resolution limit Is lowering.

In addition, the contact hole connecting the upper and lower conductive wirings has a larger design rule than the line / space pattern. As the device is highly integrated, the size of the device and the distance between the peripheral wirings are reduced, and the ratio of the diameter and depth of the contact hole is reduced. The aspect ratio increases. Therefore, in a highly integrated semiconductor device having multiple conductive wirings, accurate and tight alignment between masks in a manufacturing process is required to form a contact, thereby reducing process margin.

These contact holes can be used for misalignment tolerance during mask alignment, lens distortion during exposure, critical dimension variation during mask fabrication and photolithography, Since the mask must be formed in consideration of factors such as registration between the masks, the process margin is further reduced to prevent high integration of the device.

In the method of manufacturing a semiconductor device according to the prior art, in order to form a semiconductor device of 100 nm or less, it is difficult to form a pattern using existing KrF equipment, and expensive ArF equipment should be used. For this reason, ArF equipment should be used when forming the contact hole connecting the upper wiring, and a suitable photoresist should be used. Therefore, manufacturing and manufacturing cost will be increased. Furthermore, ArF photoresist should be applied thinner than other photosensitive agents such as KrF. When the upper portion of the contact is etched there is a problem such as a pattern failure occurs.

The present invention is to solve the above problems, an object of the present invention to provide a method for manufacturing a semiconductor device capable of easily forming a fine contact hole with excellent reproducibility using existing equipment and photosensitive agent.

Features of the semiconductor device manufacturing method according to the present invention for achieving the above object,

Sequentially forming a first interlayer insulating film, a lower conductive wiring, a second interlayer insulating film, and a hard mask layer on a semiconductor substrate having a predetermined lower structure;

Selectively etching the hard mask layer with a contact mask to form a hard mask layer pattern exposing the second interlayer insulating film;

Forming a metal spacer on sidewalls of the hard mask layer pattern;

And etching the second interlayer insulating film exposing the hard mask layer pattern and the spacer with a mask to form a second contact hole exposing the lower conductive wiring.

In another aspect of the present invention, the hard mask layer is formed of a nitride film, a polycrystalline silicon layer or a metal material, and when the hard mask layer is formed of a metal layer, the hard mask layer is etched by applying a cathode bias to the substrate surface, and the metal layer and the spacer The TiN, TaN, W or WN is formed by physical vapor deposition, chemical vapor deposition or atomic layer deposition method, the spacer is formed by anisotropically etching the metal layer formed to a thickness of 10 to 200Å, the hard mask layer is a metal layer When formed as is characterized in that it comprises a step of soaking with B2H6 after forming the second contact hole.

Hereinafter, a method of manufacturing a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

1A to 1E are manufacturing process diagrams of a semiconductor device according to a first embodiment of the present invention.

Referring to FIG. 1A, a first interlayer insulating film 10, a lower conductive wiring 12, a second interlayer insulating film 14, and a hard mask layer 16 are formed on a semiconductor substrate (not shown) such as a wafer having a predetermined structure. And the photosensitive film 18 are sequentially formed. The hard mask layer 16 is formed of a material having a large difference in etching selectivity from the second interlayer insulating layer 14, for example, a nitride film or a polysilicon material.

Referring to FIG. 1B, the photoresist layer 18 is selectively exposed using a contact exposure mask and developed to form a photoresist layer 18 pattern exposing the hard mask layer 16. The first contact hole 19 is formed by etching the 16, and the remaining photoresist layer 18 pattern is removed.

Referring to FIG. 1C, the spacer metal layer 20 is formed on the entire surface of the structure, but is made of TiN, TaN, W, or WN material by physical vapor deposition, chemical vapor deposition, or atomic layer deposition. Form to the thickness of about.

Referring to FIG. 1D, the metal layer 20 is anisotropically etched to form a spacer having a metal layer 20 pattern on sidewalls of the hard mask layer 16 pattern of the first contact hole 19.

Referring to FIG. 1E, the second contact hole exposing the lower conductive wiring 12 by etching the second interlayer insulating layer 14 by using the pattern of the metal layer 20 pattern spacer and the hard mask layer 16 as a mask ( 21), the metal layer 20 pattern and the hard mask layer 16 pattern are removed.

As such, the contact hole 21 having a reduced size by the thickness of the spacer of the metal layer 20 may be obtained.

2A to 2F are manufacturing process diagrams of a semiconductor device according to a second embodiment of the present invention.

Referring to FIG. 2A, a first interlayer insulating film 30, a lower conductive wiring 32, a second interlayer insulating film 34, and a hard mask layer 36 are formed on a semiconductor substrate (not shown), such as a silicon wafer having a predetermined structure. ) And the photoresist film 38 are sequentially formed, wherein the hard mask layer 36 is a metal material having a large difference in etching selectivity from the second interlayer insulating film 34, for example, TiN, TaN, W, or WN. The material is formed by physical vapor deposition, chemical vapor deposition or atomic layer deposition.

Referring to FIG. 2B, the photoresist layer 38 is selectively exposed using a contact exposure mask, and then developed to form a photoresist layer 38 pattern exposing the hard mask layer 36 to form the photoresist layer 38 pattern. The hard mask layer 36 exposed as a mask is etched to form a first contact hole 39, and the remaining photoresist 38 pattern is removed.

Referring to FIG. 2C, the spacer metal layer 40 is formed on the entire surface of the structure, and is formed of TiN, TaN, W, or WN material, by chemical vapor deposition or atomic layer deposition, to a thickness of about 10 to 200 μm. If necessary, the same material as that of the hard mask layer 36 may be formed.

Referring to FIG. 2D, anisotropic etching of the metal layer 40 is performed to form spacers having the metal layer 40 pattern on sidewalls of the hard mask layer 36 pattern of the first contact hole 39. 40. The second interlayer insulating layer 34 is etched using the pattern spacer and the hard mask layer 36 as a mask to form a second contact hole 41 exposing the lower conductive wiring 32.

As such, the contact hole 41 having a size reduced by twice the thickness of the spacer of the metal layer 40 can be obtained, thereby stably forming a micro contact having a size smaller than the minimum size that can be obtained with the equipment even with relatively low-cost equipment. Can be.

In addition, since the hard mask layer 36 is formed of a metal layer, when the cathode bias is applied to the surface of the substrate, the etchant ions have a straightness to prevent the bowing generated when forming the contact hole having a high aspect ratio.

Referring to FIG. 2E, when the substrate of the structure is mounted on a tungsten deposition equipment and then soaked with B2H6, a storage containing layer 42 is formed on the entire surface of the structure by soaking, thereby forming a separate layer. The second contact hole 41 can be buried in tungsten without forming the barrier metal layer. In addition, since a metal layer such as TiN is formed on both sides of the upper surface of the second contact hole 41, even if there is no barrier metal layer, the phenomenon of lifting due to tungsten stress does not occur.

Referring to FIG. 2F, a tungsten layer 44 is formed on the entire surface of the structure to fill the second contact hole 41. Here, the tungsten layer 44 is deposited by atomic layer deposition, but a similar atomic layer deposition method including some of the chemical vapor deposition characteristics by using the WF6 / SiH4 gas as the base gas, 0.1mTorr to 500 Torr pressure conditions at 200 to 500 ℃ To be carried out in

As described above, in the method of manufacturing a semiconductor device according to the present invention, since the fine contact hole is formed by using the hard mask layer and the metal spacer in the process of forming the contact hole by etching the interlayer insulating film, the size is below the resolution limit of the equipment. It is possible to stably form the fine contact hole of the metal layer, and if the hard mask layer is formed of a metal layer, a metal conductive layer can be formed without a separate barrier metal layer, which simplifies the process and prevents the bowing phenomenon. There is an advantage that can improve the reliability of the operation.

Claims (6)

Sequentially forming a first interlayer insulating film, a lower conductive wiring, a second interlayer insulating film, and a hard mask layer on a semiconductor substrate having a predetermined lower structure; Selectively etching the hard mask layer with a contact mask to form a hard mask layer pattern exposing the second interlayer insulating film; Forming a metal spacer on sidewalls of the hard mask layer pattern; And etching a second interlayer insulating film exposing the hard mask layer pattern and the spacer using a mask to form a second contact hole exposing a lower conductive wiring. The method of claim 1, wherein the hard mask layer is formed of a nitride film, a polycrystalline silicon layer, or a metal material. The method of claim 2, wherein when the hard mask layer is formed of a metal layer, the hard mask layer is etched by applying a cathode bias to a surface of the substrate. The semiconductor device according to claim 2, wherein the metal layer is one material selected from the group consisting of TiN, TaN, W, and WN, and is formed by physical vapor deposition, chemical vapor deposition, or atomic layer deposition. Manufacturing method. The semiconductor device of claim 1, wherein the spacer is formed of one material selected from the group consisting of TiN, TaN, W, and WN, and is formed by anisotropically etching a metal layer having a thickness of about 10 to about 200 microns. Manufacturing method. 3. The method of claim 2, further comprising the step of soaking with B2H6 after forming the second contact hole when the hard mask layer is formed of a metal layer.

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