KR20060019807A - Driving method of plasma display panel - Google Patents

Abstract

According to an embodiment of the present invention, first and second address electrodes, first and second electrodes intersecting the address electrodes, a phosphor having positive charge characteristics on the first address electrodes, and the second address are provided. A plasma display panel having a phosphor having negative charge characteristics on electrodes, wherein the gray scale is represented by a combination of subfields consisting of a reset section, an address section, and a sustain discharge section, wherein the sustain discharge section includes: When a sustain pulse is alternately applied to the first and second electrodes, and when at least one of the sustain pulses is applied, a first bias pulse is applied to the first address electrodes and then the second address electrodes. The present invention provides a plasma display panel driving method in which a second bias pulse is applied.

According to the present invention, the sustain discharge of uniform luminance can occur in discharge cells of all colors regardless of the types of red light emitting phosphors, green light emitting phosphors, and blue light emitting phosphors having different charge characteristics, so that image quality of the display screen is improved. .

Description

Driving method of plasma display panel

1 is a plan view briefly showing an electrode arrangement of a plasma display panel.

2 is a timing diagram illustrating a conventional address-display separation driving method for Y electrode lines of a plasma display panel.

3 is a timing diagram for explaining an example of a drive signal of a plasma display panel.

4 is a cross-sectional view showing a wall charge state in a discharge cell during sustain discharge in the timing diagram of FIG.

5 is a cross-sectional view showing a wall charge state in a discharge cell during sustain discharge in the plasma display panel driving method according to the present invention.

6A is a diagram showing the structure of a conventional plasma display panel.

6B shows a driving device of a plasma display panel according to the present invention.

7 is a timing diagram illustrating a driving signal of a plasma display panel according to an exemplary embodiment of the present invention.                 

8 is a timing diagram illustrating a driving signal of a plasma display panel according to an exemplary embodiment of the present invention.

9 is a timing diagram illustrating a driving signal of a plasma display panel according to an exemplary embodiment of the present invention.

10 is a timing diagram illustrating a driving signal of a plasma display panel according to an embodiment of the present invention.

11 is a timing diagram illustrating a driving signal of a plasma display panel according to an exemplary embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

AR: Red light emitting address electrode line

AG: Green line address electrode line

AB: Address electrode line for blue light emission

112R: Red Light Emitting Phosphor

112G: Green Light Emitting Phosphor

112B: Blue light emitting phosphor

Vas: bias pulse applied to the second address electrode line

PR: reset period

PA: address period

PS: Maintenance discharge period                 

ts1, ts3, ts5, ... ts _2p-1 : Rise start time of holding pulse

ts2, ts4, ts6, ... ts _2p : Retention time of holding voltage of holding pulse

The present invention relates to a plasma display panel driving method for displaying a screen by applying a discharge pulse to an electrode structure forming a display cell coated with color phosphors such as a plasma display panel (PDP), and more particularly, a positive charge characteristic. The present invention relates to a plasma display panel driving method for differently applying a pulse for driving a cell coated with a phosphor having a phosphor and a cell coated with a phosphor having a negative charge characteristic.

1 is a plan view briefly showing an electrode arrangement of a plasma display panel. Referring to FIG. 1, scan electrode lines Y1, Y2, ... Yn and common electrode lines X1, X2, ... Xn are disposed in parallel to the horizontal direction of the plasma display panel (these Collectively referred to as sustain electrode lines), address electrode lines A1 disposed to intersect the scan electrode lines Y1, Y2, ... Yn and the common electrode lines X1, X2, ... Xn. , A2, ... Am). At a portion where the scan electrode lines, the sustain electrode lines, and the address electrode lines A1, A2, ... Am cross each other, a discharge cell Ce is partitioned by a partition wall, and the discharge cell Ce is a plasma. It serves as one pixel of the display panel. In the space of the discharge cell Ce, there are R, G and B phosphors and a plasma forming gas, and wall charges are discharged inside the discharge cell Ce by the voltage applied to each of the scan electrode, the common electrode and the address electrode. Is generated. Plasma is formed from the plasma forming gas by the wall charge, and phosphors of the discharge cells Ce are excited by ultraviolet radiation from the plasma to generate light.

Hereinafter, the scan electrode lines Y1, Y2, ... Yn will be referred to as Y electrode lines, and the common electrode lines X1, X2, ... Xn will be referred to as X electrode lines.

On the other hand, US Patent No. 5,541, 618 discloses an address-display separation driving method which is mainly used as a driving method of a plasma display panel. 2 shows a conventional address-display separation driving method for Y electrode lines of a plasma display panel.

Referring to the drawings, a unit frame may be divided into a predetermined number, for example, eight subfields SF1, ..., SF8 to realize time division gray scale display. Each subfield SF1, ..., SF8 is divided into a reset section (not shown), an address section A1, ..., A8, and a sustain discharge section S1, ..., S8. do.

In each address section A1, ..., A8, a display data signal is applied to the address electrode lines AR1, AG1, ..., AGm, ABm in FIG. Scan pulses corresponding to..., Yn) are sequentially applied.

In each sustain discharge section S1, ..., S8, pulses for display discharge alternately in the Y electrode lines Y1, ..., Yn and the X electrode lines X1, ..., Xn. Is applied to cause display discharge in discharge cells in which wall charges are formed in the address periods A1, ..., A8.                         

The luminance of the plasma display panel is proportional to the number of sustain discharge pulses in the sustain discharge sections S1, ..., S8 occupied in the unit frame. When one frame forming one image is represented by eight subfields and 256 gray levels, each subfield is sequentially held at a ratio of 1, 2, 4, 8, 16, 32, 64, and 128 in order. The number of pulses can be assigned. In order to obtain luminance of 133 gray levels, cells may be addressed and sustained and discharged during the subfield 1 period, the subfield 3 period, and the subfield 8 period.

The number of sustain discharges allocated to each subfield may be variably determined according to the weights of the subfields according to the APC (Automatic Power Control) step. The number of sustain discharges allocated to each subfield can be variously modified in consideration of gamma characteristics and panel characteristics. For example, the gradation level assigned to subfield 4 may be lowered from 8 to 6, and the gradation level assigned to subfield 6 may be increased from 32 to 34. In addition, the number of subfields forming one frame can be variously modified according to design specifications.

FIG. 3 is a timing diagram illustrating an example of a driving signal of a plasma display panel, and includes an address electrode A, a common electrode X, and a scan electrode Y1 to one subfield SF in an ADS driving method of an AC PDP. Yn) indicates a drive signal applied to the device. Referring to FIG. 3, one subfield SF includes a reset period PR, an address period PA, and a sustain discharge period PS.

The reset period PR initializes the wall charge state of all cells by applying reset pulses to the scan lines of all groups and forcibly performing a write discharge. The reset period PR is performed before entering the address period PA, which is carried out over the entire screen, so that the wall charge arrangement of the desired distribution can be made fairly even. The cells initialized by the reset period PR have similar wall charge conditions in the cells.

The address period PA is performed after the reset period PR is performed. At this time, in the address period PA, the bias voltage Ve is applied to the common electrode X, and the scan electrodes Y1 to Yn and the address electrodes A1 to Am are simultaneously turned on at the cell positions to be displayed. Select the display cell. In the address period PA, a negative scan pulse is applied to the scan electrodes Y1 to Yn, and an address data voltage Va is applied to the address electrodes A1 to Am to generate an address discharge.

After the address period PA is performed, the sustain pulse Vs is alternately applied to the common electrodes X and the scan electrodes Y1 to Yn to perform the sustain discharge period PS. The display cells are selected by the wall charge distribution formed by the address discharge (which accumulates a large amount of negative charge near the scanning electrode), thereby generating sustain discharge. In the sustain discharge, the phosphor applied on the address electrode is excited by ultraviolet radiation formed by the discharge between the scan electrode and the common electrode to emit light. During the sustain discharge period PS, a low level voltage VG is applied to the address electrodes A1 to Am. In PDP, the brightness is adjusted by the number of sustain discharge pulses. If the number of sustain discharge pulses in one subfield or one TV field is large, the luminance increases.

On the other hand, a bias pulse may be applied to the address electrode in order to prevent damage to the phosphor due to ions hitting the phosphor during the sustain discharge generated between the Y electrode and the X electrode, and to enhance the sustain discharge.

However, among the phosphors applied on the address electrode, a red phosphor (for example, (Y, Gd) BO ₃ : Eu), which is commonly employed, has a positive charge property and has a blue phosphor (eg For example, BaMgAl ₁₀ O ₁₇ : Eu has a weak positive charge property, whereas a green phosphor (eg, Zn ₂ SiO ₄ : Mn) has a negative charge property having negative charge characteristics. In the discharge cell through which the address electrode coated with the phosphor having negative charge characteristics passes, the discharge starts later than the discharge cell through which the address electrode coated with the phosphor having no negative charge characteristics or passed by the phosphor having positive charge characteristics passes. The reason is that the negatively charged phosphor weakens the magnitude of the bias pulse or attracts positive charges, thereby preventing the sustain discharge occurring between the Y electrode and the X electrode, and thus the sustain pulse applied to the Y electrode lines or the X electrode lines. During the rise time, the discharge starts later in the period when a higher voltage is applied. Therefore, the discharge current generation time actually measured is, as shown in FIG. 8, the discharge of the green light emitting cell than the discharge time I _R of the red light emitting cell and the generation time tc1 of the discharge current I _B of the blue light emitting cell. The generation time tc2 of the current I _G is delayed.

For example, the discharge current I _R of the red light emitting cell and the discharge current I _B of the blue light emitting cell are generated at approximately 400 to 600 nsec from the start time of applying the sustain pulse t1, and the discharge current of the green light emitting cell. (I _G ) occurs approximately 800 to 1000 nsec from the start time of application (t1).

Therefore, the timing of applying the bias pulse to the address electrode lines and the timing of occurrence of the sustain discharge in the red, blue, and green light emitting cells are different, thereby causing different light emission luminances for each color. For this problem, the operation of increasing the weight of the subfields of the green light emitting cells for all the screens is very complicated, causing a heavy burden on the logic control unit and an increase in manufacturing cost. Accordingly, there is a demand for a driving method capable of solving the problem of relatively low discharge occurring with respect to the green light emitting cells and selectively increasing the luminance with respect to the green light emitting cells.

The technical problem to be solved by the present invention is to solve the prior art and other various problems, the object of the present invention is to maintain each discharge discharge in the light emitting cell having a phosphor having a negative charge characteristics and the light emitting cell having a phosphor having a positive charge characteristics The present invention provides a plasma display panel driving method capable of outputting a screen of uniform luminance in all light emitting cells regardless of the characteristics of a phosphor by synchronizing the time of occurrence of the signal with the time of applying the address bias pulse.

Another object of the present invention is to provide a plasma display panel driving method for outputting a screen of uniform luminance in all light emitting cells regardless of color, for a plasma display panel having light emitting cells coated with phosphors of various colors. will be.

The present invention to achieve the above technical problem,

First address electrodes and second address electrodes, first and second electrodes intersecting the address electrodes, phosphors having positive charge characteristics on the first address electrodes, and on the second address electrodes. In a plasma display panel having a phosphor having negative charge characteristics in the display panel driving method, the gray scale is expressed by a combination of subfields consisting of a reset section, an address section, and a sustain discharge section.

In the sustain discharge section, a sustain pulse is alternately applied to the first and second electrodes,

When at least one of the sustain pulses is applied, a first bias pulse is applied to the first address electrodes, and then a second bias pulse is applied to the second address electrodes.

The first bias pulse applied to the first address electrodes and the second bias pulse applied to the second address electrodes may include a first time when the sustain pulse starts rising and a second time when the sustain pulse reaches the sustain voltage. It is preferable to apply between time.

The first bias pulse applied to the first address electrodes and the second bias pulse applied to the second address electrodes are applied when at least one of the sustain pulses of the sustain discharge section is applied. Can be maintained after.

In another embodiment, when at least one of the sustain pulses of the sustain discharge section is applied, the first bias pulse and the second bias pulse are applied to the first address electrodes and the second address electrodes, respectively. The first bias pulse and the second bias pulse may be terminated before the sustain pulse ends.

In addition, the phosphors having positive charge characteristics on the first address electrodes may be red light emitting phosphors and blue light emitting phosphors, and the phosphors having negative property on the second address electrodes may be blue light emitting phosphors.

On the other hand, the methods can be realized through a computer by means of a recording medium which records a program for execution on the computer.

Hereinafter, the configuration and operation of a plasma display panel driving method according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

In the plasma display panel driving method according to the present invention, in a sustain discharge section, an address bias pulse applied to a light emitting cell having a green light emitting phosphor having a negative charge characteristic is a light emitting cell having a red light emitting substance having a positive charge characteristic and a blue light emitting phosphor. By applying later than the address bias pulse applied to the signal, the timing of generating each sustaining pulse and the timing of applying the address bias pulse are synchronized, thereby outputting a screen of uniform brightness in all light emitting cells regardless of the characteristics of the phosphor. A plasma display panel driving method is provided.

4 is a cross-sectional view showing a wall charge state in a discharge cell during sustain discharge in the timing diagram of FIG. 3 according to a conventional driving method, and FIG. 5 is a plasma display panel driving method according to the present invention. It is sectional drawing which shows wall charge state.

In FIG. 4, in the selected cell, positive charges are accumulated on the Y electrode, and when a sustain pulse is applied to the Y electrode line, the positive charges are emitted toward the X electrode to generate negative charges and discharges accumulated on the X electrode. However, a part of the positive charges discharged from the Y electrode converge toward the address electrode having a relatively low voltage and accumulate near the address electrode (that is, the dielectric on the address electrode). As a result, the phosphor on the address electrode is damaged by ion bombardment. In addition, due to the positive charge accumulated on the address electrode, a potential difference occurs between the Y electrode and the address electrode, and a potential difference occurs between the X electrode and the address electrode, which may cause a weakening of the sustain discharge between the Y electrode and the X electrode.

In Fig. 5, according to the present invention, a short bias pulse Vas is selectively applied only to the blue light emitting address electrode lines AB (A3, A6, ..., Am) at the moment when the sustain pulse is applied to the Y electrode. The cross section in the case of doing is shown. The bias pulse Vas is applied to the blue light-emitting address electrode lines AB (A3, A6, ..., Am) at the moment when the sustain pulse is applied to the Y electrode line. Therefore, a part of the positive charges discharged from the Y electrode do not converge toward the address electrode, so that the phosphor on the address electrode can be protected from ion bombardment, and a sustain discharge showing high luminance can occur.

In particular, when a short bias pulse Vas is applied to the address electrode line at the moment when the sustain pulse is applied to the Y electrode line, a small amount of positive charge emitted from the address electrode induces the positive discharge emitted from the Y electrode toward the X electrode. It will help you to get started. As a result, high luminance light emission may be performed in a cell to which a short bias pulse Vas is applied.

On the other hand, Japanese Laid-Open Patent Publication No. 1999-120924 discloses a structure of a conventional plasma display panel. Referring to FIG. 6A, between the front and rear glass substrates 100 and 106 of the conventional surface discharge plasma display panel 1, the address electrode lines A ₁ , A _{2 ,.} , Dielectric layers 102 and 110, Y electrode lines Y ₁ , ..., Y _n , X electrode lines X ₁ , ..., X _n , fluorescent layer 112, partition wall 114 And a magnesium monoxide (MgO) layer 104 is provided as a protective layer, for example. The Y electrode lines Y ₁ , ..., Y _n and the X electrode lines X ₁ , ..., X _n are collectively referred to as 'holding electrode lines', and the Y electrode lines Y ₁ ,. ..., Y _n ) are also referred to as scan electrode lines, and X electrode lines X ₁ , ..., X _n are also referred to as common electrode lines.

The address electrode lines A ₁ , A ₂ ,..., A _m are formed in a predetermined pattern on the front side of the rear glass substrate 106. The lower dielectric layer 110 is applied in front of the address electrode lines A ₁ , A ₂ ,..., A _m . In front of the lower dielectric layer 110, barrier ribs 114 are formed in a direction parallel to the address electrode lines A ₁ , A ₂ ,..., A _m . The partition walls 114 function to partition the discharge area of each display cell and to prevent optical interference between the display cells. The fluorescent layers 112R, 112G and 112B are applied in front of the dielectric layer 110 on the address electrode lines A ₁ , A ₂ ,..., A _m between the partition walls 114, and sequentially red fluorescent light. The layer 112R, the green fluorescent layer 112G, and the blue fluorescent layer 112B are disposed.

Among the phosphors constituting the phosphor layer 112 on the address electrode lines A ₁ , A ₂ ,..., A _m , a red phosphor 112R typically employed; for example, (Y, Gd) BO ₃ : Eu ) Has a positively positive polarity and the blue phosphor 112G (eg, BaMgAl ₁₀ O ₁₇ : Eu) has weak positive charge characteristics, while the green phosphor 112B (eg, Zn ₂₎ SiO ₄ : Mn) has a negative polarity with a negative charge.

The X electrode lines X ₁ , ..., X _n and the Y electrode lines Y ₁ , ..., Y _n are address electrode lines A ₁ , A ₂ , ..., A _m . It is formed in a predetermined pattern on the back of the front glass substrate 100 to be orthogonal to the. Each intersection sets a corresponding display cell. Each X electrode line (X ₁ , ..., X _n ) and each Y electrode line (Y ₁ , ..., Y _n ) are transparent electrode lines (X _na ) made of a transparent conductive material such as indium tin oxide (ITO). , Y _na ) and metal electrode lines X _nb and Y _nb for increasing conductivity may be formed. The front dielectric layer 102 is formed by applying the entire surface to the rear of the X electrode lines (X ₁ ,..., X _n ) and the Y electrode lines (Y ₁ ,..., Y _n ). A protective layer 104 for protecting the panel 1 from a strong electric field, for example, a magnesium monoxide (MgO) layer, is formed by applying a front surface to the back of the front dielectric layer 102. The plasma forming gas is sealed in the discharge space 108.

A driving scheme generally applied to the plasma display panel is a scheme in which initialization, address, and display holding steps are sequentially performed in the unit sub-field. In the initialization step, the charge states of the display cells to be driven are made uniform. In the address step, the charge state of display cells to be selected and the charge state of display cells not to be selected are set. In the display holding step, display discharge is performed in the display cells to be selected. At this time, a plasma is formed from the plasma forming gas of the display cells which perform the display discharge, and the fluorescent layers of the display cells are excited by ultraviolet radiation from the plasma to generate light.

It should be noted that the plasma display panel driving method according to the present invention is not limited to the plasma display panel having the above structure, and can be applied to the plasma display panel driven by all driving waveforms having a reset period.

6B is a block diagram illustrating a general driving device of the plasma display panel.

Referring to the drawings, a typical driving apparatus of the plasma display panel includes an image processor 200, a logic controller 202, an address driver 206, an X driver 208, and a Y driver 204. The image processing unit 200 converts an external analog image signal into a digital signal, and internal image signals, for example, 8-bit red (R), green (G) and blue (B) image data, clock signals, vertical and horizontal, respectively. Generate synchronization signals. The logic controller 202 generates the drive control signals SA, SY, and SX according to the internal image signal from the image processor 200. The address driver 206 processes the address signal SA among the drive control signals SA, SY, and SX from the controller 202 to generate a display data signal, and generates the display data signal through the address electrode lines. To apply. The X driver 208 processes the X driving control signal SX among the driving control signals SA, SY, and SX from the controller 202 and applies the X driving control signal SX to the X electrode lines. The Y driver 204 processes the Y driving control signal SY among the driving control signals SA, SY, and SX from the controller 202 and applies it to the Y electrode lines.

7 is a timing diagram illustrating a driving signal of a plasma display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 7, in the reset period PR, reset pulses are applied to the scan lines of all groups to force write discharge, thereby initializing wall charge states of all cells. The reset period PR is carried out before entering the address period PA, which is carried out over the entire screen, thus making it possible to create a fairly even and evenly distributed wall charge arrangement. The cells initialized by the reset period PR have similar wall charge conditions inside the cells.

The address period PA is performed after the reset period PR is performed. At this time, in the address period PA, address data is applied to the address electrode lines A1, A2, ..., Am, and sequentially to the Y electrode lines Y1, Y2, ..., Yn. The scan pulse of the scan low voltage V _SC-L is applied at the scan high voltage V _{SC -H} . That is, address discharge occurs by simultaneously turning on the Y electrode lines Y1, Y2, ..., Yn and the address electrode lines A1, A2, ..., Am at the cell position to be displayed. The cell is selected. In the address period PA, the address discharge is the scan low level voltage V _SC-L and Y of the scan pulse applied to the Y electrode at the potential Va due to the display data signal voltage and the positive charge accumulated near the address electrode. This is caused by energy minus the potential due to negative charge accumulated near the electrode (ie, the sum of the absolute values of all potentials).

After the address period PA is performed, the sustain pulse Vs is alternately applied to the X electrode lines X1, X2, ..., Xn and the Y electrode lines Y1, Y2, ..., Yn. Upon application, the sustain discharge period PS is performed. During the sustain discharge period PS, a voltage V _G having a low level (ground potential) is applied to the address electrodes A1, A2, ..., Am. In PDP, the brightness is adjusted by the number of sustain discharge pulses. If the number of sustain discharge pulses in one subfield or one TV field is large, the luminance increases.

The operation in the sustain discharge section PS is as follows.

At the time when the first sustain pulse is applied in the sustain discharge period PS, positive charges accumulated in the address period are accumulated on the Y electrode lines and negative charges are accumulated on the X electrode lines. When the sustain voltage Vs is applied to the Y electrode lines, positive charges are discharged in the Y electrode lines and negative charges are discharged into space charges in the X electrode lines, thereby performing primary sustain discharge. This primary sustain discharge is characterized by the difference between the sum of the positive charge and the Vs voltage accumulated near the Y electrode lines and the negative charge (ie the sum of the absolute values of all potential values) accumulated near the X electrode lines. It is done while exceeding. When the primary sustain discharge occurs, negative charges accumulate near the Y electrode lines and positive charges accumulate near the X electrode lines.

After the primary sustain discharge has occurred, when the sustain voltage Vs is applied to the X electrode lines X1, X2, ..., Xn, positive charges start to be discharged into the space charges on the X electrodes and negative charges on the Y electrodes. Is discharged into the space charge to perform the secondary sustain discharge. This secondary oil field charge has a negative charge accumulated near the scan electrodes from the voltage due to the Vs applied to the X electrode lines X1, X2, ..., Xn and the potential due to the positive charge accumulated near the X electrodes. The value obtained by subtracting the potential (ie, the sum of the absolute values of all potential values) is made while exceeding the discharge start voltage. When the primary sustain discharge occurs, positive charges accumulate near the Y electrodes, just as before the primary sustain discharge, and negative charges accumulate near the X electrodes. After that, the third sustain discharge occurs by the same action as the first sustain discharge, and then the fourth sustain discharge occurs by the same action as the second sustain discharge. Alternate sustain pulses are maintained for a predetermined time for each subfield, and such sustain discharge is continued.

In the plasma display panel driving method according to the present invention, as in the driving waveforms applied to the address electrode lines of FIG. 7, ions collide with the phosphor during the sustain discharge generated between the Y electrode and the X electrode, thereby preventing the phosphor from being damaged. In order to enhance sustain discharge, a bias pulse may be applied to the address electrode lines A1, A2,..., Am.

However, red phosphors (for example, (Y, Gd) BO ₃ : Eu) commonly employed among the phosphors applied on the address electrode have positively charged anode properties and blue phosphors (eg, For example, BaMgAl ₁₀ O ₁₇ : Eu has weak positive charge characteristics, whereas green phosphor (eg, Zn ₂ SiO ₄ : Mn) has negative charge characteristics with negative charge characteristics.

In the discharge cell through which the address electrode coated with the phosphor having negative charge characteristics passes, the discharge starts later than the discharge cell through which the address electrode coated with the phosphor having no negative charge characteristics or the positive electrode has passed. The reason is that the negatively charged phosphor weakens the magnitude of the bias pulse or attracts positive charges, thereby preventing the sustain discharge occurring between the Y electrode and the X electrode, and thus the sustain pulse applied to the Y electrode lines or the X electrode lines. During the rise time, the discharge starts later in the period when a higher voltage is applied. Therefore, the discharge current generation time actually measured is, as shown in FIG. 8, the discharge of the green light emitting cell than the discharge time I _R of the red light emitting cell and the generation time tc1 of the discharge current I _B of the blue light emitting cell. The generation time tc2 of the current I _G is delayed.

For example, the discharge current I _R of the red light emitting cell and the discharge current I _B of the blue light emitting cell are generated at approximately 400 to 600 nsec from the start time of applying the sustain pulse t1, and the discharge current of the green light emitting cell. (I _G ) occurs approximately 800 to 1000 nsec from the start time of application (t1).

Therefore, in the plasma display panel driving method according to the present invention, when at least one of the sustain pulses Vs is applied, the red light emitting electrode lines A1, A4, ..., Am-2 and the blue light emitting address are applied. After the address bias pulse is applied to the electrode lines A3, A6, ..., Am, the address bias pulse is applied to the green light emitting address electrode lines A2, A5, ..., Am-1. Let's do it. As a result, the light emitting cell having the phosphor having the negative charge characteristic and the time of applying the address bias pulse to the occurrence of each sustain discharge in the light emitting cell having the phosphor having the positive charge characteristic are all emitted regardless of the characteristics of the phosphor. A screen of uniform brightness may be output from the cell.

In one embodiment, as shown in the sustain discharge section PS of FIG. 7, upon application of the sustain pulse Vs, the red light-emitting address electrode lines AR; A1, A4, ..., Am -2) and the first time ts1 at which the first sustain pulse starts to be applied and the second voltage reaching the sustain voltage Vs at the blue light emitting address electrode lines AB (A3, A6, ..., Am) The bias pulse Vas is applied near the middle of the time ts2, and the first sustain pulse is applied to the green light-emitting address electrode lines AG (A2, A5, ..., Am-1). The bias pulse Vas is applied near the second time ts2 nearly reached.

8 is a timing diagram illustrating a driving signal of a plasma display panel according to an exemplary embodiment of the present invention. FIG. 8 illustrates the sustain pulses applied to the Y electrode lines or the X electrode lines in the sustain period PS, the discharge current generated by the sustain discharge, and the address bias pulse Va at the time of the sustain discharge occurrence. Indicates. 8 shows the waveform of the sustain pulse applied to the Y electrode lines or the X electrode lines. The sustain pulse starts to rise at the first time ts1, reaches the sustain voltage Vs at the second time ts2, and then falls after being maintained for a predetermined time.

As described above, the green light emitting phosphor has a relatively negative charge characteristic compared to the red light emitting phosphor and the blue light emitting phosphor, so that the address bias pulse Vas is relatively weakened. Therefore, the voltage Vc2 at which the sustain discharge is started in the light emitting cell to which the green light emitting phosphor is coated is higher than the voltage Vc1 at which the sustain discharge is started as compared to the light emitting cell to which the red and blue light emitting phosphor is coated.

Therefore, the sustain discharge occurs later in the green discharge cells than in the red and blue discharge cells. In addition, the discharge currents I _R , I _B , and I _G generated by the sustain discharge are also generated when the generation time tc1 of the discharge current I _G generated in the green discharge cells occurs in the red and blue discharge cells. It is later than the generation time tc2 of the discharge currents I _R and I _B.

In the plasma display panel driving method according to the present invention, when the sustain pulse is applied, as shown in the timing diagram shown in the lower part of FIG. 8, the red address electrodes A1, A4,. After the first bias pulse Vas is applied to the fields A3, A6, ..., Am, the second bias pulse Vas is applied to the green address electrodes A2, A5, ..., Am-1. As a result, the bias pulse Vas applied to the address electrodes corresponding to the respective phosphors is synchronized with the occurrence of the sustain discharge according to the characteristics of each phosphor.

According to the experimental example, the discharge currents I _R and I _B generated by the sustain discharge are generated at 400 to 600 nsec from the time when the sustain pulse starts to rise, and the discharge current I _G generated by the sustain discharge is maintained. It occurs at 800 to 1000 nsec from the time when the pulse starts to rise. Therefore, in the embodiment corresponding to the above experimental example, the first bias pulse is substantially applied at 400 to 600 nsec from the time when the sustain pulse starts to rise, and the second bias pulse is started when the sustain pulse starts to rise. It is preferably applied substantially at 400 to 600 nsec from time.

When the address bias pulse Va is synchronized with the occurrence of the sustain discharge, the amount of light generated in the corresponding discharge cell may be maximized. Therefore, according to the plasma display panel driving method according to the present invention, the amount of light of the sustain discharge is equally improved in all the discharge cells regardless of the characteristics of the phosphor.

The address bias pulse Vas need not be applied only for the first sustain pulse Vs. For example, it may be applied at the time when the second sustain pulse is applied as shown in FIG. That is, in one embodiment, as shown in the sustain discharge section PS of FIG. 9, when the sustain pulse Vs is applied, the red light emitting address electrode lines AR (A1, A4, ...). , Am-2) and the blue light-emitting address electrode lines AB; A3, A6, ..., Am have reached the first time ts3 and the sustain voltage Vs at which the second sustain pulse starts to be applied. The bias pulse Vas is applied near the middle time of the second time ts4, and the first sustain pulse is applied to the green light-emitting address electrode lines AG (A2, A5, ..., Am-1). The bias pulse Vas may be applied near the second time ts4 almost reaching Vs.

In addition, although the address bias pulse Vas may be maintained after being applied as shown in FIGS. 7 and 9, the address bias pulse Vas may be applied as short pulses repeated for each sustain pulse Vs as shown in FIG. 10. As short pulses are applied at each application start time of each sustain pulse, luminance due to sustain discharge can be further enhanced.

That is, as shown in FIG. 10, a short address bias pulse Va may be applied when all sustain pulses are applied. In one embodiment, as shown in the sustain discharge section PS of FIG. 10, upon application of the sustain pulse Vs, the red light-emitting address electrode lines AR; A1, A4, ..., Am 2) and the first time ts1, ts3, ts5, ..., 2p- at which the respective sustain pulses are applied to the blue light-emitting address electrode lines AB (A3, A6, ..., Am). 1) and a short bias pulse Vas is applied near the intermediate time between the second time ts2, ts4, ts6, ..., 2p reaching the sustain voltage Vs, and the green light emitting address electrode lines ( AG; A2, A5, ..., Am-1) has a short bias in the vicinity of the second time ts2, ts4, ts6, ..., 2p at which each sustain pulse nearly reaches the sustain voltage Vs. Pulse Vas may be applied.

The short bias pulse Va can exert a large effect even by applying substantially once, and the short bias pulse Va after two times has a smaller effect than the first bias pulse Va. This is because the sustain discharge by the sustain pulse Va at the moment when the short bias pulse Va is applied is most strengthened, and the sustain discharge thereafter is stabilized and the strengthening effect is relatively small.

Therefore, as shown in FIG. 11, the short bias pulse Vas may be applied only at the time points ts1 to ts2 at which the first sustain pulse is applied. In one embodiment, as shown in the sustain discharge section PS of FIG. 11, upon application of the sustain pulse Vs, the red light-emitting address electrode lines AR A1, A4, ..., Am -2) and the first time ts1 at which the first sustain pulse starts to be applied and the second voltage reaching the sustain voltage Vs at the blue light emitting address electrode lines AB (A3, A6, ..., Am) A short bias pulse Vas is applied near the middle of the time ts2, and the first sustain pulse is applied to the green light-emitting address electrode lines AG (A2, A5, ..., Am-1). A short bias pulse Vas may be applied in the vicinity of the second time ts2 almost reached).

Meanwhile, the display panel driving method according to the present invention described above may be embodied as computer readable codes on a computer readable recording medium. Computer-readable recording media include any type of recording device that stores programs or data that can be read by a computer system. Examples of computer-readable recording media include ROM, RAM, CD-ROM, magnetic tape, hard disk, floppy disk, flash memory, optical data storage, and the like. Here, the program stored in the recording medium refers to a series of instruction instructions used directly or indirectly in an apparatus having an information processing capability such as a computer to obtain a specific result. Thus, the term computer is used to mean all devices having an information processing capability for performing a specific function by a program, including a memory, an input / output device, and an arithmetic device, regardless of the name actually used. Even in the case of a device for driving a panel, its use is limited to a specific field of panel driving, and in reality, it is a kind of computer.

In particular, the display panel driving method according to the present invention is an integrated circuit, for example, a field programmable gate array (FPGA), which is prepared by a schematic or ultra high-speed integrated circuit hardware description language (VHDL) on a computer, and connected to a computer. It can be implemented by. The recording medium includes such a programmable integrated circuit.

The best embodiments have been disclosed in the drawings and specification above. Although specific terms have been used herein, they are used only for the purpose of describing the present invention and are not intended to limit the scope of the invention as defined in the meaning or claims. Therefore, those skilled in the art will understand that various modifications and equivalent other embodiments are possible from this. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

As described above, the plasma display panel driving method of the present invention has the following effects.

First, for a light emitting cell coated with a phosphor having a specific charge characteristic, even when a sustain pulse is simultaneously applied to the sustain electrode lines (Y electrode lines and X electrode lines), the time at which the sustain discharge occurs may be different from that of other light emitting cells. have. In this case, by applying an address bias pulse to the light emitting cells of each phosphor in synchronization with the time point at which the sustain discharge occurs, light of high luminance can be collectively output from all light emitting cells regardless of the charge characteristics of the phosphors.

Second, with respect to a plasma display panel including light emitting cells coated with phosphors of various colors, a screen of uniform brightness may be output from all light emitting cells regardless of color.

Third, since the timing of applying the bias pulse applied to the address electrode can be flexibly adjusted according to the type of phosphor, the degree of freedom of the sustain discharge design is improved.

The invention is not limited to the examples described above and represented in the drawings. Those skilled in the art taught by the above-described embodiments, many modifications to the above-described embodiments are possible by substitution, erasure, merging, etc. within the scope and object of the present invention described in the following claims.

Claims (8)

First address electrodes and second address electrodes, first and second electrodes intersecting the address electrodes, phosphors having positive charge characteristics on the first address electrodes, and on the second address electrodes. A display panel driving method in which a gradation is expressed by a combination of subfields consisting of a reset section, an address section, and a sustain discharge section, for a plasma display panel having phosphors having negative charge characteristics in In the sustain discharge section, a sustain pulse is alternately applied to the first and second electrodes, And a second bias pulse is applied to the second address electrodes after the first bias pulse is applied to the first address electrodes when at least one of the sustain pulses is applied. The method of claim 1, The first bias pulse applied to the first address electrodes and the second bias pulse applied to the second address electrodes may include a first time when the sustain pulse starts rising and a second time when the sustain pulse reaches the sustain voltage. Plasma display panel driving method, characterized in that applied over time. The method of claim 1, The first bias pulse applied to the first address electrodes and the second bias pulse applied to the second address electrodes are maintained after being applied when at least one of the sustain pulses of the sustain discharge section is applied. Plasma display panel driving method. The method of claim 1, When at least one of the sustain pulses of the sustain discharge section is applied, the first bias pulse and the second bias pulse are applied to the first address electrodes and the second address electrodes, respectively, and the applied sustain pulse is terminated. And the first bias pulse and the second bias pulse are terminated before. The method of claim 4, wherein When the first sustain pulse of the sustain discharge section is applied, the first bias pulse and the second bias pulse are applied to the first address electrodes and the second address electrodes, respectively, before the first sustain pulse is terminated. And the first bias pulse and the second bias pulse are terminated. The method of claim 1, The phosphor having positive charge characteristics on the first address electrodes is a red light emitting phosphor and a blue emitting phosphor, and the phosphor having a negative property on the second address electrodes is a blue light emitting phosphor. The method of claim 1, The first bias pulse is substantially applied at 400 to 600 nsec from the time when the sustain pulse starts to rise, and the second bias pulse is substantially applied at 400 to 600 nsec from the time when the sustain pulse starts to rise. Plasma display panel driving method characterized in that. A recording medium on which a program for executing the method of any one of claims 1 to 7 is recorded on a computer.

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