KR20050067442A - Aho capacitor and method for making the same - Google Patents

Abstract

The present invention provides an AHO capacitor capable of suppressing an increase in leakage current while reducing an equivalent oxide film thickness, and a method of manufacturing the capacitor. The method of manufacturing the capacitor of the present invention includes forming a lower electrode made of a polysilicon film. Cleaning the lower electrode surface using a solution containing fluorine (F-Last), nitriding the lower electrode surface (plasma treatment with NH ₃ atmosphere), and forming an AHO dielectric layer on the nitrided lower electrode Forming a top electrode of a polysilicon film on the AHO dielectric film, and performing a heat treatment to ensure dielectric properties of the AHO dielectric film. Nitriding the lower electrode surface in situ prior to AHO dielectric film deposition while preventing the formation of chemical oxide by performing the last cleaning process Meurosseo give, by reducing the equivalent oxide film thickness is effective to improve the leakage current characteristics of the capacitor AHO.

Description

A capacitor having a dielectric film in which an aluminum oxide film and a hafnium oxide film are laminated, and a method of manufacturing the same {AHO CAPACITOR AND METHOD FOR MAKING THE SAME}

TECHNICAL FIELD The present invention relates to semiconductor manufacturing technology, and more particularly, to a capacitor and a manufacturing method thereof.

Recently, as the integration of memory products is accelerated due to the development of miniaturized semiconductor processing technology, the unit cell area is greatly reduced, and the operating voltage is being lowered. However, the charging capacity required for the operation of the memory device, despite the reduction in cell area, sufficient capacity of 25 fF / cell or more is continuously required to prevent the occurrence of soft errors and shortening of the refresh time. have. Therefore, in the case of the NO capacitor element for DRAM that uses a silicon nitride film (Si ₃ N ₄ ) deposited using Di-Chloro-Silane (DCS) gas as a dielectric, it has a three-dimensional electrode surface having a hemispherical structure with a large surface area. Despite the use of a form of charge storage electrode, its height continues to increase.

On the other hand, since NO capacitors have shown a limitation in securing the charge capacity required for next-generation DRAM capacitors of 256M or more, development of capacitor devices employing dielectric films having high dielectric constants such as Ta ₂ O ₅ , Al ₂ O ₃ , and HfO ₂ has been difficult. It is progressing in earnest.

However, Al ₂ O ₃ (ε = 8) has a limited dielectric constant, so there is a limitation in securing the charging capacity. HfO ₂ (ε = 20-25) having a relatively high dielectric constant has a low breakdown field strength. Since it is vulnerable to shock, the durability of the capacitor is inferior.

To solve this problem, a capacitor using a stacked structure of HfO ₂ and Al ₂ O ₃ , that is, an AHO (Al ₂ O ₃ / HfO ₂ ) dielectric film, has been proposed.

1 is a view showing an AHO capacitor according to the prior art.

As shown in FIG. 1, the AHO capacitor includes a lower electrode 11 made of a polysilicon film, an AHO dielectric film 12 on the lower electrode 11, and an upper electrode 13 made of a polysilicon film on the AHO dielectric film 12. The AHO capacitor is composed of a silicon insulator silicon (SIS) structure.

However, in the above-described AHO capacitor of the SIS structure of the prior art, since the lower electrode 11 is formed of a polysilicon film, the SC is cleaned after FN [HF or BOE (HF + NH ₄ F) cleaning before deposition of the AHO dielectric film 12. -1 (NH ₄ OH: H ₂ O ₂ : H ₂ O) Cleaning] Undesired chemical oxides are formed by the cleaning, and the lower electrode 11 is deposited when the AHO dielectric film 12 is deposited. Surface oxidation occurs and there is a problem in that a silicon oxide film (SiO ₂ ) having a thickness of 10 kV to 20 kV is formed between the AHO dielectric film 12 and the lower electrode 11. Here, when a low dielectric layer such as a silicon oxide film (SiO ₂ ) is formed between the AHO dielectric film 12 and the lower electrode 11, the equivalent oxide thickness (Tox) of the AHO capacitor increases to increase the leakage current. There is. In general, the equivalent oxide film thickness (Tox) is a value obtained by converting a dielectric film formed from a dielectric film other than a silicon oxide film into the thickness of a dielectric film formed from a silicon oxide film, and the lower the value, the higher the capacitance.

The present invention has been made to solve the above problems of the prior art, and an object thereof is to provide an AHO capacitor capable of suppressing an increase in leakage current while reducing an equivalent oxide film thickness and a method of manufacturing the same.

The capacitor of the present invention for achieving the above object is a lower electrode made of a polysilicon film, an oxide film formed on the surface of the lower electrode, an AHO dielectric film formed on the antioxidant film, and an upper electrode made of a polysilicon film on the AHO dielectric film It characterized in that it comprises a, wherein the antioxidant film is characterized in that the silicon nitride film nitrided the lower electrode surface.

In addition, the method of manufacturing a capacitor of the present invention includes the steps of forming a lower electrode made of a polysilicon film, cleaning the lower electrode surface using a solution containing fluorine, nitriding the lower electrode surface, and nitriding the nitride electrode. Forming an AHO dielectric film on the treated lower electrode, forming an upper electrode made of a polysilicon film on the AHO dielectric film, and performing a heat treatment to secure dielectric properties of the AHO dielectric film. The cleaning step is characterized in that the progress using a HF solution, the cleaning step is performed by mixing the cleaning using the SC-1 solution and the HF solution, the cleaning using the HF solution And finally, the nitriding step is the lower electrode by plasma treatment in the NH ₃ atmosphere A silicon nitride film is formed on the surface.

Hereinafter, the most preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. .

2 is a structural diagram of a semiconductor memory device having an AHO capacitor according to an embodiment of the present invention.

As shown in FIG. 2, the junction region 23 is formed in the semiconductor substrate 31 on which the field oxide film 22 is formed, and the interlayer insulating film 24 and the storage node stop nitride film 25 are formed on the semiconductor substrate 21. And a stacked film of the storage node buffer oxide film 26.

In addition, the storage node contact plug 27 connected to the junction region is buried in the storage node contact hole in which the junction layer 23 is exposed by etching the stacked layer, and a hole exposing the surface of the storage node contact plug 27 ( A capacitor oxide film 28 having 30 is formed.

 An AHO dielectric layer 33 formed on the capacitor oxide layer 28 including the lower electrode 31 and the lower electrode 31 of the polysilicon layer formed in the hole 30 and connected to the storage node contact plug 27, and And an upper electrode 34 made of a polysilicon film on the AHO dielectric film 33.

In FIG. 2, a silicon nitride film 32 formed by nitriding is formed on the surface of the lower electrode 31, and the silicon nitride film 32 oxidizes the surface of the lower electrode 31 when the AHO dielectric film 33 is deposited. It is an antioxidant film to prevent it from becoming.

3A to 3D are cross-sectional views illustrating a method of manufacturing the AHO capacitor shown in FIG. 2.

As shown in FIG. 3A, after forming the field oxide film 22 for isolation between devices on the semiconductor substrate 21, a junction region 23 such as a source / drain of a transistor according to a known technique in the semiconductor substrate 21 is formed. Ion implantation is performed to form. At this time, before forming the junction region 23, a word line (not shown) will be formed as known.

Next, the interlayer insulating film ILD 24, the storage node stop nitride film 25, and the storage node buffer oxide film 26 are sequentially formed on the semiconductor substrate 21 on which the junction region 23 is formed. Here, a bit line (not shown) may be formed before forming the interlayer insulating film 24.

Next, the storage node buffer oxide layer 26, the storage node stop nitride layer 25, and the interlayer dielectric layer 24 are simultaneously etched to form the storage node contact hole exposing the junction region 23 of the semiconductor substrate 21. The storage node contact plug 27 is filled in the storage node contact hole.

Here, the storage node contact plug 27 is formed by depositing a polysilicon layer on the entire surface until the storage node contact hole is filled, and then etching back the polysilicon layer until the surface of the storage node buffer oxide layer 26 is exposed.

Subsequently, a capacitor oxide film 28 is deposited on the storage node buffer oxide film 26 including the storage node contact plug 27. Here, the capacitor oxide film 28 uses BPSG, TEOS, HDP oxide film, USG, or PSG as the oxide film that determines the height of the lower electrode.

Next, after the hard mask polysilicon 29 is formed on the capacitor oxide film 28, the hard mask polysilicon 29 is etched with a mask (not shown) using a photosensitive film, and the hard mask polysilicon 29 is removed. The capacitor oxide layer 28 is etched using the etching barrier to form a hole 30 exposing the surface of the storage node contact plug 27.

As shown in FIG. 3B, after the hard mask polysilicon 29 is removed through the etch back, the lower electrode 31 made of polysilicon is formed only inside the hole 30.

Here, the lower electrode 31 is formed through a lower electrode separation process, for example, after depositing a polysilicon film on the capacitor oxide film 28 including the hole 30, a photosensitive film is coated on the polysilicon film, and the capacitor The polysilicon film is chemical mechanical polished (CMP) until the surface of the oxide film 28 is exposed, and then the photoresist film is stripped.

The deposition process of the polysilicon film for forming the lower electrode 31 is as follows.

SiH ₄ gas is used as a raw material, and PH ₃ gas is used as a doping gas for conductivity of the polysilicon film. At this time, SiH ₄ gas is flowed at a flow rate of 800sccm ~ 1200sccm, PH ₃ gas 500sccm ~ 1000sccm.

The polysilicon film deposition temperature was maintained at 500 ° C to 600 ° C, the pressure was maintained at 0.1torr to 10torr, and the deposition thickness of the polysilicon film was 100 kPa to 300 kPa.

Next, in order to prevent the chemical oxide film from being formed on the surface of the lower electrode 31 prior to the deposition of the AHO dielectric layer, cleaning is performed for 10 to 40 seconds using a 50: 1 HF solution. That is, by cleaning the surface of the lower electrode 31 by using a fluorine-based solution, it removes the native oxide on the surface of the lower electrode 31 and prevents the formation of the chemical oxide film.

On the other hand, the cleaning process using the SC-1 solution may be added, wherein the cleaning process using the SC-1 solution is always performed before the cleaning process using the HF solution to prevent the formation of the chemical oxide.

As shown in FIG. 3C, the semiconductor substrate 21 on which the cleaning process using the HF solution is completed is loaded into a chamber for depositing an AHO dielectric film.

Subsequently, prior to the deposition of the AHO dielectric film, a plasma treatment is performed in an NH ₃ atmosphere to nitride the surface of the lower electrode 31. The silicon nitride film 32 is thinly formed on the surface of the lower electrode 31 by the above nitriding treatment.

The above nitriding treatment method is as follows. For example, during the nitriding treatment, the flow rate of NH ₃ gas is maintained at 10 sccm to 200 sccm, the RF power for driving the plasma is maintained at 30 W to 500 W, the nitriding treatment time is maintained at 5 to 100 seconds, and the temperature during the nitriding treatment is The temperature is maintained at 250 ° C to 500 ° C and the chamber pressure is maintained at 0.1 torr to 1 torr.

As shown in FIG. 3D, the AHO dielectric film 33 is deposited on the capacitor oxide film 28 including the lower electrode 31 having the silicon nitride film 32 formed thereon using atomic layer deposition (ALD). Here, the AHO dielectric film 33 proceeds in-situ with the nitriding treatment of FIG. 3C and is formed of a triple layer of HfO ₂ / Al ₂ O ₃ / HfO ₂ .

If the AHO dielectric film 33 is a triple layer of HfO ₂ / Al ₂ O ₃ / HfO ₂ , first repeat the cycle of depositing HfO ₂ , repeat the cycle of depositing Al ₂ O ₃ , and again form HfO ₂ . Repeat the deposition cycle. As raw materials of HfO ₂ and Al ₂ O ₃ , Hf (NEtMe) ₄ and TMA [Al (CH ₃ ) ₃ ] were used, respectively. Argon (Ar) and O ₃ were used as a carrier gas and an oxidizing agent, respectively. N ₂ is used as the purge gas.

First, in the AHO dielectric film 33, HfO _{2, which} is a lower layer, is deposited to a thickness of 30 kPa to 40 kPa by maintaining the substrate temperature at 250 ° C to 500 ° C and maintaining the pressure of the reaction chamber at 0.1torr to 1torr by repeating the following cycle. . For example, while maintaining a flow rate of argon (Ar), which is a carrier gas, at 150 sccm to 250 sccm, Hf (NEtMe) ₄ as a raw material is flowed for 0.1 to 10 seconds, and nitrogen (N ₂ ) gas is flowed at 200 sccm to 400 sccm. Maintaining the flow rate to purge for 3 seconds to 10 seconds, maintaining the flow rate of the oxidant O ₃ gas at 200 sccm to 500 sccm flow for 3 seconds to 10 seconds, nitrogen (N ₂ ) gas flow of 200 sccm to 400 sccm The cycle of purging for 3 to 10 seconds is maintained as one cycle, and the cycle is repeated to deposit HfO ₂ of a required thickness.

Next, in the AHO dielectric film 33, Al ₂ O _{3, which} is an intermediate layer, maintains the substrate temperature at 250 ° C. to 500 ° C., maintains the pressure in the reaction chamber at 0.1 to 1 tor, and repeats the following cycle. To be deposited. For example, while maintaining a flow rate of argon (Ar), which is a carrier gas, at 20 sccm to 100 sccm, TMA [Al (CH ₃ ) ₃ ], which is a raw material, is flowed for 0.1 to 5 seconds, and nitrogen (N ₂ ) gas is flowed. Maintaining at a flow rate of 50 sccm to 300 sccm and purging for 0.1 to 5 seconds, maintaining a flow rate of oxidant O ₃ at a flow rate of 200 sccm to 500 sccm for 3 seconds to 10 seconds, and nitrogen (N ₂ ) gas at 300 sccm The step of purging for 0.1 seconds to 5 seconds while maintaining the flow rate at -1000 sccm is performed as one cycle, and this cycle is repeatedly performed to deposit Al ₂ O ₃ having a required thickness (5 kPa to 20 kPa).

Finally, in the AHO dielectric film 33, HfO _{2 as an} upper layer is deposited using the same method as that of HfO ₂ as a lower layer, and is deposited to have a thickness of 30 m to 40 m.

After forming the AHO dielectric layer 33 through the series of steps described above, the upper electrode 34 is formed. In this case, the upper electrode 34 is formed by depositing polysilicon and then etching.

Next, after the upper electrode 34 is formed, heat treatment is performed to obtain the dielectric characteristics of the AHO dielectric layer 33. At this time, the heat treatment is carried out in a furnace (Furnace).

For example, the heat treatment in the furnace is carried out for 10 minutes to 30 minutes at a temperature of 650 ℃ to 750 ℃ in a nitrogen atmosphere.

According to the above-described embodiment, prior to the deposition of the AHO dielectric film 33, the silicon nitride film 32 on the surface of the lower electrode 31 by plasma treatment in the NH ₃ atmosphere in situ in the deposition chamber of the AHO dielectric film 33. This prevents the surface of the lower electrode 31 from being oxidized when the AHO dielectric layer 33 is deposited. This suppresses the formation of a low dielectric layer, such as a silicon oxide film, which causes an increase in the equivalent oxide film thickness. For example, the silicon nitride film can further reduce the equivalent oxide film thickness compared to the silicon oxide film.

In addition, after the lower electrode 31 is formed, the F-Last cleaning (that is, the cleaning using fluorine lasts) is performed, thereby suppressing chemical oxide formation, which is another cause of an increase in the equivalent oxide film thickness.

In addition to the lower electrode made of a polysilicon film, the present invention removes an AHO capacitor and a capacitor oxide film that form MPS (Meta Stable Poly Silicon) on the surface of the lower electrode through a wet deep-out to form the structure of the lower electrode in a cylindrical form. It is also applicable to the manufacture of cylindrical AHO capacitors.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention described above performs an F-Last cleaning process prior to AHO dielectric film deposition during the AHO capacitor manufacturing process to prevent the formation of chemical oxides, while nitriding the lower electrode surface in situ prior to AHO dielectric film deposition, thereby reducing the equivalent oxide film thickness. By doing so, there is an effect of improving the leakage current characteristics of the AHO capacitor.

1 shows an AHO capacitor according to the prior art,

2 illustrates an AHO capacitor according to an embodiment of the present invention;

3A to 3D are cross-sectional views illustrating a method of manufacturing the AHO capacitor shown in FIG. 2.

* Explanation of symbols for the main parts of the drawings

21 semiconductor substrate 22 field oxide film

23 junction area 24 interlayer insulating film

25: storage node stop nitride film 26: storage node buffer oxide film

27: storage node contact plug 28: capacitor oxide film

30 hole 31 lower electrode

32 silicon nitride film 33 AHO dielectric film

34: upper electrode

Claims (8)

A lower electrode made of a polysilicon film; An anti-oxidation film formed on the surface of the lower electrode; AHO dielectric film formed on the antioxidant film: And An upper electrode made of a polysilicon film on the AHO dielectric film Capacitor comprising a. The method of claim 1, The antioxidant film, And a silicon nitride film obtained by nitriding the lower electrode surface. The method of claim 1, The AHO dielectric film, A capacitor, which is a triple layer of HfO ₂ / Al ₂ O ₃ / HfO ₂ . Forming a lower electrode made of a polysilicon film; Cleaning the lower electrode surface using a solution containing fluorine; Nitriding the lower electrode surface; Forming an AHO dielectric layer on the nitrided lower electrode; Forming an upper electrode of a polysilicon film on the AHO dielectric film; And Performing heat treatment to secure dielectric properties of the AHO dielectric layer; Method of manufacturing a capacitor comprising a. The method of claim 4, wherein The cleaning step, A process for producing a capacitor, characterized in that it proceeds using HF solution. The method of claim 4, wherein The cleaning step, A process for producing a capacitor, characterized in that to proceed with a mixture of washing with SC-1 solution and washing with HF solution, the last washing with the HF solution. The method of claim 4, wherein The nitriding treatment step, Plasma treatment in an NH ₃ atmosphere to form a silicon nitride film on the surface of the lower electrode. The method of claim 7, wherein In the nitriding treatment, The flow rate of the NH ₃ gas is maintained at 10 sccm to 200 sccm, the RF power for driving the plasma is maintained at 30 W to 500 W, the nitriding treatment time is maintained at 5 to 100 seconds, and the temperature during the nitriding treatment is 250 ° C. to 500 And a pressure in the chamber is maintained at 0.1 torr to 1 torr.