KR20040061278A - Method for fabricating capacitor of semiconductor device - Google Patents

Method for fabricating capacitor of semiconductor device Download PDF

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Publication number
KR20040061278A
KR20040061278A KR1020020087466A KR20020087466A KR20040061278A KR 20040061278 A KR20040061278 A KR 20040061278A KR 1020020087466 A KR1020020087466 A KR 1020020087466A KR 20020087466 A KR20020087466 A KR 20020087466A KR 20040061278 A KR20040061278 A KR 20040061278A
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South Korea
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semiconductor device
film
capacitor
tin
manufacturing
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KR1020020087466A
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Korean (ko)
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이승철
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주식회사 하이닉스반도체
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Priority to KR1020020087466A priority Critical patent/KR20040061278A/en
Publication of KR20040061278A publication Critical patent/KR20040061278A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2

Abstract

PURPOSE: A method for fabricating a capacitor of a semiconductor device is provided to avoid an increase of a leakage current by controlling a reaction of a HfO2 dielectric layer and a TiN layer in a subsequent heat treatment process, and to easily guarantee capacitance by stably using a high dielectric layer. CONSTITUTION: A storage node made of a TiN layer(10) is formed on an interlayer dielectric formed on a semiconductor substrate. The upper part of the TiN layer is nitridized to form a nitridized TiN layer(12). The nitridized TiN layer is oxidized to form a TiN layer. A HfO2 layer is formed on the oxynitridized TiN layer.

Description

반도체소자의 캐패시터 제조방법{METHOD FOR FABRICATING CAPACITOR OF SEMICONDUCTOR DEVICE}METHODS FOR FABRICATING CAPACITOR OF SEMICONDUCTOR DEVICE

본 발명은 반도체소자의 캐패시터 제조방법에 관한 것으로서, 특히 고유전막을 안정적으로 형성하여 유전막의 두께를 감소시키고, 누설전류 및 항복전압 특성을 향상시켜 소자의 고집적화에 유리하고 공정 수율 및 소자 동작의 신뢰성을 향상시킬 수 있는 반도체소자의 캐패시터 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a capacitor of a semiconductor device. In particular, the high dielectric film is stably formed to reduce the thickness of the dielectric film, and the leakage current and breakdown voltage characteristics are improved, which is advantageous for the high integration of the device, and the process yield and the reliability of device operation. It relates to a method for manufacturing a capacitor of a semiconductor device capable of improving the.

일반적으로 DRAM의 기억 소자에서 캐패시터는 정보를 기억하고 판독하기 위해 일정량의 전하를 저장하는 기능을 수행한다. 따라서 캐패시터는 충분한 정전용량을 확보하여야하고, 누설전류가 적은 유전체막의 절연 특성을 가져야하며, 장시간 반복사용되는데 대한 신뢰성도 함께 지니고 있어야한다.Generally, capacitors in DRAMs store a certain amount of charge to store and read information. Therefore, the capacitor should have sufficient capacitance, have the insulating property of the dielectric film with low leakage current, and have the reliability for repeated use for a long time.

캐패시터의 정전용량은 표면적에 비례하고, 유전막의 두께에 반비례하는데, 소자가 고집적화되어감에 따라 단위 소자의 할당 면적이 감소되므로 캐패시터의 정전용량 확보가 점차 어려워지고 있으며, 이를 위하여 캐패시터의 높이는 증가되고, 인접 셀과의 공정 마진도 감소되고 있는 상황에서, 소프트 에러의 발생과 리플레쉬 시간의 감소를 방지하기 위하여 셀당 25pF 이상의 충전용량을 요구하고 있다.The capacitance of the capacitor is proportional to the surface area and inversely proportional to the thickness of the dielectric film. As the device becomes more integrated, the allocation area of the unit device decreases, making it difficult to secure the capacitance of the capacitor. In a situation where process margins with adjacent cells are also decreasing, a charge capacity of 25 pF or more is required per cell to prevent the occurrence of soft errors and a reduction in refresh time.

종래 기술에 따른 실리콘 반도체소자의 캐패시터는 실리콘-유전막-실리콘(이하 SIS라 칭함) 구조의 캐패시터로서 전하저장전극과 플레이트전극을 도핑된 실리콘을 사용하고, 유전막으로는 산화막-질화막-산화막(이하 ONO라 칭함)구조를 사용하고 있다.The capacitor of a silicon semiconductor device according to the prior art is a capacitor of silicon-dielectric film-silicon (hereinafter referred to as SIS) structure using silicon doped with charge storage electrode and plate electrode, and an oxide film-nitride film-oxide film (hereinafter ONO). Structure).

상기의 질화막은 유전율 7로서 DCS(Di-chloro-silane) 가스를 사용하여 형성되는데, 등가산화 두께를 40Å 이하로 감소시킬 수 없어, 전하저장전극의 표면적 증가를 위하여 반구형 실리콘을 사용하고, 종횡비도 증가되고 있다.The nitride film is formed using a DCS (Di-chloro-silane) gas as the dielectric constant 7, the equivalent oxidation thickness can not be reduced to less than 40Å, hemispherical silicon is used to increase the surface area of the charge storage electrode, the aspect ratio It is increasing.

이러한 질화막을 유전막으로 사용하는 캐패시터는 소자가 고집적화됨에 따라 그 높이가 증가되어 식각 공정에 어려움이 있고, 셀영역과 주변회로영역간의 단차가 증가되어 후속 노광 공정시 초점심도의 확보가 어려워 배선공정에서의 패턴불량을 유발하는 문제점이 있어 256MDRAM 이상의 소자에서는 사용하기 어렵다.Capacitors using such nitride films as dielectric films have difficulty in etching process because their height increases as the device is highly integrated, and it is difficult to secure the depth of focus during the subsequent exposure process because the step difference between cell area and peripheral circuit area is increased. It is difficult to use in devices with more than 256MDRAM because of the problem of causing a pattern defect of.

따라서 유전율이 7정도 비교적 낮은 질화막 대신에 유전율이 25 정도로 매우큰 유전물질인 Ta2O5박막을 사용하게 되었다.Therefore, instead of the nitride film having a relatively low dielectric constant of about 7, a Ta 2 O 5 thin film having a very high dielectric constant of about 25 was used.

그러나 Ta2O5박막은 열적안전성이 떨어져 소자의 특성과 수율이 떨어지는 문제점이 있어, 열적 안정성이 우수하면서, 유전상수가 큰 HfO2박막을 TiN 전하저장전극상에 형성하여 사용하기도한다.However, Ta 2 O 5 thin film has a problem of poor thermal stability and poor device characteristics and yield. Thus, HfO 2 thin film having excellent thermal stability and high dielectric constant is formed on TiN charge storage electrode.

상술한 바와 같이 종래 기술에 따른 반도체소자의 캐패시터 제조방법은 디자인 룰의 감소로 셀 면적이 감소되어 충분한 정전용량을 확보하기 어려워지고 있어 유전막의 등가산화 두께를 감소시키는 방법으로 정전용량을 확보하여 왔으나, HfO2박막은 후속 열공정진행시 하부의 TiN 표면과 반응하여 정전용량이 감소되고, 누설전류가 증가되는 문제점이 있다.As described above, the capacitor manufacturing method of the semiconductor device according to the prior art has secured the capacitance by reducing the equivalent oxidation thickness of the dielectric film because it is difficult to secure sufficient capacitance because the cell area is reduced due to the reduction of design rules. , HfO 2 thin film reacts with the TiN surface of the lower during the subsequent thermal process, there is a problem that the capacitance is reduced, the leakage current is increased.

본 발명은 상기와 같은 문제점을 해결하기 위한 것으로서, 본 발명의 목적은 고유전율의 HfO2막을 사용하여 등가산화막의 두께를 감소시켜 정전용량을 증가시키고, HfO2막 증착전 TiN 표면을 질화후 산화시켜 TiOxN1-x막을 형성하여, 후속 열처리 공정시 HfO2막이 TiN과 반응하는 것을 방지하여 누설전류 특성이 안정되고, 정전용량 확보에 용이하여 공정 수율 및 소자 동작의 신뢰성을 향상시킬 수 있는 반도체소자의 캐패시터 제조방법을 제공함에 있다.The present invention is to solve the above problems, an object of the present invention is to reduce the thickness of the equivalent oxide film by using a high dielectric constant HfO 2 film to increase the capacitance, oxidization after nitriding the TiN surface before deposition of HfO 2 film To form a TiOxN 1-x film, which prevents the HfO 2 film from reacting with TiN during the subsequent heat treatment to stabilize the leakage current and to secure capacitance, thereby improving process yield and device operation reliability. To provide a method of manufacturing a capacitor.

도 1a 내지 도 1d는 본 발명에 따른 반도체소자 캐패시터의 제조공정도.1A to 1D are manufacturing process diagrams of a semiconductor device capacitor according to the present invention.

< 도면의 주요 부분에 대한 부호의 설명 ><Description of Symbols for Main Parts of Drawings>

10 : TiN층 12 : 질화된 TiN층10: TiN layer 12: nitrided TiN layer

14 : 산질화된 TiN층 16 : HfO2막14: oxynitride TiN layer 16: HfO 2 film

18 : 플레이트전극18: plate electrode

본발명은 상기와 같은 목적을 달성하기 위한 것으로서, 본발명에 따른 반도체소자의 캐패시터 제조방법의 특징은,The present invention is to achieve the above object, the characteristics of the capacitor manufacturing method of a semiconductor device according to the present invention,

TiN 전하저장전극과 HfO2유전막을 구비하는 반도체소자의 캐패시터 제조방법에 있어서,In the capacitor manufacturing method of a semiconductor device comprising a TiN charge storage electrode and HfO 2 dielectric film,

반도체기판상에 형성되어있는 층간절연막상에 TiN막으로된 전하저장전극을 형성하는 공정과,Forming a charge storage electrode made of a TiN film on an interlayer insulating film formed on a semiconductor substrate;

상기 TiN막 상부를 질화시켜 질화된 TiN막을 형성하는 공정과,Nitriding the upper TiN film to form a nitrided TiN film;

상기 질화된 TiN막을 산화시켜 산질화된 TiN막을 형성하는 공정과,Oxidizing the nitrided TiN film to form an oxynitride TiN film;

상기 산질화된 TiN막 상에 HfO2막을 형성하는 공정을 구비함에 있다.And forming a HfO 2 film on the oxynitride TiN film.

또한 본 발명의 다른 특징은, 상기 질화 공정전에 TiN 전세정 공정을 HF 또는 HF+NH4OH 용액으로 실시하거나, 상기 질화 공정은 열처리 공정이나 플라즈마 처리 공정을 실시하되, 상기 열처리 공정은 500∼800℃, NH3가스 1∼20slm 유량, 60∼180초, 압력은 상압에서 실시하고, 상기 플라즈마 처리 공정으로는 NH3가스 10∼1000sccm, R.F 파워 50∼400watt, 압력 0.1∼2torr에서 30∼300초 플라즈마 처리하며, 상기 산화 공정은 열처리 공정이나 플라즈마 처리 공정을 실시하되, 상기 열처리 공정은 500∼800℃, O2또는 N2O 가스를 1∼20slm, 60∼180초, 얍력은 상압에서 실시하며, 상기 플라즈마 처리 공정으로는 O2또는 N2O 가스 유량 10∼1000sccm, R.F 파워 50∼400watt, 압력 0.1∼2torr에서 30∼300초 플라즈마 처리하는 것을 특징으로 한다.In addition, another feature of the present invention, before the nitriding process, the TiN pre-cleaning process is carried out with HF or HF + NH 4 OH solution, or the nitriding process is subjected to a heat treatment process or a plasma treatment process, the heat treatment process is 500 to 800 ℃, NH 3 gas flow rate 1 to 20 slm, 60 to 180 seconds, the pressure is carried out at normal pressure, the plasma treatment step is 30 to 300 seconds at 10 to 1000 sccm NH 3 gas, RF power 50 to 400 watts, pressure 0.1 to 2 torr Plasma treatment, the oxidation process is carried out a heat treatment process or a plasma treatment process, the heat treatment process is 500 to 800 ℃, O 2 or N 2 O gas 1 to 20 slm, 60 to 180 seconds, the pressure is carried out at atmospheric pressure The plasma treatment step is characterized by performing a plasma treatment for 30 to 300 seconds at an O 2 or N 2 O gas flow rate of 10 to 1000 sccm, an RF power of 50 to 400 watts, and a pressure of 0.1 to 2 torr.

또한 상기 HfO2막은 저압 화학기상증착 방법이나, 원자층 증착 방법으로 형성하며, 상기 HfO2막 형성 후 열처리를 실시하여 막질을 향상시키는 것을 다른 특징으로 한다.In addition, the HfO 2 film is formed by a low pressure chemical vapor deposition method or an atomic layer deposition method, and the film quality is improved by performing heat treatment after the formation of the HfO 2 film.

이하, 본 발명에 따른 반도체소자의 캐패시터 제조방법에 관하여 첨부도면을 참조하여 상세히 설명하면 다음과 같다.Hereinafter, a method of manufacturing a capacitor of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

도 1a 내지 도 1d는 본 발명에 따른 반도체소자 캐패시터의 제조공정도이다.1A to 1D are manufacturing process diagrams of a semiconductor device capacitor according to the present invention.

먼저, 도시되어 있지는 않으나 소정의 하부 구조물을 구비하는 반도체기판(도시되지 않음)상에 전하저장전극용 콘택플러그(도시되지 않음)를 구비하는 층간절연막(도시되지 않음)을 도포하고, 상기 층간절연막상에 전하저장전극(10)을 TiN 패턴으로 형성한 후, 전세정 공정을 HF나 HF+NH4OH 용액으로 실시한다.First, an interlayer insulating film (not shown) including a contact plug (not shown) for a charge storage electrode is coated on a semiconductor substrate (not shown), which is not shown but has a predetermined lower structure, and the interlayer insulation After the charge storage electrode 10 is formed on the film in a TiN pattern, a pre-cleaning step is performed with HF or HF + NH 4 OH solution.

그다음 상기 TiN 표면을 질화시켜 질화된 TiN막(12)을 형성한다. 여기서 상기 질화 공정은 열처리 공정 방법으로는 500∼800℃에서, NH3가스를 1∼20slm 유량에서, 60∼180초 정도, 얍력은 상압에서 실시하거나, 플라즈마 처리 공정으로는 NH3가스 유량을 10∼1000sccm, R.F 파워 50∼400watt, 압력 0.1∼2torr에서 30∼300초 플라즈마 처리하여 질화시킨다. (도 1a 참조).The TiN surface is then nitrided to form a nitrided TiN film 12. Where a is from 500~800 ℃ the nitriding process is a heat treatment step method, the NH 3 gas at a flow rate 1~20slm, 60-180 seconds or so, or yapryeok is carried out at atmospheric pressure, the plasma treatment process is NH 3 gas flow rate 10 Nitriding is carried out by plasma treatment for 30 to 300 seconds at -1000 sccm, RF power of 50 to 400 watts, and pressure of 0.1 to 2 torr. (See FIG. 1A).

그후 상기 질화된 TiN막(12)을 산화시켜 산질화된 TiN막(14)을 형성한다. 여기서 상기 산화 공정은 열처리 공정 방법으로는 500∼800℃에서, O2또는 N2O 가스를 1∼20slm 유량에서, 60∼180초 정도, 얍력은 상압에서 실시하거나, 플라즈마 처리 공정으로는 O2또는 N2O 가스 유량을 10∼1000sccm, R.F 파워 50∼400watt, 압력 0.1∼2torr에서 30∼300초 플라즈마 처리하여 산화시킨다. (도 1b 참조).Thereafter, the nitrided TiN film 12 is oxidized to form an oxynitride TiN film 14. Here, the oxidation step is performed at 500 to 800 ° C. as the heat treatment step, at about 20 to 180 seconds for O 2 or N 2 O gas at a flow rate of 1 to 20 slm, and at a normal pressure, or as a plasma treatment step, O 2. Alternatively, the N 2 O gas flow rate is oxidized by plasma treatment for 30 to 300 seconds at 10 to 1000 sccm, RF power of 50 to 400 watts, and pressure of 0.1 to 2 torr. (See FIG. 1B).

그다음 상기 산질화된 TiN막(14) 상에 유전막인 HfO2막(16)을 형성한 후, 열처리한다. 여기서 상기 HfO2막(16) 형성 방법은 우선 Hf 소스, 예를 들어HfCl4, Hf(NO3)4, Hf(NCH2C2H5)4또는 Hf(OC2H5)4등을 기화시켜, 챔버로 공급하되, 반응가스로 O2또는 N2O 가스를 10∼1000sccm, 기판온도 200∼400℃에서, 챔버 압력 0.1∼10torr 조건에서 저압 화학기상증착 방법으로 형성하거나, 원자층 증착 방법으로 형성한다. (도 1c 참조).Then, an HfO 2 film 16 as a dielectric film is formed on the oxynitride TiN film 14, and then heat-treated. The HfO 2 film 16 may be formed by first vaporizing an Hf source, for example, HfCl 4 , Hf (NO 3 ) 4 , Hf (NCH 2 C 2 H 5 ) 4, or Hf (OC 2 H 5 ) 4 . And supply it to the chamber, but form O 2 or N 2 O gas as a reaction gas by low pressure chemical vapor deposition at a chamber pressure of 0.1 to 10 torr at 10 to 1000 sccm and a substrate temperature of 200 to 400 ° C. To form. (See FIG. 1C).

그후, 상기 HfO2막(16)을 열처리하여 막질을 향상시킨 후, TiN으로된 플레이트전극(18)을 형성한다. 여기서 상기 열처리 공정은 저온 일차열처리와 고온 이차 열처리로 나누어 실시하며, 일차 열처리는 0.1∼100torr 압력에서, 200∼400℃에서, O2또는 N2O 가스에 플라즈마를 R.F 파워 50∼400watt로 여기시켜 박막 내에 존재하는 물순물을 제거하고 부족한 산소를 공급하여준다. 이차 열처리는 400∼800℃에서 5∼30분간 O2또는 N2O 가스 분위기에서 열처리한다. (도 1d 참조).Thereafter, the HfO 2 film 16 is heat treated to improve film quality, and then a plate electrode 18 made of TiN is formed. Here, the heat treatment process is divided into low temperature primary heat treatment and high temperature secondary heat treatment, and the primary heat treatment is performed by exciting a plasma with RF power of 50 to 400 watts in O 2 or N 2 O gas at 200 to 400 ° C. at a pressure of 0.1 to 100 torr. It removes water impurities present in the thin film and supplies insufficient oxygen. The secondary heat treatment is performed at 400 to 800 ° C. for 5 to 30 minutes in an O 2 or N 2 O gas atmosphere. (See FIG. 1D).

이상에서 설명한 바와 같이, 본 발명에 따른 반도체소자의 캐패시터 제조방법은, TiN 전하저장전극과 HfO2유전막을 구비하는 캐패시터에서 TiN막의 표면을 산질화화시켜 산질화 TiN막을 형성하고, HfO2유전막을 형성하였으므로, 후속 열처리 공정에서 HfO2유전막의 TiN과의 반응이 억제되어 누설전류 증가가 방지되고, 고유전막을 안정적으로 사용할 수 있어 정전용량의 확보가 용이하여 공정 수율 및 소자 동작의 신뢰성을 향상시킬 수 있는 이점이 있다.As described above, in the capacitor manufacturing method of the semiconductor device according to the present invention, in the capacitor including the TiN charge storage electrode and the HfO 2 dielectric film, the surface of the TiN film is oxynitrated to form an oxynitride TiN film, and the HfO 2 dielectric film is formed. As a result, the reaction of the HfO 2 dielectric film with TiN is suppressed in the subsequent heat treatment process to prevent leakage current increase, and the high dielectric film can be used stably to secure the capacitance, thereby improving process yield and device operation reliability. There is an advantage to this.

Claims (10)

TiN 전하저장전극과 HfO2유전막을 구비하는 반도체소자의 캐패시터 제조방법에 있어서,In the capacitor manufacturing method of a semiconductor device comprising a TiN charge storage electrode and HfO 2 dielectric film, 반도체기판상에 형성되어있는 층간절연막상에 TiN막으로된 전하저장전극을 형성하는 공정과,Forming a charge storage electrode made of a TiN film on an interlayer insulating film formed on a semiconductor substrate; 상기 TiN막 상부를 질화시켜 질화된 TiN막을 형성하는 공정과,Nitriding the upper TiN film to form a nitrided TiN film; 상기 질화된 TiN막을 산화시켜 산질화된 TiN막을 형성하는 공정과,Oxidizing the nitrided TiN film to form an oxynitride TiN film; 상기 산질화된 TiN막 상에 HfO2막을 형성하는 공정을 구비하는 반도체소자의 캐패시터 제조방법.A method of manufacturing a capacitor of a semiconductor device comprising the step of forming an HfO 2 film on the oxynitride TiN film. 제 1 항에 있어서,The method of claim 1, 상기 질화 공정전에 TiN 전세정 공정을 HF 또는 HF+NH4OH 용액으로 실시하는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The method of manufacturing a capacitor of a semiconductor device, characterized in that the TiN pre-cleaning step is performed with HF or HF + NH 4 OH solution before the nitriding process. 제 1 항에 있어서,The method of claim 1, 상기 질화 공정은 열처리 공정이나 플라즈마 처리 공정을 실시하는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The nitriding step is a capacitor manufacturing method of a semiconductor device, characterized in that for performing a heat treatment step or a plasma treatment step. 제 3 항에 있어서,The method of claim 3, wherein 상기 열처리 공정은 500∼800℃, NH3가스 1∼20slm 유량, 60∼180초, 압력은 상압에서 실시하는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The heat treatment step is 500 to 800 ℃, NH 3 gas 1 to 20 slm flow rate, 60 to 180 seconds, the pressure is carried out at normal pressure, the capacitor manufacturing method of a semiconductor device. 제 3 항에 있어서,The method of claim 3, wherein 상기 플라즈마 처리 공정으로는 NH3가스 10∼1000sccm, R.F 파워 50∼400watt, 압력 0.1∼2torr에서 30∼300초 플라즈마 처리하는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The plasma processing step of the semiconductor device capacitor manufacturing method characterized in that the plasma treatment for 30 to 300 seconds at a NH 3 gas 10-1000sccm, RF power 50-400watt, pressure 0.1-2torr. 제 1 항에 있어서,The method of claim 1, 상기 산화 공정은 열처리 공정이나 플라즈마 처리 공정을 실시하는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The oxidation process is a capacitor manufacturing method of a semiconductor device, characterized in that for performing a heat treatment step or a plasma treatment step. 제 6 항에 있어서,The method of claim 6, 상기 열처리 공정은 500∼800℃, O2또는 N2O 가스를 1∼20slm, 60∼180초, 얍력은 상압에서 실시하는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The heat treatment step is a capacitor manufacturing method of a semiconductor device, characterized in that the 500 ~ 800 ℃, O 2 or N 2 O gas 1 to 20 slm, 60 to 180 seconds, the pressure is carried out at normal pressure. 제 6 항에 있어서,The method of claim 6, 상기 플라즈마 처리 공정으로는 O2또는 N2O 가스 유량 10∼1000sccm, R.F 파워 50∼400watt, 압력 0.1∼2torr에서 30∼300초 플라즈마 처리하는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The plasma processing step is a method for manufacturing a capacitor of a semiconductor device, characterized in that 30 to 300 seconds plasma treatment at O 2 or N 2 O gas flow rate 10 to 1000 sccm, RF power 50 to 400 watts, pressure 0.1 to 2 torr. 제 1 항에 있어서,The method of claim 1, 상기 HfO2막은 저압 화학기상증착 방법이나, 원자층 증착 방법으로 형성하는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.The HfO 2 film is a low pressure chemical vapor deposition method, the atomic layer deposition method characterized in that the capacitor manufacturing method of the semiconductor device. 제 1 항에 있어서,The method of claim 1, 상기 HfO2막 형성 후 열처리를 실시하여 막질을 향상시키는 것을 특징으로 하는 반도체소자의 캐패시터 제조방법.Capacitor manufacturing method of a semiconductor device, characterized in that to improve the film quality by performing a heat treatment after the formation of the HfO 2 film.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20220170681A (en) 2021-06-23 2022-12-30 최지훈 Apparatus for providing flight path
KR20230083602A (en) 2021-12-03 2023-06-12 강종희 Server and method for providing non-face-to-face counselling to preschool children
KR20230122398A (en) 2022-02-14 2023-08-22 부산대학교 산학협력단 Apparatus for cooling electronic components

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20220170681A (en) 2021-06-23 2022-12-30 최지훈 Apparatus for providing flight path
KR20230083602A (en) 2021-12-03 2023-06-12 강종희 Server and method for providing non-face-to-face counselling to preschool children
KR20230122398A (en) 2022-02-14 2023-08-22 부산대학교 산학협력단 Apparatus for cooling electronic components

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