KR20050050883A - Apparatus and method for adjusting common voltage - Google Patents

Abstract

The present invention relates to a common voltage adjusting device and a method, and the common voltage adjusting device receives a light emitted from a display device and generates an electric signal according to the light, and receives a signal from the flicker measuring unit and receives a predetermined signal. And a signal controller configured to output a control signal for adjusting the common voltage of the display device according to the comparison result. According to the present invention, it is possible to quantitatively optimize or minimize the flicker by outputting a counter value for automatically adjusting the common voltage by feeding back the flicker generated in the liquid crystal display. Therefore, it is possible to shorten the working time in the production and inspection stage of the liquid crystal display, to quantitatively manage the flicker level of the produced product, and eventually to improve the quality and reliability of the product.

Description

Common Voltage Regulators and Methods {APPARATUS AND METHOD FOR ADJUSTING COMMON VOLTAGE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a common voltage adjusting device and method, and more particularly, to an apparatus and method for adjusting a common voltage of a display device including a liquid crystal display device.

A typical liquid crystal display (LCD) includes two display panels provided with pixel electrodes and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The pixel electrodes are arranged in a matrix and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

In such a liquid crystal display, a voltage is applied to two electrodes to form an electric field in the liquid crystal layer, and the intensity of the electric field is adjusted to control the transmittance of light passing through the liquid crystal layer to obtain a desired image. At this time, in order to prevent deterioration caused by the application of an electric field in one direction to the liquid crystal layer for a long time, the polarity of the data voltage with respect to the common voltage is inverted frame by frame, row, or dot.

Meanwhile, when the polarity of the data voltage is inverted with respect to the common voltage, flicker occurs due to the asymmetry between the positive and negative polarities.

This asymmetry is due to the parasitic capacitance of the thin film transistor when the thin film transistor is formed, the current voltage characteristic of the thin film transistor, the voltage unevenness of the electrode portion forming the common voltage, and the variation of circuit configuration elements. For this reason, it is necessary to apply a different common voltage to each panel.

Therefore, in order to minimize flicker due to asymmetry in the process of producing and inspecting TFT-LCD panels, the common voltage is controlled by using a variable resistor. That is, different common voltages are set according to the characteristics of the elements and the characteristics of the liquid crystal display.

Current flicker control methods allow the production and testers to vary the common voltage by using a flicker control rod, such as a direct driver, to adjust the variable resistor. The production and inspector looks at the LCD panel visually and locks the variable resistor in the position with the least flicker.

However, the use of the variable resistor is exposed to the variable resistor during production, resulting in quality problems, precision by manual adjustment of the variable resistor, increase in cost due to the use of the variable resistor, mechanical resistance value of the variable resistor. It causes problems such as foreign matters to enter the hole (hole) for adjusting the, and limit of the height of the part. In addition, as the size of the liquid crystal display becomes larger, it is difficult to adjust the variable resistance while observing the state of the image quality, and the degree of freedom in designing the product when designing a stylish appearance due to the variable resistance attached to the front or rear of the liquid crystal display body Acts as a lowering factor. In addition, the variable resistor is damaged or broken during the adjustment of the common voltage to increase the defective rate of the product.After completing the adjustment work, the adjustment state of the variable resistor is shifted due to external shock or vibration. The reliability of the product is also low.

Accordingly, an aspect of the present invention is to provide an apparatus and method for automatically adjusting a common voltage of a display device without using a variable resistor in order to minimize flicker.

The common voltage regulating device according to an embodiment of the present invention for achieving the technical problem,

A flicker measurement unit configured to receive light emitted from a display device and generate a first electrical signal according to the light; and

And a signal controller configured to receive the first electrical signal from the flicker measurement unit, compare the first electrical signal with a second electrical signal, and output a control signal for adjusting the common voltage of the display device according to the comparison result.

The first electrical signal represents an amount of change in luminance of the light per unit time.

Preferably, the first electrical signal is a digital signal.

Preferably, the control signal includes a counter signal, and the common voltage changes in stages according to a counter value based on the counter signal.

The counter value may be stored in the display device such that the first electrical signal is smaller than the second electrical signal while the counter voltage is increased or decreased to change the common voltage.

The second electrical signal may be a preset value.

The counter value may be stored in the display device to increase or decrease the counter value so as to have the smallest value among the plurality of first electrical signals generated as the common voltage changes.

Common voltage control method according to another embodiment of the present invention,

Receiving light from the display device,

Generating a first electrical signal corresponding to an amount of change in luminance of light per unit time; and

Comparing the first and second electrical signals to generate and output a control signal for adjusting a common voltage of the display device according to a comparison result;

It includes.

The control signal may include a counter signal, and the common voltage may be changed in stages according to a counter value according to the counter signal.

The control signal generation / output step,

Changing the common voltage by increasing or decreasing the counter value, and

And generating and outputting a write signal for storing the counter value in the display device such that the first electrical signal is smaller than the second electrical signal.

The second electrical signal may be a predetermined set value.

The control signal generation / output step,

Changing the common voltage by increasing or decreasing the counter value, and

The method may include generating and outputting a write signal for storing, in the display device, the counter value having the smallest value among the plurality of first electrical signals generated as the common voltage changes.

The control signal generation / output step,

A first step of comparing the second electrical signal with the first electrical signal generated after increasing the counter value by one;

A second step of comparing the second electrical signal with the first electrical signal generated after decrementing the counter value by one; and

A third step of generating and outputting a write signal for storing the counter value in the display device if the first electric signal is equal to or greater than the second electric signal as a result of the comparison in the second step;

Including,

As a result of the comparison in the first step, the first step is repeated if the first electric signal is less than the second electric signal, and if the first electric signal is greater than the second electric signal, the second step is performed. ,

As a result of the comparison in the second step, if the first electric signal is smaller than the second electric signal, the second step may be repeated.

The second electrical signal may be a previously generated first electrical signal.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

Now, a liquid crystal display to which a common voltage regulating device according to an exemplary embodiment of the present invention is applied will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a liquid crystal display device to which a common voltage adjusting device is applied, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display device of FIG. 1.

As shown in FIG. 1, a liquid crystal display device to which a common voltage adjusting device is applied according to an embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400 and a data driver connected thereto. And a gray voltage generator 800 connected to the common voltage generator 700, the data driver 500, and a signal controller 600 for controlling the gray voltage generator 800.

The liquid crystal panel assembly 300 includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m and a plurality of pixels connected to the plurality of display signal lines G ₁ -G _n , D ₁ -D _m , and arranged in a substantially matrix form. .

The display signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n for transmitting a gate signal (also called a “scan signal”) and a data signal line or data for transmitting a data signal. It includes the line (D ₁ -D _m ). The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

Each pixel includes a switching element Q connected to a display signal line G ₁ -G _n , D ₁ -D _m , and a liquid crystal capacitor C _LC and a storage capacitor C _ST connected thereto. It includes. The holding capacitor C _ST can be omitted as necessary.

The switching element Q is provided on the lower panel 100, and the control terminal and the input terminal are connected to the gate line G ₁ -G _n and the data line D ₁ -D _m, respectively. The output terminal is connected to the liquid crystal capacitor C _LC and the storage capacitor C _ST .

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives a common voltage V _com . Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, both electrodes 190 and 270 may be linear or rod-shaped.

The storage capacitor C _ST is formed by overlapping a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100, and a predetermined voltage such as a common voltage V _com is applied to the separate signal line. Is approved. However, the storage capacitor C _ST may be formed such that the pixel electrode 190 overlaps the front end gate line directly above the insulator.

Meanwhile, in order to implement color display, each pixel must display color, which is possible by providing a red, green, or blue color filter 230 in a region corresponding to the pixel electrode 190. In FIG. 2, the color filter 230 is formed in a corresponding region of the upper panel 200. Alternatively, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the two display panels 100 and 200 of the liquid crystal panel assembly 300.

The gray voltage generator 800 generates two sets of gray voltages related to the transmittance of the pixel. One of the two sets has a positive value (positive polarity, V +) relative to the common voltage (V _com ) and the other set has a negative value (negative polarity, V−).

The gate driver 400 is connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300 to receive a gate signal formed by a combination of a gate on voltage V _on and a gate off voltage V _off from the outside. It is applied to the gate lines G ₁ -G _n and usually consists of a plurality of integrated circuits.

The data driver 500 is connected to the data lines D ₁ -Dm of the liquid crystal panel assembly 300 to select the gray voltage from the gray voltage generator 800 and apply the gray voltage to the pixel as a data signal. Is made of.

A plurality of gate drive integrated circuits or data drive integrated circuits may be mounted in a tape carrier package (TCP) (not shown) to attach TCP to the liquid crystal panel assembly 300, or to integrate these onto a glass substrate without using TCP. Circuits may be directly attached (chip on glass, COG mounting method), and circuits performing the same functions as those integrated circuits may be directly mounted on the liquid crystal panel assembly 300.

The signal controller 600 generates control signals for controlling operations of the gate driver 400 and the data driver 500, and provides the corresponding control signals to the gate driver 400 and the data driver 500.

The common voltage generator 700 receives the voltage control signal VAS from an external device, generates a common voltage V _com of an appropriate value, and supplies it to the liquid crystal panel assembly 300. This will be described in detail later.

Next, the display operation of the liquid crystal display will be described in more detail.

The signal controller 600 inputs an input control signal for controlling the RGB image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical sync signal V _sync and a horizontal sync signal. (H _sync ), a main clock (MCLK), a data enable signal (DE) is provided. The signal controller 600 properly processes the image signals R, G, and B according to the operating conditions of the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal, and controls the gate control signal. After generating the CONT1 and the data control signal CONT2 and the like, the gate control signal CONT1 is sent to the gate driver 400 and the data control signal CONT2 and the processed image signals R ', G', and B 'are processed. ) Is sent to the data driver 500.

The gate control signal CONT1 includes a vertical synchronization start signal STV for indicating the start of output of the gate-on pulse (high period of the gate signal), a gate clock signal CPV for controlling the output timing of the gate-on pulse, and a gate-on pulse. And an output enable signal OE that defines the width of the signal.

The data control signal CONT2 is a load for applying a corresponding data voltage to the horizontal synchronization start signal STH indicating the start of input of the image data R ', G', and B 'and the data lines D ₁ -D _m . Signal LOAD, inverted signal RVS and data that inverts the polarity of the data voltage with respect to common voltage V _com (hereinafter referred to as " polarity of data voltage " by reducing " polarity of data voltage with respect to common voltage "). Clock signal HCLK and the like.

The gray voltage generator 800 generates a plurality of gray voltages related to the luminance of the liquid crystal display and applies them to the data driver 500.

The data driver 500 sequentially receives image data R ′, G ′, and B ′ corresponding to one row of pixels according to the data control signal CONT2 from the signal controller 600, and generates a gray voltage generator ( The image data R ', G', B 'is converted into the corresponding data voltage by selecting the gray voltage corresponding to each of the image data R', G ', and B' among the gray voltages from the 800.

The gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n. Turn on the switching element (Q) connected to.

The gate-on voltage V _on is applied to one gate line G ₁ -G _n so that a row of switching elements Q connected thereto is turned on (this period is "1H" or "1 horizontal period). (horizontal period) "and equal to one period of the horizontal sync signal Hsync, the data enable signal DE, and the gate clock CPV], and the data driver 500 converts each data voltage to a corresponding data line D. ₁ -D _m ). The data voltage supplied to the data lines D ₁ -D _m is applied to the corresponding pixel through the turned-on switching element Q.

In this manner, the gate-on voltages V _{on are} sequentially applied to all the gate lines G ₁ -G _n during one frame to apply data voltages to all the pixels. At the end of one frame, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each pixel is opposite to that of the previous frame ("frame inversion). "). In this case, the polarity of the data voltage flowing through one data line may be changed (“line inversion”) within one frame or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the inversion signal RVS ( "Dot reversal").

Then, FIG. 3 is a view illustrating a common voltage adjusting device for generating a voltage adjusting signal VAS for automatically adjusting the common voltage V _com of the above-described liquid crystal display to an appropriate value according to one embodiment of the present invention. It demonstrates with reference.

3 is a block diagram of a common voltage regulator 40 according to an embodiment of the present invention.

3 illustrates a common voltage generator 700 and a liquid crystal panel assembly 300 in the liquid crystal display device in which the common voltage regulating device 40 is used.

As shown in FIG. 3, the common voltage regulating device 40 includes a flicker measuring unit 50 and a signal adjusting unit 60 connected to the flicker measuring unit.

The flicker measuring unit 50 receives the light from the liquid crystal display and generates an electric signal FLS corresponding to the size of the flicker displayed on the liquid crystal display. Flicker may be measured in one or more places in the liquid crystal display device. The signal adjusting unit 60 receives the electrical signal FLS from the flicker measuring unit 50 and performs arithmetic processing to generate and output a voltage adjusting signal VAS for adjusting the common voltage V _com . The common voltage generator 700 receives the voltage control signal VAS and applies the common voltage V _com according to the voltage control signal VAS to the liquid crystal panel assembly 300. According to the changed common voltage V _com , the size of flicker appearing in the liquid crystal display is changed. Again, the flicker measurement unit 50 measures this and transmits the measured signal to the signal controller 60, and the signal controller 60 generates a voltage control signal VAS accordingly. The common voltage regulating device 40 according to the embodiment of the present invention automatically continues this operation until a minimum flicker or a flicker below a predetermined value appears in the liquid crystal display.

The common voltage regulator 40 of the present embodiment will now be described in more detail.

The flicker measurement unit 50 includes a photodiode, an amplifier, an A / D converter, and a calculator. The photodiode converts the intensity of the light input to the flicker measurement unit 50 into an electrical signal. The converted electrical signal is amplified by the amplifier. The A / D converter converts the amplified signal to digital. The calculator calculates an amount of change in luminance of light per unit time corresponding to the size of the flicker using the converted digital signal, and then transfers the corresponding electric signal FLS to the signal controller 60. The electric signal FLS finally transmitted to the signal controller 60 is digitized.

Although the flicker measurement unit 50 has been described in the present embodiment as described above, various changes are possible with respect to the flicker measurement unit 50. In particular, the flicker measuring unit 50 may use a device such as a photodetector or a flicker measuring device "BM7".

The signal adjusting unit 60 receives the electric signal FLS from the flicker measuring unit 50, compares the electric signal FLS with a predetermined signal, and adjusts the common voltage V _com of the liquid crystal display according to the comparison result. Outputs

The voltage regulation signal VAS includes a counter signal, a write signal, and a counter enable signal. The common voltage V _com of the liquid crystal display varies in stages according to the counter pulse of the counter signal. This will be described in detail with reference to FIGS. 4 and 5.

4 is a block diagram of the common voltage generator 700 of the liquid crystal display of FIG. 1, and FIG. 5 is a waveform diagram illustrating a voltage control signal VAS according to an exemplary embodiment of the present invention.

The common voltage generator 700 includes a controller 701, a memory 702, a D / A converter 703, and a buffer 704. The controller 701 increases or decreases the value of the counter according to the control signal VAS. The D / A converter 703 generates an analog voltage according to the value of the counter, and the generated analog voltage is output as a common voltage V _com through the buffer 704. The counter value can be 32 steps, positive and negative, in which case the total voltage range is about 0.88V.

As shown in FIG. 5, the voltage adjustment signal VAS includes a counter pulse signal C_pulse and a counter enable signal C_enable.

The counter enable signal C_enable may be changed by the control unit 701 of the common voltage generator 700 so that the common voltage generator 700 may change the common voltage V _com stepwise by the counter pulse signal C_pulse. This signal enables the counter. In the present embodiment, the counter enable signal C_enable enables the counter at high level and disables at low level.

As shown in FIG. 5, the counter pulse signal C_pulse includes a counter signal and a write signal. That is, the counter signal and the write signal are transmitted from the signal controller 60 to the common voltage generator 700 through one channel. The controller 701 increases the current counter value by one when a positive pulse is input among counter signals, and decreases the current counter value by one when a negative pulse is input. When a high voltage "V _H " such as, for example, 16 V is applied among the counter pulse signals C_pulse, the controller 701 recognizes the write signal and stores the counter value in the memory 702. The common voltage generator 700 outputs a common voltage V _com corresponding to a counter value stored in the memory 702.

Next, an operation of minimizing the size of the flicker generated by the common voltage regulating device 40 according to an exemplary embodiment of the present invention will be described in detail with reference to FIG. 6.

6 is a flowchart illustrating the operation of the common voltage regulator 40 according to an embodiment of the present invention.

As shown in FIG. 6, when the operation is started, the signal controller 60 receives the electric signal FLS from the flicker measuring unit 50 (S10) and the counter enable signal C_enable among the voltage control signals VAS. Is output at a high level (S15) to enable the counter of the controller 701.

The value of the received electric signal FLS is input to the variable F _n (S20), and one “+” pulse for increasing the counter value by 1 is loaded on the counter pulse signal C_pulse and output (S25). When the counter value increases by 1, the common voltage generator 700 generates a common voltage V _{com at a} voltage higher than the previous common voltage V _com and applies the common voltage V _com to the liquid crystal panel assembly 300. When the common voltage V _com of the liquid crystal display changes, the size of the flicker changes accordingly.

The flicker measurement unit 50 receives the electric signal FLS corresponding to the changed flicker size and inputs the value to the variable F _{n + 1} (S30). Comparing F _{n + 1} and F _n to (S35), and F _{n + 1} This is F _n less substituted for F _{n + 1} to F _n and repeating (S40), Step (S25), Step (S30).

If F _{n + 1} is greater than F _n , the signal adjusting unit 60 receives a new electric signal FLS from the flicker measuring unit 50 and inputs this value to F _n (S45). Thereafter, one "-" pulse for decrementing the counter value by one is loaded on the counter pulse signal C_pulse and outputted (S50). When the counter value decreases by one, the common voltage generator 700 generates the common voltage V _com at a voltage one step lower than the previous common voltage V _com , and applies the common voltage V _com to the liquid crystal panel assembly 300. As a result, the size of the flicker generated in the liquid crystal display device is changed.

Then, the electric signal FLS is input again from the flicker measuring unit 50 and the value is input to the variable F _n-1 (S55). Compare F _n-1 and _{F n (S60), F n} -1 is smaller than F _n is substituted into the F _n-1 to F _n and repeating (S65), Step (S50), Step (S55) .

If F _n-1 is equal to or greater than F _{n, the} signal adjusting unit 60 loads the write signal “V _H ”, which stores the counter value in the memory 702, in the counter pulse signal C_pulse (S70). The counter in the controller 701 is disabled by setting the counter enable signal C_enable to a low level. When the counter is disabled, the control unit 701 reads the counter value stored in the memory 702 and outputs a corresponding common voltage V _com .

As such, the signal controller 60 adjusts the counter value to automatically change the common voltage V _com applied to the liquid crystal display, and continuously feeds back the flicker generated from the liquid crystal display so that the size of the flicker is minimized. can do.

Meanwhile, in the present embodiment, the signal controller 60 adjusts the common voltage V _com by increasing or decreasing the counter value so that the size of the flicker generated in the liquid crystal display is minimized. The common voltage V _com may be adjusted by increasing or decreasing the value of the counter to be.

In addition, in the exemplary embodiment of the present invention, the common voltage adjusting device is described as being applied to the liquid crystal display device.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As such, the common voltage regulator may quantitatively optimize or minimize the flicker by feeding back a flicker generated in the liquid crystal display and outputting a counter value for automatically adjusting the common voltage. Therefore, it is possible to shorten the working time in the production and inspection stage of the liquid crystal display, to quantitatively manage the flicker level of the produced product, and eventually to improve the quality and reliability of the product.

1 is a block diagram of a liquid crystal display device to which a common voltage adjusting device according to an exemplary embodiment of the present invention is applied.

FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display of FIG. 1.

3 is a block diagram of a common voltage regulator according to an embodiment of the present invention.

4 is a block diagram of a common voltage generator of the liquid crystal display of FIG. 1.

5 is a waveform diagram illustrating a control signal according to an embodiment of the present invention.

6 is a flowchart illustrating an operation of a common voltage regulating device according to an embodiment of the present invention.

Claims (14)

A flicker measurement unit configured to receive light emitted from a display device and generate a first electrical signal according to the light; and A signal controller configured to receive the first electrical signal from the flicker measurement unit, compare the first electrical signal with a second electrical signal, and output a control signal for adjusting a common voltage of the display device according to a comparison result Common voltage regulating device comprising a. In claim 1, And the first electrical signal represents an amount of change in luminance of the light per unit time. In claim 2, And the first electrical signal is a digital signal. In claim 1, And the control signal comprises a counter signal, wherein the common voltage is changed stepwise according to a counter value based on the counter signal. In claim 4, And a display device for storing the counter value at which the first electrical signal is smaller than the second electrical signal while changing the common voltage by increasing or decreasing the counter value. In claim 5, And the second electrical signal is a preset value. In claim 4, And storing the counter value on the display device to increase or decrease the counter value so as to have the smallest value among the plurality of first electrical signals generated as the common voltage changes. Receiving light from the display device, Generating a first electrical signal corresponding to an amount of change in luminance of light per unit time; and Comparing the first and second electrical signals to generate and output a control signal for adjusting a common voltage of the display device according to a comparison result; Common voltage control method comprising a. In claim 8, The control signal includes a counter signal, wherein the common voltage is changed in stages according to the counter value according to the counter signal. In claim 9, The control signal generation / output step, Changing the common voltage by increasing or decreasing the counter value, and Generating and outputting a write signal for storing in the display device the counter value at which the first electrical signal is smaller than the second electrical signal Common voltage control method comprising a. In claim 10, And said second electrical signal is a predetermined set value. In claim 9, The control signal generation / output step, Changing the common voltage by increasing or decreasing the counter value, and Generating and outputting a write signal for storing in the display device the counter value having the smallest value among the plurality of first electrical signals generated as the common voltage changes Common voltage control method comprising a. In claim 9, The control signal generation / output step, A first step of comparing the second electrical signal with the first electrical signal generated after increasing the counter value by one; A second step of comparing the second electrical signal with the first electrical signal generated after decrementing the counter value by one; and A third step of generating and outputting a write signal for storing the counter value in the display device if the first electric signal is equal to or greater than the second electric signal as a result of the comparison in the second step; Including, As a result of the comparison in the first step, the first step is repeated if the first electric signal is less than the second electric signal, and if the first electric signal is greater than the second electric signal, the second step is performed. , As a result of the comparison in the second step, if the first electrical signal is less than the second electrical signal, repeating the second step. Common voltage regulation method. In claim 13, And said second electrical signal is a first electrical signal previously generated.