KR20050035729A - 저밀도 패리티 검사 코드의 부호화 방법 - Google Patents
저밀도 패리티 검사 코드의 부호화 방법 Download PDFInfo
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- KR20050035729A KR20050035729A KR1020030071456A KR20030071456A KR20050035729A KR 20050035729 A KR20050035729 A KR 20050035729A KR 1020030071456 A KR1020030071456 A KR 1020030071456A KR 20030071456 A KR20030071456 A KR 20030071456A KR 20050035729 A KR20050035729 A KR 20050035729A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1191—Codes on graphs other than LDPC codes
- H03M13/1194—Repeat-accumulate [RA] codes
- H03M13/1197—Irregular repeat-accumulate [IRA] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
- H03M13/1114—Merged schedule message passing algorithm with storage of sums of check-to-bit node messages or sums of bit-to-check node messages, e.g. in order to increase the memory efficiency
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1162—Array based LDPC codes, e.g. array codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/611—Specific encoding aspects, e.g. encoding by means of decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
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- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
Abstract
Description
- Code rate = 1/2, maximum variable node degree = 15- Offset (f) inH p = 7- Frame size = 435(p=29), 795 (p=53), 1545(p=103), 3855(p=257)- Binary antipodal signaling over AWGN channel- Iterative belief propagation decoding- Floating point simulation- Maximum number of iterations = 160- Stop by parity check at each iteration- Frame error rate (FER) & information bit error rate (BER) evaluation |
Eb/No (dB) | Average number of iterations |
1.6 | 15.085 |
1.8 | 11.353 |
2.0 | 9.317 |
2.2 | 8.01 |
2.4 | 7.087 |
Eb/No (dB) | Average number of iterations |
1.1 | 40.308 |
1.3 | 21.504 |
1.5 | 14.858 |
1.7 | 12.018 |
1.8 | 11.020 |
Eb/No (dB) | Average number of iterations |
1.1 | 38.495 |
1.2 | 22.051 |
1.4 | 16.190 |
1.5 | 14.623 |
Eb/No (dB) | Average number of iterations |
0.9 | 41.036 |
1.0 | 31.034 |
1.1 | 25.507 |
1.2 | 22.170 |
Claims (9)
- 정보 부분 매트릭스와 패리티 부분 매트릭스로 구성되는 저밀도 패리티 검사 코드를 생성 방법에 있어서,상기 정보 부분 매트릭스를 배열 코드 구조로 변경하고, 각각의 서브 매트릭스 열에 차수 시퀀스(degree sequence)를 할당하는 과정과,상기 패리티 부분 매트릭스인 일반화된 이중 사선 매트릭스에 있어서, 사선간의 옵셋 값이 임의의 값을 갖도록 확장하는 과정과,상기 일반화된 이중 사선 매트릭스를 리프팅 하는 과정과.상기 리프팅된 일반화된 이중 사선 매트릭스의 서브 매트릭스마다 순환 행 이동(cyclic column shift)을 위한 옵셋 값(offset value)을 결정하는 과정과,상기 패리티 부분 매트릭스의 열에 대응되는 패리티 심볼을 결정하는 부호화 과정을 포함함을 특징으로 하는 상기 저밀도 패리티 검사 코드 생성 방법.
- 제1항에 있어서, 상기 차수 시퀀스(degree sequence)는 하기 <수학식 37>과 같이 구성됨을 특징으로 하는 상기 저밀도 패리티 검사 코드 생성 방법.
- 제1항에 있어서, 상기 사선간의 옵셋 값은,일반화된 이중 사선 매트릭스의 열의 수와 서로소임을 특징으로 하는 상기 저밀도 패리티 검사 코드 생성 방법.
- 제1항에 있어서,상기 서브 매트릭스의 행의 수는 소수임을 특징으로 하는 상기 저밀도 패리티 검사 코드 생성 방법.
- 제1항에 있어서,상기 패리티 부분 매트릭스인 일반화된 이중 사선 매트릭스에서 사선상의 서브 매트릭스의 상기 순환 행 이동을 위한 옵셋 값들의 합과 옵셋 사선상의 서브 메트릭스의 순환 행 이동을 위한 옵셋 값들의 합의 차는 0이 아님을 특징으로 하는 상기 저밀도 패리티 검사 코드 생성 방법.
- 제1항에 있어서, 상기 부호화 과정은,상기 패리티 부분 매트릭스의 사선상의 서브 매트릭스 열 인덱스 0인 서브 매트릭스내의 첫 번째 행의 패리티 심볼을 결정하는 제1과정과,상기 설정된 패리티 심볼의 서브 매트릭스 열 인덱스와 같은 서브 매트릭스 열 인덱스를 가지는 옵셋 사선 상의 서브 매트릭스에서 상기 결정된 패리티 심볼과 서브 매트릭스 내의 열 인덱스가 같은 패리티 심볼의 서브 매트릭스 내의 행 인덱스를 설정하는 제2과정과,상기 옵셋 사선 상의 서브 매트릭스의 서브 매트릭스 행 인덱스와 같은 서브 매트릭스 행 인덱스를 가지는 사선 상의 서브 메트릭스에서 상기 설정된 서브 매트릭스 내의 행 인덱스가 같은 패리티 심볼을 결정하는 제3과정과,상기 제2과정부터 제3과정까지의 연산을 상기 패리티 매트릭스의 생성이 완료될 때까지 반복 수행하는 과정을 포함함을 특징으로 하는 상기 저밀도 패리티 검사 코드 생성 방법.
- 제6항에 있어서,상기 제1과정의 상기 패리티 심볼은 상기 패리티 심볼이 결정될 서브 매트릭스 내의 행 인덱스와 같은 행에 존재하는 정보 부분 매트릭스의 정보 심볼들의 합으로 결정됨을 특징으로 하는 상기 저밀도 패리티 검사 코드 생성 방법.
- 제6항에 있어서,상기 제2과정의 상기 서브 매트릭스 내의 행 인덱스를 설정은 하기 <수학식 38>과 같이 설정함을 특징으로 하는 상기 저밀도 패리티 검사 코드 생성 방법.상기 <수학식 38>에서 은 옵셋 사선상의 서브 매트릭스 열 인덱스 i인 서브 매트릭tm 내의 행 인덱스이고, 은 사선상에 존재하는 열 인덱스 i인 서브 매트릭 내의 열 인덱스이며, j2(i+r-f)+1은 상기 옵셋 사선상의 서브 매트릭스 열 인덱스 I인 서브 매트릭스의 순환 행 이동(cyclic column shift)을 위한 옵셋 값(offset value)이다.
- 제6항에 있어서,상기 제3과정에서 패리티 심볼 결정은 하기 <수학식 39>와 같이 결정함을 특징으로 하는 상기 저밀도 패리티 검사 코드 생성 방법.상기 <수학식 39>에서 은 열 인덱스 에 해당하는 패리티 심볼이며, Pxi (1)은 열 인덱스 에 해당하는 패리티 심볼이고, 은 서브 매트릭스의 열 인덱스 i+(r-f)인 서브 매트릭스 내의 행 인덱스 인 행에 존재하는 정보 심볼의 합이다.
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KR1020030071456A KR100922956B1 (ko) | 2003-10-14 | 2003-10-14 | 저밀도 패리티 검사 코드의 부호화 방법 |
PCT/KR2004/002630 WO2005036758A1 (en) | 2003-10-14 | 2004-10-14 | Method for encoding low-density parity check code |
EP04793492A EP1673870B1 (en) | 2003-10-14 | 2004-10-14 | Method for encoding low-density parity check code |
CN2004800217855A CN1830149B (zh) | 2003-10-14 | 2004-10-14 | 用于对低密度奇偶校验码编码的方法 |
JP2006535266A JP4199279B2 (ja) | 2003-10-14 | 2004-10-14 | 低密度パリティ検査コードの符号化方法 |
AU2004306640A AU2004306640B9 (en) | 2003-10-14 | 2004-10-14 | Method for encoding low-density parity check code |
RU2006102662/09A RU2308803C2 (ru) | 2003-10-14 | 2004-10-14 | Способ кодирования кода разреженного контроля четности |
DE602004016194T DE602004016194D1 (de) | 2003-10-14 | 2004-10-14 | Verfahren zum codieren eines ldpc codes |
US10/563,216 US7458009B2 (en) | 2003-10-14 | 2004-10-14 | Method for encoding low-density parity check code |
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EP (1) | EP1673870B1 (ko) |
JP (1) | JP4199279B2 (ko) |
KR (1) | KR100922956B1 (ko) |
CN (1) | CN1830149B (ko) |
AU (1) | AU2004306640B9 (ko) |
DE (1) | DE602004016194D1 (ko) |
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Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100523708B1 (ko) * | 2003-12-17 | 2005-10-26 | 한국전자통신연구원 | Ldpc 부호에 사용되는 거스 조건화된 패러티 검사행렬의 형성 방법 |
KR100678175B1 (ko) * | 2004-08-16 | 2007-02-28 | 삼성전자주식회사 | 가변 블록 길이를 가지는 블록 저밀도 패리티 검사 부호부호화/복호 장치 및 방법 |
KR100678176B1 (ko) * | 2004-04-28 | 2007-02-28 | 삼성전자주식회사 | 가변 블록 길이를 가지는 블록 저밀도 패리티 검사 부호부호화/복호 장치 및 방법 |
KR100837730B1 (ko) * | 2006-09-29 | 2008-06-13 | 한국전자통신연구원 | 사전에 지정한 패리티를 검사한 결과를 이용해 ldpc코드를 부호화하는 방법 |
KR100975695B1 (ko) * | 2007-02-02 | 2010-08-12 | 삼성전자주식회사 | 통신 시스템에서 신호 수신 장치 및 방법 |
WO2010058994A3 (en) * | 2008-11-24 | 2010-09-10 | Samsung Electronics Co., Ltd. | Channel-encoding/decoding apparatus and method using low-density parity-check codes |
KR20110002813A (ko) * | 2009-07-02 | 2011-01-10 | 삼성전자주식회사 | 인코딩 및 디코딩 장치 및 방법 |
US8132072B2 (en) | 2006-01-06 | 2012-03-06 | Qualcomm Incorporated | System and method for providing H-ARQ rate compatible codes for high throughput applications |
KR101128804B1 (ko) * | 2006-06-07 | 2012-03-23 | 엘지전자 주식회사 | 참조 행렬을 이용한 lpdc 부호화 및 복호화 방법 |
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KR20150118993A (ko) * | 2013-02-13 | 2015-10-23 | 퀄컴 인코포레이티드 | 높은 병렬성, 낮은 에러 플로어, 및 간단한 인코딩 원리를 갖는 리프팅된 ldpc 코드들에 대한 설계 |
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KR100523708B1 (ko) * | 2003-12-17 | 2005-10-26 | 한국전자통신연구원 | Ldpc 부호에 사용되는 거스 조건화된 패러티 검사행렬의 형성 방법 |
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KR20150118993A (ko) * | 2013-02-13 | 2015-10-23 | 퀄컴 인코포레이티드 | 높은 병렬성, 낮은 에러 플로어, 및 간단한 인코딩 원리를 갖는 리프팅된 ldpc 코드들에 대한 설계 |
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KR100922956B1 (ko) | 2009-10-22 |
JP4199279B2 (ja) | 2008-12-17 |
JP2007508774A (ja) | 2007-04-05 |
WO2005036758A1 (en) | 2005-04-21 |
US7458009B2 (en) | 2008-11-25 |
AU2004306640B9 (en) | 2008-11-13 |
EP1673870A1 (en) | 2006-06-28 |
AU2004306640A1 (en) | 2005-04-21 |
AU2004306640B2 (en) | 2008-04-24 |
CN1830149B (zh) | 2010-05-26 |
EP1673870B1 (en) | 2008-08-27 |
RU2006102662A (ru) | 2006-06-27 |
DE602004016194D1 (de) | 2008-10-09 |
EP1673870A4 (en) | 2007-05-02 |
CN1830149A (zh) | 2006-09-06 |
US20070022354A1 (en) | 2007-01-25 |
RU2308803C2 (ru) | 2007-10-20 |
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