KR20050001952A - Liquid crystal display device of in-plane switching and method for fabricating the same - Google Patents

Abstract

PURPOSE: An IPS(In-Plane Switching) mode LCD(Liquid Crystal Display) and a manufacturing method thereof are provided to prevent an aperture ratio from lowering when bonding lower and upper substrates and to reduce reflection of light at an upper portion of a data line and a gate line. CONSTITUTION: A lower substrate(110) and an upper substrate(100) are faced with each other with a predetermined distance. A gate line and a data line(114) are formed on the lower substrate lengthwise and cross-wise and define a pixel region. The first common line(111b) is arrayed toward the gate line. A TFT(Thin Film Transistor) is formed at a portion crossed with the gate line and the data line. An interfacial insulating layer(115) is formed on the entire surface of the lower substrate including the TFT. R(Red),G(Green) and B(Blue) color filter layers(116a,116b,116c) are formed on an upper portion of the data line and a channel region of the TFT, so that at least two color filter layers are overlapped with the upper portion. A planarization layer(117) is formed on the lower substrate including the RGB color filter layers. The second common line(119a) and a common electrode(119b) are formed on an upper portion of the gate line, the data line and the TFT and arrayed on a pixel region in a single direction. A pixel electrode(119c) is contacted with a drain electrode of the TFT and formed between the common electrodes with a constant distance.

Description

Transverse electric field type liquid crystal display device and its manufacturing method {LIQUID CRYSTAL DISPLAY DEVICE OF IN-PLANE SWITCHING AND METHOD FOR FABRICATING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a liquid crystal display device, and in particular, solves a reduction in aperture ratio due to a top / bottom bond margin, reduces reflection of light on the data line and the gate line, and moves to a thin film transistor channel region. A transverse electric field type liquid crystal display device suitable for improving image quality by reducing light incidence and a method of manufacturing the same.

As the information society develops, the demand for display devices is increasing in various forms.In recent years, liquid crystal display (LCD), plasma display panel (PDP), electro luminescent display (ELD), and vacuum fluorescent display (VFD) have been developed. Various flat panel display devices have been studied, and some are already used as display devices in various devices.

Among them, LCD is the most widely used as a substitute for CRT (Cathode Ray Tube) for the use of mobile image display device because of the excellent image quality, light weight, thinness, and low power consumption, and mobile type such as monitor of notebook computer. In addition, it is being developed in various ways, such as a television for receiving and displaying broadcast signals, and a monitor of a computer.

As described above, although various technical advances have been made in order for the liquid crystal display device to serve as a screen display device in various fields, the task of improving the image quality as the screen display device has many advantages and disadvantages.

Therefore, in order to use a liquid crystal display device in various parts as a general screen display device, the key to development is how much high definition images such as high definition, high brightness, and large area can be realized while maintaining the characteristics of light weight, thinness, and low power consumption. It can be said.

Such a liquid crystal display device may be broadly divided into a liquid crystal panel displaying an image and a driving unit for applying a driving signal to the liquid crystal panel, wherein the liquid crystal panel includes first and second glass substrates having a space and are bonded to each other; It consists of a liquid crystal layer injected between the said 1st, 2nd glass substrate.

The first glass substrate (TFT array substrate) may include a plurality of gate lines arranged in one direction at a predetermined interval, a plurality of data lines arranged at regular intervals in a direction perpendicular to the gate lines, and A plurality of pixel electrodes formed in a matrix form in each pixel region defined by crossing each gate line and data line, and a plurality of thin films that transmit signals of the data line to each pixel electrode by being switched by signals of the gate line The transistor is formed.

The second glass substrate (color filter substrate) includes a black matrix layer for blocking light in portions other than the pixel region, an R, G, B color filter layer for expressing color colors, and a common electrode for implementing an image. Is formed. Of course, the common electrode is formed on the first glass substrate in the transverse electric field type liquid crystal display device.

The first and second glass substrates are bonded by a sealing material having a predetermined space by a spacer and having a liquid crystal injection hole, and a liquid crystal is injected between the two substrates.

In this case, in the liquid crystal injection method, the liquid crystal is injected between the two substrates by osmotic pressure when the liquid crystal injection hole is immersed in the liquid crystal container by maintaining the vacuum state between the two substrates bonded by the reality. When the liquid crystal is injected as described above, the liquid crystal injection hole is sealed with a sealing material.

On the other hand, the driving principle of the liquid crystal display device as described above uses the optical anisotropy and polarization of the liquid crystal.

Since the liquid crystal is thin and long in structure, the liquid crystal has a direction in the arrangement of molecules, and the liquid crystal may be artificially applied to control the direction of the molecular arrangement.

Accordingly, when the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light polarized by optical anisotropy may be arbitrarily modulated to express image information.

Such liquid crystals may be classified into positive liquid crystals having a positive dielectric anisotropy and negative liquid crystals having a negative dielectric anisotropy according to an electrical specific classification, and liquid crystal molecules having a positive dielectric anisotropy are long axes of liquid crystal molecules in a direction in which an electric field is applied. The liquid crystal molecules arranged in parallel and having negative dielectric anisotropy are arranged perpendicularly to the direction in which the electric field is applied and the major axis of the liquid crystal molecules.

1 is an exploded perspective view illustrating a part of a general TN liquid crystal display device.

As shown in FIG. 1, the lower substrate 1 and the upper substrate 2 bonded to each other with a predetermined space, and the liquid crystal layer 3 injected between the lower substrate 1 and the upper substrate 2 are composed of. It is.

More specifically, the lower substrate 1 has a plurality of gate lines 4 arranged in one direction at regular intervals to define the pixel region P, and in a direction perpendicular to the gate lines 4. A plurality of data lines 5 are arranged at regular intervals, and a pixel electrode 6 is formed in each pixel region P where the gate line 4 and the data line 5 intersect, and each gate line The thin film transistor T is formed at the portion where (4) and the data line 5 intersect.

The upper substrate 2 includes a black matrix layer 7 for blocking light in portions other than the pixel region P, an R, G, and B color filter layer 8 for expressing color colors, and an image. The common electrode 9 is formed to implement the.

The thin film transistor T may include a gate electrode protruding from the gate line 4, a gate insulating film (not shown) formed on the front surface, an active layer formed on the gate insulating film above the gate electrode, and the data. And a source electrode protruding from the line 5 and a drain electrode to face the source electrode.

The pixel electrode 6 uses a transparent conductive metal having a relatively high light transmittance, such as indium-tin-oxide (ITO).

In the liquid crystal display device configured as described above, the liquid crystal layer 3 positioned on the pixel electrode 6 is aligned by a signal applied from the thin film transistor T, and the liquid crystal layer 3 is aligned with the alignment degree of the liquid crystal layer 3. Accordingly, the image can be expressed by controlling the amount of light passing through the liquid crystal layer 3.

As described above, the liquid crystal panel drives the liquid crystal by an electric field applied up and down, and has excellent characteristics such as transmittance and aperture ratio, and the common electrode 9 of the upper substrate 2 serves as a ground to discharge static electricity. It is possible to prevent the destruction of the liquid crystal cell.

However, the liquid crystal drive by the electric field applied up-down has a disadvantage that the viewing angle characteristics are not excellent.

Accordingly, in order to overcome the above disadvantages, a new technology, namely, a liquid crystal display device of IPS, has been proposed.

2 is a schematic cross-sectional view showing a liquid crystal display of a general IPS.

As shown in FIG. 2, the pixel electrode 12 and the common electrode 13 are formed on the lower substrate 11 on the same plane.

In addition, the liquid crystal layer 14 formed between the lower substrate 11 and the upper substrate 15 bonded to the lower substrate 11 may be disposed between the pixel electrode 12 and the common electrode 13 on the lower substrate 11. It works by electric field.

3A to 3B are diagrams illustrating phase transitions of liquid crystals when voltages are turned on and off in the IPS mode.

That is, FIG. 3A shows an off state in which no transverse electric field is applied to the pixel electrode 12 or the common electrode 13, so that the phase change of the liquid crystal layer 14 does not occur. For example, the pixel electrode 12 and the common electrode 13 are basically shifted by 45 ° in the horizontal direction.

FIG. 3B is an on state in which a transverse electric field is applied to the pixel electrode 12 and the common electrode 13, and a phase shift of the liquid crystal layer 14 occurs, and is about 45 ° compared to the off state of FIG. 3A. It can be seen that the horizontal direction of the pixel electrode 12 and the common electrode 13 and the twist direction of the liquid crystal have a twist angle.

As described above, in the liquid crystal display of the IPS, both the pixel electrode 12 and the common electrode 13 exist on the same plane.

An advantage of the transverse electric field method is that a wide viewing angle is possible.

That is, when the liquid crystal display device is viewed from the front, the liquid crystal display device may be visible in the up / down / left / right directions at about 70 °.

In addition, there is an advantage that the manufacturing process is simpler and the color shift according to the viewing angle is smaller than that of the liquid crystal display device.

However, since the common electrode 13 and the pixel electrode 12 are present on the same substrate, there is a disadvantage in that transmittance and aperture ratio due to light are reduced.

In addition, there is a disadvantage in that the response time due to the driving voltage must be improved and the cell gap is made uniform because the misalign margin of the cell gap is small.

That is, the transverse electric field type liquid crystal display device has the advantages and disadvantages as described above can be selected according to the user's use.

4A and 4B are perspective views showing the operation of the liquid crystal display of the IPS in the off state and the on state, respectively.

As shown in FIG. 4A, when no transverse electric field voltage is applied to the pixel electrode 12 or the common electrode 13, the alignment direction of the liquid crystal molecules 16 is the same as that of the initial alignment layer (not shown). Is arranged.

As shown in FIG. 4B, when the transverse electric field voltage is applied to the pixel electrode 12 and the common electrode 13, the alignment direction 16 of the liquid crystal molecules is arranged in the direction 17 to which the electric field is applied. Can be.

Hereinafter, a conventional liquid crystal display device will be described with reference to the accompanying drawings.

5 is a plan view of a liquid crystal display according to the prior art, and FIG. 6 is a cross-sectional view of the structure taken along lines II ′ and II ′ of FIG. 5.

FIG. 7 is a plan view of a liquid crystal display according to another conventional technology, and FIG. 8 is a cross-sectional view of the structure taken along line III-III ′ and IV-IV ′ of FIG. 6.

5 and 6, the liquid crystal display according to the related art includes a gate line 61 and a data line 64 arranged vertically and horizontally on a transparent lower substrate 60 to define a pixel region, and the gate. The common wiring 61b formed in one direction in the upper and lower portions of the pixel area in a direction parallel to the line 61 and the pixel in a direction parallel to the data line 64 and integrally formed with the common wiring 61b. A plurality of common electrodes 61c formed in the region, a gate electrode 61a protruding from one side of the gate line 61, and a lower substrate 60 including the gate electrode 61a are formed on the front surface of the lower substrate 60, such as SiNx or SiOx. The gate insulating layer 62 formed of a material, the active layer 63 formed in an island shape on the gate insulating layer 62 on the gate electrode 61a, and one side of the active layer 63 overlap each other. Protrude from the data line 64 The source electrode 64a and the drain electrode 64a which are spaced apart from the source electrode 64a and overlap the other side of the active layer 63, and extend from the drain electrode 64b to extend between the common electrode 61c. And a storage electrode 64c extending from the pixel electrode 64c and formed on the common wiring 61b.

In the above, the drain electrode 64b, the pixel electrode 64d and the storage electrode 64c are integrally formed on the same layer.

The upper substrate 50 corresponding to the lower substrate 60 having the above structure includes a black matrix layer 51 for preventing light leakage and a color filter layer of R, G, and B formed in a portion corresponding to the pixel region. It consists of 52.

In this case, the black matrix layer 51 formed on the upper substrate 50 extends between the data line 64 and the common electrode 61c arranged adjacent thereto. The data line 64, the gate line 61, The upper and lower bonding margins are widely formed in a region corresponding to the thin film transistor TFT.

Next, the liquid crystal display according to another conventional technology is arranged on the transparent lower substrate 80 vertically and horizontally as shown in FIGS. 7 and 8 to define the pixel region, the gate line 81 and the data line 84. And a common wiring 81b formed in one direction in the upper and lower portions of the pixel area in a direction parallel to the gate line 81 and integrally formed with the common wiring 81b and parallel to the data line 84. SiNx on the entire surface of the lower substrate 80 including the common electrode 81c formed in the pixel region in the direction, the gate electrode 81a protruding from one side of the gate line 81, and the gate electrode 81a. Or a gate insulating layer 82 formed of a material such as SiOx, an active layer 83 formed in an island shape on the gate insulating layer 82 on the gate electrode 81a, and the active layer 83 The data line 84 to overlap on one side A source electrode 84a protruding from the second electrode, a drain electrode 84b spaced apart from the source electrode 84a, and overlapping the other side of the active layer 83, and storage formed on one region of the common wiring 81b. First and second contact holes are formed on the entire surface of the lower substrate 80 including the electrode 84c, the source electrode 84a, and the drain electrode 84b, respectively, on the drain electrode 84b and the storage electrode 84c. An interlayer insulating film 85 having 87a and 87b and a drain electrode 84b and a storage electrode 84c through the first and second contact holes 87a and 87b and between the common electrode 81c. The pixel electrode 86 formed on the substrate.

In the above, the pixel electrode 86 is formed of a transparent conductive film.

As described above, the IPS liquid crystal display has a structure in which the common electrode and the pixel electrode are formed on the same substrate, and have a great advantage in improving the viewing angle.

However, the liquid crystal display of the conventional transverse electric field type (IPS) as described above has the following problems.

First, since the common wiring occupies one region of the pixel region separately from the gate line and the data line, the aperture ratio is lowered.

Second, since the black matrix layer formed on the upper substrate is designed in consideration of the upper and lower plate bonding margins, there is a problem that the opening ratio is lowered.

Third, since the color filter layer is formed on the upper substrate, a misalignment problem occurs between the pixel region and the color filter layer when the upper and lower substrates are bonded, and as the substrate becomes larger, the pixel region of the lower substrate and the corresponding upper substrate color Positional deviation between filter layers becomes large.

In order to solve such a problem, it is necessary to design to cope with the misalignment problem, which causes a problem that the actual aperture ratio is lowered when the upper and lower substrates are bonded.

The present invention has been made to solve the above problems, and in particular, an object of the present invention is to provide a transverse electric field type liquid crystal display device and a manufacturing method thereof suitable for solving the reduction of the aperture ratio when the upper and lower substrates are bonded.

Another object of the present invention is to reduce the light reflection on the data line and the gate line, and also to reduce the light incident to the channel region of the thin film transistor to improve the image quality of a transverse electric field type liquid crystal display device and its manufacturing method To provide.

1 is an exploded perspective view showing a part of a typical TN liquid crystal display device

Figure 2 is a schematic cross-sectional view showing a liquid crystal display device of a typical transverse electric field (IPS)

3A to 3B are diagrams illustrating phase transitions of liquid crystals when voltage on / off is performed in IPS mode.

4A and 4B are perspective views showing the operation of the IPS mode LCD in the off and on states, respectively.

5 is a plan view of a transverse electric field type liquid crystal display device according to the prior art;

FIG. 6 is a cross-sectional view taken along line II ′ and II ′ of FIG. 5.

7 is a plan view of a transverse electric field type liquid crystal display device according to another conventional technology

8 is a cross-sectional view taken along line III-III ′ and IV-IV ′ of FIG. 6.

9 is a plan view of a transverse electric field type liquid crystal display device according to an exemplary embodiment of the present invention.

FIG. 10 is a cross-sectional view taken along line V-V ′ and VI-VI ′ of FIG. 9;

11A to 11C are cross-sectional views illustrating a method of manufacturing a transverse electric field type liquid crystal display device according to an exemplary embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

100: upper substrate 110: lower substrate

111: gate line 111a: gate electrode

111b: first common wiring 112: gate insulating film

113: active layer 114: data line

114a: source electrode 114b: drain electrode

114c: Light blocking electrode 114d: Storage electrode

115: interlayer insulating film 116a: R color filter layer

116b: G color filter layer 116c: B color filter layer

117: planarization film 118: first contact hole

119a: second common wiring 119b: common electrode

119c: pixel electrode

A transverse electric field type liquid crystal display device of the present invention for achieving the above object includes a first substrate and a second substrate facing each other at a predetermined interval; Gate lines and data lines formed vertically and horizontally on the first substrate to define pixel regions; A first common wiring arranged in the gate line direction; A thin film transistor formed at an intersection of the gate line and the data line; An interlayer insulating film formed on the entire surface of the first substrate including the thin film transistor; An R, G, B color filter layer formed in each pixel region such that at least two layers overlap each other on the data line and the channel region of the thin film transistor; A planarization film formed on the first substrate including the R, G, and B color filter layers; A second common line and a common electrode overlapping the gate line, the data line, and the thin film transistor and arranged in one direction in the pixel area; And a pixel electrode contacted with the drain electrode of the thin film transistor and formed at a predetermined interval between the common electrodes.

The first common line may be formed on the same layer as the gate line.

The drain electrode may be formed on the gate insulating layer on the first common line to form a storage electrode.

A light shielding electrode is formed by overlapping an upper portion of one side of the front gate line.

The light blocking electrode may extend from the drain electrode.

The R, G, and B color filter layers may be formed by overlapping two or more layers only on the data line except the gate line and the thin film transistor.

The planarization layer is characterized in that it is composed of at least one of photo acryl, polyimide, BCB (Benzo Cyclo Butene).

The planarization layer may have a first contact hole in one region of the storage electrode extending from the drain electrode.

The storage electrode extending from the pixel electrode and the drain electrode is contacted through the first contact hole.

The second common wiring, the common electrode, and the pixel electrode may be formed on the same layer.

The second common line may be formed along an upper portion of the gate line.

The common electrode may be integrally formed with the second common wiring, and may be formed on an upper portion of the data line and a region of the pixel region.

The common electrode on the data line is wider than the data line, and the common electrode formed on the pixel area is arranged in parallel with the data line.

The second common wiring, the common electrode, and the pixel electrode may be formed of indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), or indium tin zinc oxide (Indium Tin). Zinc Oxide: ITZO).

The thin film transistor may include a gate electrode protruding from one side of the gate line, a gate insulating film formed on an entire surface of the lower substrate including the gate electrode, an active layer formed in an island shape on the gate insulating film on the gate electrode; And a source electrode protruding from the data line and overlapping an upper portion of the active layer, and a drain electrode spaced apart from the source electrode at a predetermined interval and overlapping the other side of the active layer.

And a light shielding film is formed on the planarization film above the channel region of the thin film transistor.

The light blocking film is formed of at least one metal of chromium (Cr), molybdenum (Mo), copper (Cu), tantalum (Ta), or aluminum (Al).

The surface of the light shielding film is characterized in that it further comprises an oxide film is provided to reduce the reflection of light.

According to an aspect of the present invention, there is provided a method of manufacturing a transverse electric field type liquid crystal display device, including: forming a gate line having a gate electrode on one side of a substrate; Forming a first common line in parallel with the gate line; Forming a gate insulating film on the substrate including the gate line; Forming an active layer on the gate electrode; Forming a data line intersecting with the gate line to define a pixel area; Forming a source electrode and a drain electrode to overlap one side and the other side of the active layer; Forming an interlayer insulating film on an entire surface of the first substrate including the thin film transistor; Forming an R, G, B color filter layer in each pixel region such that at least two layers overlap each other on the data line and the channel region of the thin film transistor; Forming a planarization film on the first substrate including the R, G, and B color filter layers; Forming a second common line and a common electrode overlapping the gate line, the data line, and the channel region to have one direction in the pixel region; Forming a pixel electrode in the pixel region to have a predetermined interval between the common electrode.

The first common line may be formed on the same layer as the gate line.

And forming a storage electrode extending from the drain electrode on the gate insulating layer on the first common line.

A light blocking electrode is further formed to overlap the upper portion of one side of the front gate line, and the light blocking electrode extends from the drain electrode.

The R, G, and B color filter layers may further include two or more layers overlapping only the data line except the gate line and the thin film transistor.

The planarization layer is formed using at least one of photoacryl, polyimide, and benzocyclobutene (BCB).

Etching the color filter layer and the interlayer insulating layer to expose one region of the drain electrode, and forming a contact hole to expose one region of the drain electrode; and etching the planarization layer on the contact hole to drain the drain. A first contact hole is formed on the drain electrode through a second process of forming a contact hole in one region of the electrode.

The second common wiring, the common electrode, and the pixel electrode may include depositing a transparent conductive layer on the planarization layer, and selectively removing the transparent conductive layer through a photo and etching process.

The transparent conductive film may be formed using indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO). It is characterized by forming.

The second common line may be formed to overlap the gate line and the thin film transistor.

The common electrode may be formed integrally with the second common line, overlap the upper portion of the second common line in a wider width than the data line, and extend from the second common line to be arranged in one direction in the pixel area. .

And forming a light shielding film on the planarization film above the channel region of the thin film transistor.

Forming an oxide film to reduce the reflection of light on the surface of the light shielding film is characterized in that it further comprises.

The light shielding film may include depositing a metal layer on the planarization layer, and patterning the metal layer by photo and photo etching so as to remain only on an upper portion of a channel region of the thin film transistor.

The metal layer is characterized in that at least one of chromium (Cr), molybdenum (Mo), copper (Cu), tantalum (Ta) or aluminum (Al).

Hereinafter, a transverse electric field type liquid crystal display device and a manufacturing method thereof according to a preferred embodiment of the present invention will be described with reference to the accompanying drawings.

The present invention is a transverse electric field type liquid crystal display device in which a common electrode is arranged on a lower substrate, and has a color filter on TFT array (COT) structure in which a color filter layer is formed on a lower substrate.

In addition, it is characterized in that two or more layers of color filter layers are formed on the data line of the lower substrate and the thin film transistor.

In addition, the light shielding film is formed by using metal in the channel region of the TFT of the lower substrate in the COT structure.

First, a transverse electric field type liquid crystal display device according to an embodiment of the present invention will be described.

FIG. 9 is a plan view of a transverse electric field type liquid crystal display device according to an exemplary embodiment of the present invention, and FIG. 10 is a cross-sectional view of the structure taken along lines V-V ′ and VI-VI ′ of FIG. 9.

As shown in FIGS. 9 and 10, a transverse electric field type liquid crystal display device according to the present invention includes a gate line 111 arranged in one direction on a transparent lower substrate 110 and the gate line 111. The gate electrode 111a protruding from one side, the first common wiring 111b arranged in parallel with the same material on the same layer as the gate line 111, the gate electrode 111a and the first common wiring 111b. A gate insulating film 112 formed of a material such as SiNx or SiOx on the entire surface of the lower substrate 120 and an active layer formed in an island shape on the gate insulating film 112 above the gate electrode 111a. 113, a data line 114 intersecting with the gate line 111 to define a pixel region, and a source electrode protruding from the data line 114 and overlapping an upper portion of one side of the active layer 113. 114a and a predetermined distance from the source electrode 114a. A drain electrode 114b spaced apart and overlapped on the other side of the active layer 113, a light shielding electrode 114c formed to overlap an upper portion of one side of the gate line of the previous stage, and a storage electrode extending from the drain electrode 114b ( 114d), an interlayer insulating film 115 formed on the entire surface of the lower substrate 110 including the data line 114, and at least two or more layers overlapping the data line 114, the gate line 111, and the thin film transistor. First, R, G, and B color filter layers 116a, 116b, and 116c formed in each pixel region of the lower substrate 110 and one region of the storage electrode 114d extending from the drain electrode 114b. Planarization layer 117 formed on the lower substrate 110 including the R, G, and B color filter layers 116a, 116b, and 116c to have contact holes 118, and planarization of the gate line 111 and the upper side of the thin film transistor. The second common wiring 119a formed on the film 117 and the second common wiring 119a are integrally formed with each other. And a common electrode 119b formed in one direction on the upper portion of the data line 114 and in the pixel area, the drain electrode 114b and the storage electrode extending through the first contact hole 118. And a pixel electrode 119c in contact with 114d and spaced apart from each other by a predetermined interval between the common electrodes 119b.

Although not shown in the drawing, an alignment layer (not shown) made of polyimide is formed on the entire surface of the lower substrate 110.

The planarization layer 117 has a thickness of about 3 μm in order to prevent a delay of signals of the gate line 111 and the data line 114 by the second common line 119a and the common electrode 119b. At least one of photoacryl, polyimide, and BCB (Benzo Cyclo Butene) having a low dielectric constant organic insulating film is formed.

In addition, since the storage electrode 114d is formed by extending from the drain electrode 114b on the gate insulating layer 112 on the first common wiring 111b, the present invention forms a storage on common structure. .

The second common wiring 119a, the common electrode 119b, and the pixel electrode 119c are formed on the same layer, and are indium tin oxide (ITO), tin oxide (TO), and indium zinc. It is composed of Indium Zinc Oxide (IZO) or Indium Tin Zinc Oxide (ITZO).

The common electrode 119b is completely overlapped with the upper portion of the data line 114 with a width wider than that of the data line 114 to drive the lateral electric field together with the adjacent pixel electrode 119c, and the common electrode 119b in the pixel region It is arranged parallel to the line 114.

As described above, when the second common line 119a and the common electrode 119b are overlapped on the gate line 111 and the data line 114, the signal of the gate line and the signal of the data line may not be applied to the liquid crystal. Therefore, light leakage due to distortion of the liquid crystal alignment state can be prevented.

The storage capacitor is formed between the first common wiring 111b and the storage electrode 114d and is additionally formed between the light blocking electrode 114c extending from the front gate line and the front gate line.

In this case, the light blocking electrode 114c is configured to remove light leakage by preventing distortion of an electric field caused by the gate signal. Since the light blocking electrode 114c is connected to the storage electrode 114d, a storage capacitor can be formed between the front gate line and the front gate line.

The present invention has a structure in which light leakage due to light incident from the backlight unit does not occur. However, since external light is reflected from the data line and the gate line, light leakage may occur in an actual use environment, thereby reducing reflection of light. To this end, as described above, the R, G, and B color filter layers 116a, 116b, and 116c are formed by overlapping two or more layers on the data line 114, the gate line 111, and the thin film transistor.

FIG. 9 shows a configuration in which three layers overlap in the order of the R color filter layer 116a? G color filter layer 116b? B color filter layer 116c.

In addition, the R, G, and B color filter layers 116a, 116b, and 116c may be formed by overlapping two or more layers only on the data line 114 and the thin film transistor except for the gate line 111. That is, the R, G, and B color filter layers 116a, 116b, and 116c may be overlapped on the data line 114 and the thin film transistor, and may be selectively overlapped on the gate line 111.

When the color filter layer is formed as described above, absorption occurs first through the top color filter layer in which the external light coming from the upper side of the liquid crystal panel overlaps, and is reflected from the data line 114 and the gate line 111 and then As the light is absorbed while passing through the lower color filter layer, the reflected light is greatly reduced.

Although not shown in the drawings, a light shielding film formed of an opaque metal may be further formed on the planarization film 117 on the channel region of the thin film transistor.

When the light blocking film formed of an opaque metal is formed on the planarization film 117 above the channel region of the thin film transistor, the lower substrate 110 and the upper substrate 100 formed as described above do not have a black matrix layer. Only an orientation film (not shown) is comprised.

When the light blocking film is not formed on the channel region of the thin film transistor of the lower substrate 110, a black matrix layer is formed on the upper substrate 100 so as to cover the channel region of the thin film transistor.

The light shielding film is not formed of resin, but is formed of metal.

The reason why the light-shielding film is not formed of resin and is formed of metal as described above is because resin has a high material and low resistivity, and thus has poor electrical characteristics. There is a problem of impurity contamination and particle source of the metal because the metal does not cause the same problem as the resin.

In this case, at least one of chromium (Cr), molybdenum (Mo), copper (Cu), tantalum (Ta), or aluminum (Al) is used as the metal constituting the light shielding film.

In addition, an oxide film may be further provided on the surface of the light blocking film to reduce reflection of light.

Although not shown in the drawings, the light blocking film may be formed to surround the outer portion of the liquid crystal panel to serve as a light blocking film that prevents light leakage from the backlight unit formed under the liquid crystal panel.

In addition, although the second common wiring 119a and the common electrode 119b are not shown in the drawing, a second contact hole is formed to expose the first common wiring 111b so that the first common wiring 111b is formed inside the pixel region. You can also make contact with). The second common wiring 119a and the common electrode 119b may be in contact with the first common wiring 111b outside the active area of the panel, or may be externally supplied with power from the first common wiring 111b. .

Next, the manufacturing method of the transverse electric field type liquid crystal display device which concerns on the Example of this invention is demonstrated.

11A to 11C are cross-sectional views illustrating a method of manufacturing a transverse electric field type liquid crystal display device according to the present invention.

In the method of manufacturing a transverse electric field type liquid crystal display device according to the present invention, first, as illustrated in FIG. 11A, a conductive metal is deposited on a transparent lower substrate 110, and the conductive metal is patterned by using a photo and etching process. A gate pad (not shown) having one end widened to a predetermined area, a gate line 111 extending in one direction from the gate pad, and a gate electrode 111a protruding from the gate line 111 in one direction Form.

In addition, a first common wiring 111b is formed on the same layer as the gate line 111 so as to be arranged in a direction parallel to the gate line 111.

Thereafter, the gate insulating layer 112 is formed on the entire surface of the lower substrate 110 on which the gate line 111 and the first common wiring 111b are formed.

The gate insulating layer 112 may use a silicon nitride layer (SiNx) or a silicon oxide layer (SiO ₂ ).

Thereafter, a semiconductor layer (amorphous silicon + impurity amorphous silicon) is formed on the gate insulating layer 112.

Subsequently, the semiconductor layer is patterned by photo and etching processes to form an active layer 113 having an island shape on the gate electrode 111a.

Subsequently, a conductive metal is deposited on the entire surface of the lower substrate 110 on which the active layer 113 is formed, and patterned through photo and etching processes to cross the gate line 111 to define a data region 114. ), A source pad (not shown) having a predetermined area at an end thereof, a source electrode 114a protruding in one direction from the data line 114, and a drain electrode separated from the source electrode 114a at a predetermined interval. Form 114b.

In this case, the storage electrode 114d is formed on the first common wiring 111b to extend from the drain electrode 114b. The storage capacitor is a storage on common structure.

A light blocking electrode 114c is formed to extend from the storage electrode 114d so as to overlap the upper portion of the one side of the front gate line.

As in the above process, a thin film transistor is formed at a portion where the gate line 111 and the data line 114 cross each other.

Subsequently, as shown in FIG. 11B, an interlayer insulating film 115 is formed on the entire surface of the lower substrate 110 on which the data line 114 is formed.

The interlayer insulating film 115 is formed of an oxide film or a nitride film serving as a protective film.

Subsequently, R, G, and B color filter layers 116a, 116b, and 116c are sequentially formed in each pixel area such that at least two layers overlap each other on the gate line 111, the data line 114, and the thin film transistor.

In this case, the R, G, B color filter layers 116a, 116b, and 116c may be formed by overlapping two or more layers only on the data line 114 and the thin film transistor except for the gate line 111. That is, the R, G, and B color filter layers 116a, 116b, and 116c may be overlapped on the data line 114 and the thin film transistor, and may be selectively overlapped on the gate line 111.

Next, the R, G, and B color filter layers 116a, 116b, and 116c and the interlayer insulating layer 115 are etched to expose one region of the storage electrode 114d extending from the drain electrode 114b. 118).

Next, as shown in FIG. 11C, the planarization film 117 is formed on the lower substrate 110 including the R, G, and B color filter layers 116a, 116b, and 116c.

In this case, the planarization layer 118 may be formed using at least one of photoacryl, polyimide, and benzocyclobutene (BCB).

Next, the planarization layer 117 on the first contact hole 118 is etched to form a first contact hole 118 so that a region of the storage electrode 114d extending from the drain electrode 114b is exposed. .

The first contact hole 118 forming process may be performed two times as described above, or may be formed only once after the planarization film 117 is formed.

Although not shown in the drawing, the planarization film 117, the R, G, and B color filter layers 116a, 116b, and 116c, the interlayer insulating film 115, and the gate insulating film are exposed so that one region of the first common wiring 111b is exposed. The second contact hole may be formed by sequentially etching 112.

Subsequently, after the transparent conductive film is deposited on the planarization layer 117, the transparent conductive film is selectively removed through a photo and etching process, thereby the second common wiring 119a, the common electrode 119b, and the pixel electrode 119c. ).

In this case, the second common wiring 119a is formed to overlap the gate line 111 and the thin film transistor.

The common electrode 119b is connected to the second common line 119a, and is formed to overlap the upper portion of the common line 119a with a width wider than that of the data line 114. The common electrode 119b extends from the second common line 119a and extends in one direction to the pixel area. Are arranged. In this case, the second common electrode 119b formed in the pixel area is arranged in parallel with the data line 114.

The pixel electrode 119c, the drain electrode 114b, and the storage electrode 114d are connected to each other through the first contact hole 118.

The transparent conductive film may be formed of indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO). Can be formed.

Although not shown in the drawings, a metal layer is deposited on the planarization film 117 before forming the second common wiring 119a, the common electrode 119b, and the pixel electrode 119c. A process of forming a light blocking film on the channel region of the thin film transistor by patterning through etching may be added.

In this case, the light blocking film may be formed using at least one of chromium (Cr), molybdenum (Mo), copper (Cu), tantalum (Ta), or aluminum (Al).

The light shielding film may further include a step of forming an oxide film in order to reduce reflection of light on the surface, wherein the step of forming the oxide film may be formed by performing a heat treatment process after patterning the metal layer.

The oxide film on the surface of the light shielding film may be formed by depositing a transparent conductive film for forming a common electrode and a pixel electrode in an oxygen atmosphere.

Although not shown in the drawings, an alignment layer made of polyimide or photo-alignment material is formed on the entire surface of the lower substrate 110 including the second common wiring 119a, the common electrode 119b, and the pixel electrode 119c. Form.

Here, the alignment layer made of polyimide is determined by mechanical rubbing, and the photoreactive material made of polyvinylcinnamate based material or polysiloxane based material is oriented by irradiation with light such as ultraviolet rays. This is determined.

At this time, the orientation direction is determined by the irradiation direction of the light or the property of the irradiated light, that is, the polarization direction.

Thereafter, the upper substrate 100 is prepared, and a sealing material (not shown) for bonding the lower substrate 110 and the upper substrate 100 is formed on the lower substrate 110 or the upper substrate 100.

Subsequently, the upper substrate 100 and the lower substrate 110 are bonded to each other.

Although not shown in the drawing, an alignment layer of the same material as the lower substrate 110 is formed on the front surface of the upper substrate 100.

In the upper substrate 100, the black matrix layer may be formed in an area corresponding to the thin film transistor only when the light blocking film is not formed on the lower substrate 110.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the above embodiments, but should be defined by the claims.

As described above, the transverse electric field type liquid crystal display device and the manufacturing method thereof have the following effects.

First, since the color filter on TFT array (COT) is applied to a structure in which at least two R, G, and B color filter layers overlap at least two channel regions of the data line, the gate line, and the thin film transistor, the aperture ratio may be improved.

Second, since the R, G, and B color filter layers overlap at least two of the data line, the gate line and the channel region of the thin film transistor, the external light may be absorbed to reduce reflection in the data line and the gate line. In addition, the image quality of the liquid crystal panel may be improved by reducing light incident to the channel region of the thin film transistor.

Third, since the common wiring and the common electrode overlap each other on the gate line, the data line, and the channel region to serve as a black matrix layer, it is possible to prevent the misalignment problem caused by the upper and lower substrate bonding.

Claims (32)

A first substrate and a second substrate facing each other at a predetermined interval; Gate lines and data lines formed vertically and horizontally on the first substrate to define pixel regions; A first common wiring arranged in the gate line direction; A thin film transistor formed at an intersection of the gate line and the data line; An interlayer insulating film formed on the entire surface of the first substrate including the thin film transistor; An R, G, B color filter layer formed in each pixel region such that at least two layers overlap each other on the data line and the channel region of the thin film transistor; A planarization film formed on the first substrate including the R, G, and B color filter layers; A second common line and a common electrode overlapping the gate line, the data line, and the thin film transistor and arranged in one direction in the pixel area; And a pixel electrode contacted with the drain electrode of the thin film transistor and formed with a predetermined distance between the common electrode. The method of claim 1, And the first common line is formed on the same layer as the gate line. The method of claim 1, And a drain electrode is formed on the gate insulating layer on the first common line to form a storage electrode. The method of claim 1, The R, G and B color filter layers may be formed by overlapping two or more layers only on the data line and the thin film transistor except for the gate line. The method of claim 1, And the planarization layer is formed of at least one of photoacryl, polyimide, and benzocyclobutene (BCB). The method of claim 1, And the planarization layer has a first contact hole in one region of the storage electrode extending from the drain electrode. The method of claim 6, And a storage electrode extending from the pixel electrode and the drain electrode through the first contact hole. The method of claim 1, And the second common wiring, the common electrode and the pixel electrode are formed on the same layer. The method of claim 1, And the second common line is formed along an upper portion of the gate line. The method of claim 1, And the common electrode is integrally formed with the second common wiring and formed in an upper portion of the data line and in one region of the pixel region. The method of claim 10, The common electrode above the data line is formed to have a wider width than the data line, and the common electrode formed in the pixel area is arranged in parallel with the data line. The method of claim 1, The second common wiring, the common electrode, and the pixel electrode may be formed of indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), or indium tin zinc oxide (Indium Tin). Transverse electric field type liquid crystal display device characterized by consisting of Zinc Oxide (ITZO). The method of claim 1, The thin film transistor may include a gate electrode protruding from one side of the gate line; A gate insulating film formed on an entire surface of the lower substrate including the gate electrode; An active layer formed in an island shape on the gate insulating layer on the gate electrode; A source electrode protruding from the data line and overlapping an upper portion of one side of the active layer; And a drain electrode which is spaced apart from the source electrode at a predetermined interval and overlaps the other side of the active layer. The method of claim 1, And a light shielding electrode is formed to overlap an upper portion of one side of a gate line of a front end, and a light shielding layer is formed on the planarization layer above the channel region of the thin film transistor. The method of claim 14, And the light blocking electrode extends from the drain electrode. The method of claim 14, And wherein the light blocking film is formed of at least one metal of chromium (Cr), molybdenum (Mo), copper (Cu), tantalum (Ta), or aluminum (Al). The method of claim 14, The surface of the light shielding film further comprises an oxide film is provided to reduce the reflection of the transverse electric field type liquid crystal display device. Forming a gate line having a gate electrode on one side of the substrate; Forming a first common line in parallel with the gate line; Forming a gate insulating film on the substrate including the gate line; Forming an active layer on the gate electrode; Forming a data line intersecting with the gate line to define a pixel area; Forming a source electrode and a drain electrode to overlap one side and the other side of the active layer; Forming an interlayer insulating film on an entire surface of the first substrate including the thin film transistor; Forming an R, G, B color filter layer in each pixel region such that at least two layers overlap each other on the data line and the channel region of the thin film transistor; Forming a planarization film on the first substrate including the R, G, and B color filter layers; Forming a second common line and a common electrode overlapping the gate line, the data line, and the channel region to have one direction in the pixel region; And forming a pixel electrode in the pixel region so as to have a predetermined interval between the common electrodes. The method of claim 18, And wherein the first common wiring is formed on the same layer as the gate line at the same time. The method of claim 18, And forming a storage electrode extending from the drain electrode on the gate insulating layer on the first common line. The method of claim 18, The R, G and B color filter layers may further include two or more layers overlapping only the data line and the thin film transistor except for the gate line. The method of claim 18, And the planarization layer is formed using at least one of photoacryl, polyimide, and benzocyclobutene (BCB). The method of claim 18, A first process of forming a contact hole to expose one region of the drain electrode by etching the color filter layer and the interlayer insulating layer to expose one region of the drain electrode; And forming a first contact hole on the drain electrode by etching the planarization layer on the contact hole to form a contact hole in one region of the drain electrode. Manufacturing method. The method of claim 18, Depositing a transparent conductive film on the second common wiring, the common electrode and the pixel electrode on the planarization film; And selectively removing the transparent conductive film through a photo and an etching process. The method of claim 24, The transparent conductive film may be formed using indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO). A method of manufacturing a transverse electric field type liquid crystal display device, characterized in that it is formed. The method of claim 18, And the second common line is formed to overlap the gate line and the thin film transistor. The method of claim 18, The common electrode may be formed integrally with the second common line, overlap the upper portion of the second common line in a wider width than the data line, and extend from the second common line to be arranged in one direction in the pixel area. Method of manufacturing a transverse electric field type liquid crystal display device. The method of claim 18, Forming a light blocking electrode to overlap an upper portion of one side of the front gate line; And forming a light shielding film on the planarization film above the channel region of the thin film transistor. The method of claim 28, And wherein the light blocking electrode extends from the drain electrode. The method of claim 28, And forming an oxide film to reduce reflection of light on the surface of the light shielding film. The method of claim 28, The light shielding film is a process of depositing a metal layer on the planarization film; And patterning the metal layer through photolithography and photolithography so as to remain only in an upper portion of the channel region of the thin film transistor. The method of claim 31, wherein The metal layer is a method of manufacturing a transverse electric field liquid crystal display device, characterized in that using at least one of chromium (Cr), molybdenum (Mo), copper (Cu), tantalum (Ta) or aluminum (Al).