KR20040008721A - Method for fabricating capacitor in semiconductor device - Google Patents

Abstract

PURPOSE: A method for manufacturing a capacitor of a semiconductor device is provided to be capable of obtaining high capacitance. CONSTITUTION: The first lower electrode(24) is formed on a semiconductor substrate(20). A sacrificial layer is formed on the first lower electrode. An 'H' shaped capacitor hole is formed by selectively removing the sacrificial layer. The second lower electrode(28) is then formed by filling a conductive layer in the 'H' shaped capacitor hole. After the capacitor sacrificial layer is removed, a dielectric film and an upper electrode are sequentially formed on the surface of the first and second lower electrode(24,28).

Description

Method for fabricating capacitor in semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a method for manufacturing a capacitor of a semiconductor device.

As the degree of integration of semiconductor devices, in particular DRAM (Dynamic Random Access Memory) semiconductor memories, increases, the area of memory cells, which are basic units for information storage, is rapidly being reduced.

Such a reduction in the memory cell area is accompanied by a reduction in the area of the cell capacitor, thereby lowering the sensing margin and the sensing speed, and causes a problem that the durability against soft errors caused by α-particles is degraded. Accordingly, there is a need for a method capable of securing sufficient capacitance in a limited cell area.

The capacitance C of the capacitor is defined as in Equation 1 below.

C = ε · As / d

Is the dielectric constant, As is the effective surface area of the electrode, and d is the distance between the electrodes.

Therefore, in order to increase the capacitance of the capacitor, the surface area of the electrode, the thickness of the dielectric thin film, or the dielectric constant must be increased.

Among these, the first method of increasing the surface area of the electrode has been considered. Capacitors of three-dimensional structures, such as concave structures, cylinder structures, and multilayer fin structures, are all proposed to increase the effective surface area of electrodes in a limited layout area and are widely used in concave or cylindrical shapes. It is used.

On the other hand, silicon is mainly used as a lower electrode of the capacitor because a stack of silicon nitride and oxide or tantalum oxide is applied as a capacitor dielectric material.

Since maintaining a constant capacitance in a limited area of an increasingly integrated semiconductor device is technically difficult in the manufacturing method of a three-dimensional capacitor, the lower electrode is formed in a concave shape, and then a silicon seed forming process is performed. The surface area has been increased.

However, as more and more fine design rules are applied, there is a disadvantage in that space for applying an additional silicon seed forming process is not secured. To overcome this, cylindrical capacitors are now mainly applied instead of concave. Cylindrical capacitors have the effect of increasing the area by applying an additional seed process by removing the sacrificial film for the lower electrode formed as a formwork and using the area of the capacitor to the outer surface of the lower electrode.

1A to 1D are cross-sectional views illustrating a method of manufacturing a cylindrical capacitor according to the prior art.

First, as shown in FIG. 1A, the interlayer insulating film 12 is formed on the semiconductor substrate 10 on which the active region 11 is formed, and then penetrates the interlayer insulating film 12 to form an active region ( A contact hole connected to 11) is formed. The contact hole is filled with a conductive material to form the contact plugr 13. Subsequently, the capacitor insulating film 14 is formed as large as the capacitor is formed. Subsequently, the capacitor insulating film 15 is selectively removed so that the contact plug 13 is exposed to form the capacitor hole 15. The capacitor insulating film 15 serves as a form for forming the lower electrode.

Subsequently, as shown in FIG. 1B, the lower electrode 16 is formed of a conductive film on the sidewalls and the bottom of the capacitor hole 15.

Subsequently, as shown in FIG. 1C, the capacitor insulating film 14 is removed to form a cylindrical capacitor lower electrode 16. Thus, by forming the lower electrode in a cylindrical shape, the outer side of the lower electrode 16 as described above is formed. It is effective to use as the area of the capacitor to the surface.

Subsequently, a dielectric thin film 17 is formed on the lower electrode 16, and an upper electrode 18 is formed thereon.

1D is a view showing the lower electrode in three dimensions. Capacitors are manufactured by forming a lower electrode of a capacitor in a three-dimensional cylindrical shape and forming a dielectric thin film and an upper electrode on the surface of the lower electrode in order to obtain a larger capacitance with the limited area as described above.

However, as capacitors are manufactured in increasingly fine patterns, the height of the cylindrical lower electrode becomes higher and the width becomes narrower to form the dielectric thin film and the upper electrode on the surface of the pattern of the fine lower electrode, especially the lower end of the lower electrode. Is getting harder. On the other hand, as the height of the lower electrode increases, subsequent metal contact processes, package processes, and the like become difficult to reliably proceed.

It is an object of the present invention to provide a method for manufacturing a capacitor of a semiconductor device that can provide a larger capacitance in a limited area.

1A to 1D are cross-sectional views showing a method of manufacturing a cylindrical capacitor according to the prior art.

2 to 6 are cross-sectional views showing a method of manufacturing a semiconductor capacitor according to a preferred embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

20: substrate

21: active area

22: interlayer insulating film

23: Contact Plug

24: first lower electrode

25: lower electrode separator

26: sacrificial film for the capacitor

27: capacitor hole

28: second lower electrode

The present invention for achieving the above object comprises the steps of forming a first lower electrode on the substrate; Forming a sacrificial layer for a capacitor on the first lower electrode at a height such that a second lower electrode is formed; Selectively removing the capacitor sacrificial layer on the first lower electrode to form a capacitor hole having a 'H' shape in cross section; Filling the capacitor hole with a conductive material to form a second lower electrode: removing the sacrificial layer for the capacitor; Forming a dielectric thin film on the surfaces of the first and second lower electrodes; And it provides a method of manufacturing a capacitor of a semiconductor device comprising the step of forming an upper electrode on the dielectric thin film.

In addition, the present invention includes a first lower electrode on the substrate; A second lower electrode of an 'H' pillar shape provided on the first lower electrode; It provides a capacitor of a semiconductor device having a dielectric thin film provided on the surface of the first and second lower electrode; and an upper electrode provided on the dielectric thin film.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

2 to 6 is a view showing a cylindrical capacitor manufacturing method according to a preferred embodiment of the present invention.

First, as shown in FIG. 2A, the interlayer insulating film 22 is formed on the semiconductor substrate 20 on which the active region 21 is formed, and then penetrates the interlayer insulating film 22 to form the active region of the semiconductor substrate 20 ( A contact hole connected to 21 is formed. A contact plug 23 is formed by filling a contact hole with a conductive snow material. Subsequently, a lower electrode separator 25 for separating the lower electrode is formed as an insulating nitride film thereon. Here, the insulating nitride film forms SiON, Si ₃ N _4, or the like by chemical vapor deposition.

3, the lower electrode isolation layer 25 is selectively removed so that the contact plug 23 is exposed, and a conductive film for the first lower electrode is formed thereon. Then, an etch back process or chemical mechanical polishing is performed. The planarization process may be performed by a process or the like, and the first lower electrode 24 may be formed by removing the first lower electrode conductive film to expose the lower electrode separation layer 25.

Subsequently, as shown in FIG. 4A, the sacrificial layer 26 for the capacitor is formed to have a height at which the second lower electrode of the capacitor is to be formed. In the subsequent process, the sacrificial film 26 for the capacitor is used as a form for forming the second lower electrode. The capacitor sacrificial layer 26 is formed by chemical vapor deposition by applying a silicon oxide film such as USG (Undoped-Silicate Glass), PSG (Phospho-Silicate Glass) or BPSG (Boro-Phospho-Silicate Glass).

Subsequently, the capacitor sacrificial layer 26 is selectively etched to expose the first lower electrode 24, so that the capacitor sacrificial layer 26 on the first lower electrode 24 remains in an 'H' shape. At this time, the first lower electrode 24 is formed wide enough in the peripheral region of the contact hole. The sacrificial film 26 for the capacitor is used as an etching barrier when etching. Here, the 'H' shape is formed in the bit line direction.

In this case, a Co mask may be used to open the cell portion where the cylindrical lower electrode is to be formed and proceed with the process. Co mask refers to a mask used to form a photoresist film on the entire substrate and to remove the photoresist film of the cell region in order to process the cell region only. This is to divide the process of the cell region and the peripheral region in order to increase the wafer yield.

4B is a plan view after the capacitor sacrificial film is selectively removed.

Referring to FIG. 4B, it can be seen that the sacrificial layer 26 for the capacitor formed on the first lower electrode 24 is left in the 'H' shape, and FIG. 4A is a cross-sectional view taken along the AA 'surface of FIG. 4B. .

Subsequently, as illustrated in FIG. 5A, the second lower electrode 28 is formed by filling the capacitor hole 27 with a conductive material. 5B is a plan view after the second lower electrode 28 is formed. The first lower electrode may be formed of a polysilicon film, and the second lower electrode may be made of metal.

Subsequently, the capacitor sacrificial film 26 is removed, a dielectric thin film is formed on the surfaces of the first and second lower electrodes 24 and 28, and an upper electrode is formed thereon. FIG. 6B is a plan view after the capacitor sacrificial film 26 is removed, and FIG. 5A is a cross-sectional view taken along the line BB ′ of FIG. 5B. Here, the dielectric thin film may be formed of NO (Nitride-Oxide) or ONO, or a high dielectric material such as Ta ₂ O ₅ , (Ba, Sr) TiO ₃ (BST), or (Pb, Zr) TiO ₃ (PZT), ( Pb, La) (Zr, Ti) O ₃ (PLZT), SrBi ₂ Ta ₂ O ₉ (SBT), SrBi ₂ (Ta _1-x , Nbx) ₂ O ₉ (SBTN), Bi _4-x La _x Ti ₃ Ferroelectric materials such as O ₁₂ (BLT) and Bi ₄ Ti ₃ O ₁₂ (BIT) may be used, and Pt, Ir, Ru, IrOx, W, TiN, and polysilicon films may be used as the upper electrode.

Figure 6 shows in three dimensions the shape of the first and second lower electrodes according to the present invention.

Therefore, according to the present invention, after forming the first lower electrode connecting the shape of the lower electrode to the contact plug 23 and forming the second lower electrode on the first lower electrode by the pillar of 'H' shape, By forming a dielectric thin film and an upper electrode on the second lower electrode, a capacitor having a larger capacitance in a limited area can be formed, thereby lowering the height of the capacitor, thereby facilitating a subsequent metal contact process. have.

In addition, since the overall thickness of the semiconductor device can be lowered, the packaging process can be made easier.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

According to the present invention can be expected to improve the productivity by increasing the stability of the cylinder-type capacitor in the semiconductor manufacturing process fine design rule.

Claims (4)

Forming a first lower electrode on the substrate; Forming a sacrificial layer for a capacitor on the first lower electrode at a height such that a second lower electrode is formed; Selectively removing the capacitor sacrificial layer on the first lower electrode to form a capacitor hole having a 'H' shape in cross section; Filling the capacitor hole with a conductive material to form a second lower electrode; Removing the sacrificial layer for the capacitor; Forming a dielectric thin film on the surfaces of the first and second lower electrodes; And Forming an upper electrode on the dielectric thin film Capacitor manufacturing method of a semiconductor device comprising a. The method of claim 1, And selectively removing the capacitor sacrificial film by using the first lower electrode as an etch stop layer. The method of claim 1, The capacitor sacrificial film is a capacitor manufacturing method of the semiconductor device, characterized in that one selected from among the USG film, PSG film or BPSG film. A first lower electrode on the substrate; A second lower electrode of an 'H' pillar shape provided on the first lower electrode; A dielectric thin film provided on surfaces of the first and second lower electrodes; And An upper electrode provided on the dielectric thin film The capacitor of the semiconductor device provided with.