KR20030094750A - Apparatus for board test of master and slave in communication system - Google Patents

Abstract

PURPOSE: A communication device for verifying master and slave boards of a communication system is provided to enable the master board to automatically verify functions of all slave boards to control the slave boards, thereby enabling the master board to perform a debugging operation. CONSTITUTION: A master board(200) designates one of slave boards(400), and activates a control board(300) to manage a state of the designated one of the slave boards(400). The control board(300) sets a data transmission path to perform serial communication for verifying board functions with the designated one of the slave boards(400). The slave boards(400) transmit self slot presenting signals to a back board(500), and exchange TTL/CMOS input/output signals with the control board(300). The back board(500) supplies a communication path among the master board(200), the control board(300), and the slave boards(400).

Description

Communication device for verifying master and slave boards of communication system {Apparatus for board test of master and slave in communication system}

The present invention relates to verifying the function of the master and slave boards of a communication system, and more particularly, to perform the function verification of the master board to the slave board during serial data communication for verifying the function of the master board and the slave board mounted in the system. The present invention relates to a communication device for verifying master and slave boards of a communication system.

In general, a communication system has a structure in which a plurality of boards configured to perform a specific function are mounted in a slot or a slot on the back board 500. Within each shelf, a plurality of slave boards and a master board for controlling the status and operation of these slave boards are provided.

Hereinafter, the IMT2000 system will be described by way of example.

In the board design process of the existing IMT2000 system, serial communication is performed through the RS-232 interface to verify the function of the board. Therefore, RS-232 transceivers are installed inside the board, and communication between the two devices is made using the UART ( Universal Asynchronous Receiver-Transmitter ) resources of the activated processor, and the board functions are debugged using the RS-232C cable.

Figure 1 shows a master and slave board configuration of a communication system according to the prior art.

1, the master board and the slave board include an RS-232 transceiver 110 for converting a TTL / CMOS ( Transistor-Transistor Logic / Complementary Metal Oxide Semiconductor) signal for an RS-232 interface. The RS-232 interface logic implemented by the RS-232 transceiver 110 becomes a common architecture used by all master boards and slave boards in the system.

Therefore, RS-232 communication of boards mounted in the IMT200 system is based on the TTL / CMOS Outputs Signal (TTL / CMOS Outputs Signal) input / output at the input / output port of the enabled processor 120 supporting the UART resource and 3.3V / 5V. It is serial communication between the powered RS-232 transceivers 110.

A TTL / CMOS level signal is used between the processor 120 and the RS-232 transceiver 110, and an input / output signal between the RS-232 transceiver 110 and the RS-232 transmitter and receiver (RS-232 Inputs / Outputs Signal). ) Are transmitted through RS-232C cable to enable functional verification of the board, and debugging is performed using the corresponding I / O signals.

In addition, an oscillator 130 for supplying a clock to the processor 120, a memory module 140 for storing data generated by interfacing with the processor 120, and the like are provided in a separate board.

However, the RS-232C cable performs only a transmission operation of the RS-232 inputs / outputs signals converted by the RS-232 transceiver 110 for each board connected thereto. Therefore, in order to debug the state of the master and slave boards, a cable connector must be individually connected to each board so that the interface can be performed through the RS-232 transceiver 110.

As the boards mounted in the IMT2000 communication system according to the prior art have to separately include RS-232 serial communication logic in the board, the board design process increases the layer of the printed circuit board, and due to the characteristics of the RS-232 cable, The disadvantage is that channel debugging becomes impossible.

In addition, it is inconvenient for the operator to connect RS-232 cables separately to debug the state of the master board and the slave board.

The present invention was created to solve the above-mentioned conventional problems, and an object of the present invention is to refrain from connecting a serial communication cable to a slave board individually, and automatically verify the functions of all slave boards in the master board. It is to provide a communication device for verifying the master and slave board of a communication system so that the state can be controlled.

Communication device for verifying the master and slave board of the communication system of the present invention for achieving the above object, performs its own state management through data communication using an external communication port, and for the state management for the designated slave block A master block for activating the control block to allow data communication; A control block for setting a path for data communication for board function verification between the slave block designated by the master block and an external communication port; A slave block which sends a signal indicating a slot in which the slot is mounted to the back board and exchanges an input / output signal for state management with the control block; And a back board providing a signal transmission path between the master block, the control block, and the slave block.

1 is a block diagram of a communication device between a master and a slave board of a communication system according to the prior art.

2 is a block diagram of a communication device for master and slave board verification of a communication system in accordance with an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

200: master board 300: control board

400: slave board 500: back board

210, 310: Transceiver 211, 311: Serial port

220, 420: Processor 230, 430: Oscillator

240, 270, 440, 470: Buffer 250, 450: Memory Module

260, 460: decoder 320: module decoder

321, 322: control buffer 232: logical gate

324: comparator

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

This embodiment is for the application to the IMT2000 communication system, it is possible to delete the RS-232 transceiver from the slave board, and to perform and control the function verification of each slave board in the master board.

2 is a block diagram of a communication device for master and slave board verification of a communication system according to an embodiment of the present invention.

According to FIG. 2, the present embodiment performs its own state management through serial communication with an external RS-232 transmitter / receiver and designates a specific slave board 400 to perform state management of the corresponding slave board 400. The master board 200, which is activated by the control board 300, to be activated by the master board 200 so that serial communication for board function verification is performed in a designated slave board 400 and an external RS-232 transmitter / receiving period. A control board 300 for setting a data transmission path, a slave board 400 that exports a signal indicating a slot in which it is mounted to the back board and exchanges a TTL / CMOS input / output signal for board function verification with the control board 300; The master board 200 and the control board 300 and the slave board 400 is a configuration including a back board 500 to provide a communication path.

The master board 200 is implemented as a commercial chip (eg, MAX3233), the RS-232 transceiver 310 in charge of the RS-232 interface, and the processor 220 in charge of application programs and command processing for state management of each board. (E.g., MPC8260), oscillator 230 for providing a synchronous clock of the processor 220, two buffers 240 and 270, a memory module 250 for storing data exchanged with the processor 220, a processor The decoder 260 generates a signal for indicating a slot on which the slave board 400 to be managed according to the control of the 220 and a signal for activating the control board 300 and outputs the signal to the back board 500. Include.

The control board 300 is activated by the transceiver 310 that is in charge of the RS-232 interface to the external RS-232 transmitter / receiver, the module decoder activation signal transmitted from the master board, and then the master board through the back board 500. A module decoder for receiving a TTL / CMOS input / output signal from the slave board 400 indicated by the slot ID signal output from the 200 and transmitting the TTL / CMOS input / output signal to the transceiver 310 to interface with an external RS-232 transmitter / receiver ( 320).

Slave board 400 is mounted in a plurality of systems, the mounting position can be identified by the slot ID. In the slave board 400, an oscillator 430 for providing a synchronous clock of the processor, two buffers 440, 470, and a memory module 450 for storing data exchanged with the processor 420 are provided. Functionally the same as the corresponding components in the master board 200. Slave board 400 is characterized in that the processor 420 for processing the TTL / CMOS input and output signals, and under the control of the processor 420 generates a signal indicating the ID of the slot in which the board belonging to the back board 500 And a decoder 460 for exporting.

In this configuration, the RS-232 transceiver is deleted from the slave board 400, and the control board 300 is added to enable the master board 200 to manage the state of each slave board 400. State management of the master board 200 is through the serial communication port COM1 211 connected thereto, and state management of the slave board 400 selected by the master board 200 is a serial communication port connected to the control board 300. It uses the RS-232 interface that is respectively performed through the COM2 (311).

Only the TTL / CMOS input / output signals of the slave board 400 selected by the control board 300 interface with the external COM2 311 through the transceiver mounted on the control board 300.

In detail, first, the master board 200 mounted in the system and powered on performs an RS0232 interface through the UART resource of the processor and the RS-232 transceiver 210, thereby checking the state of the master board 200 itself. It becomes possible.

If you want to debug the state of the desired slave board 400 in the master board 200, input the corresponding debugging command and accordingly the decoder 260 in the master board 200 is the slot ID signal of the desired slave board 400 ( Slot_ID_M and a signal (Module-En) for activating the module decoder 320 in the control board 300 are sent to the backboard 500.

Each of the M slave boards 400 mounted in the system sends out slave TTL / CMOS output signals (#N Slave TTL / CMOS Output) for RS-232 communication with their slot ID signals (#N Slave Slot_ID). Alternatively, the slave TTL / CMOS input signal (#NSlave TTL / CMOS Input) is received from the control board 300.

The detailed configuration of the module decoder 320 in the control board 300 is as shown in FIG.

According to FIG. 3, the module decoder 320 includes a comparator 324, a plurality of AND gates 323, and a plurality of output buffers.

The comparator 324 compares the slot IDs (# 1 to M Slave Slot_ID) of the slave boards 400 sent from each slave board 400 with the slot IDs (Slot_ID_M) of the desired slave board 400 in the master board 200. In order to do so, the comparison result is output when the module decoder activation signal (Module_En) is active. The comparison result of the comparator 324 matches the slot ID 'Slot_ID_M' which is the slot ID selected by the master board 200 among the signals (# 1 to M Port Enable) for activating the RS-232 port to each slave board 400. Only the signal for activating the RS-232 port (eg, #N Port Enable) to the slave board 400 of the slot ID is selectively activated, and the rest of the port activation signals are realized in an inactive state.

The AND gate 323 performs an AND operation on the module decoder enable signal Module_En for each of the port enable signals # 1 to M Port Enable. Thus, the result of the operation of the AND gate 323 is a valid logical value (e.g., '1', other AND gate 323) only if it is directed to the RS-232 port of the slave board 400 selected by the comparator 324. Output is '0'). The AND gate 323 should be provided at least as many as the slave board 400.

The output of each AND gate 323 controls the control buffers 321, 322. The control buffers 321 and 322 are provided for the TTL / CMOS output and the TTL / CMOS input of each slave board 400, respectively. At least twice as many slave boards are provided. When the output of the AND gate 323 is valid, the control buffers 321 and 322 are activated in the path to the corresponding slave board 400 to enable signal transmission for the input direction and the output direction of the TTL / CMOS input / output signal. . Other control buffers that receive an invalid output at the AND gate 323 are in a state of blocking signal transmission in the input and output directions. As such, the signal to be input / output to the slave board 400 selected by the master board 200 is selected by the module decoder 320 of the control board 300.

Therefore, the control buffers 321 and 322 activated by the port enable signal (#N Port Enable) transmit the slave TTL / CMOS output signal (#N Slave TTL / CMOS Output) to the corresponding slave board 400. The slave TTL / CMOS input signal (#N Slave TTL / CMOS Input) is received from the transceiver 310 and transferred to the corresponding slave board 400 through the back board 500.

As such, the present embodiment does not necessarily have to mount the RS-232 transceiver inside the slave board 400 in order to verify the function of the slave board 400 in the IMT2000 communication system. The mounting of the RS-232 transceiver in the slave board 400 is not a requirement for maintaining the function of the slave board 400.

Here, the function of the control board is as described above, but depending on the embodiment block configuration for the implementation of the function may vary. In addition to using a separate board as in the present embodiment, a method of operating a module decoder and a transceiver in a master board, a slave board or a back board, or incorporating an RS-232 cable may be used. These can be easily implemented with a simple change of the described embodiments.

The embodiments described above are within the scope of various changes, modifications, and equivalents of the present invention. It is apparent that the present invention can be universally applied to serial communication for board function verification in a communication system operated by a master and a plurality of slaves, and an application to the IMT2000 system is an example. Therefore, the present invention is not limited to the description of the examples.

According to the communication device for verifying the master and slave boards of the communication system of the present invention, RS-232 transceivers do not need to be mounted inside each slave board for RS-232 serial communication. Can be reduced.

In addition, since debugging operations of each slave board requiring functional verification can be performed on the master board, there is an advantage of not having to individually connect an RS-232 cable to the slave board to check the status of the slave board.

Claims (7)

A master block for performing its own state management through data communication using an external communication port and activating a control block such that data communication for state management is performed for a designated slave block; A control block for setting a path for data communication for board function verification between the slave block designated by the master block and an external communication port; A slave block which sends a signal indicating a slot in which the slot is mounted to the back board and exchanges an input / output signal for state management with the control block; And a back board providing a signal transmission path between the master block, the control block, and the slave block. The method of claim 1, And the external communication port is a serial communication port, and state management of the master block and the slave block is performed by serial data communication through the serial communication port. The method of claim 2, wherein the master block, A transceiver unit in charge of a serial communication interface to the outside; A processor unit responsible for processing an application program and a command for state management of the master block and the slave block; And a decoder unit generating a slot ID signal of a slave block to be state-managed under control of the processor unit and a module activation signal in a control board, and outputting the generated module ID signal to the backboard. The method of claim 2, wherein the control block, A transceiver unit in charge of a serial communication interface to the outside; And a module decoder unit for receiving an input / output signal for state management from a slave board indicated by a slot ID designated by a master block through the backboard and transferring the received signal to the transceiver unit. Communication device. The method of claim 4, wherein And a module decoder unit of the control block is activated when the master block sends a specific module activation signal to process input / output signals for managing the state. The method of claim 4 or 5, wherein the module decoder, A comparator for activating a serial communication port for a slave block having a slot ID designated by the master block among a plurality of slave blocks; Opens and closes the transmission path of the input / output signal to be transmitted to each slave block. When the serial communication port is activated by the comparator, the serial communication data is transferred by opening the input / output path between the slave block designated by the master block and the transceiver. Communication device for verifying the master and slave boards of the communication system, characterized in that it comprises a buffer unit for. The method of claim 2, wherein the slave block, A processor unit for processing input and output signals for state management; Under the control of the processor unit to generate a signal indicating a slot ID unique to the slave block belongs to the decoder unit for verifying the master and slave board of the communication system, characterized in that it comprises a decoder for exporting to the control block via the back board. Communication device.