KR20030080767A - Method for fabricating negative hole and field emission display with the hole - Google Patents

Abstract

PURPOSE: A method for forming negative holes and a field emission display having negative holes are provided to obtain a device having a high resolution and high luminance. CONSTITUTION: A field emission display comprises a cathode substrate(18) and an anode substrate(22) opposed each other; a cathode electrode(16) arranged on the cathode substrate; an insulating layer(12) formed of an insulating film having a multi-layer structure where two insulating pastes are sequentially deposited, wherein the insulating layer has a plurality of negative holes(20) for exposing a certain part of the cathode electrode; a gate electrode(14) formed on the insulating layer; an electron emission layer(24) formed on the cathode electrode; an anode electrode(26) formed on the anode substrate; and a phosphor layer(28) formed on the anode electrode.

Description

Negative hole formation method Field emission display device having this hole {METHOD FOR FABRICATING NEGATIVE HOLE AND FIELD EMISSION DISPLAY WITH THE HOLE}

The present invention provides a negative hole forming method and a negative hole forming method capable of forming a negative hole having a substantially vertical cross-sectional shape by having an approximate maximum etch width and minimum etch width of an insulating layer etched to form a negative hole. A field emission display device.

As disclosed in US Pat. No. 3,665,241, early field emission indicators formed conical metal tips on cathode electrodes, formed gate electrodes around the metal tips, and voltages above the threshold voltage between both electrodes. A driving voltage is applied to generate a difference so that electrons are emitted from the metal tip, and the emitted electrons are accelerated by a fluorescent film attached to the anode electrode to implement a predetermined image.

However, since the field emission display device requires expensive semiconductor equipment to form the metal tip, the manufacturing cost increases, and it is difficult to implement a large area display due to a complicated manufacturing process.

In order to solve these problems, a field emission display device has been proposed which forms the electron emission layer into a plane.

The planar electron emission layer typically prints carbon-based materials such as graphite, carbon fiber, diamond like carbon (DLC), and carbon nano-tube (CNT). Or by printing and backside exposure. In recent years, carbon nanotubes (CNT) have been spotlighted as electron emission layers. This is because the end radius of curvature of the carbon nanotubes is about 100 μs, so that electron emission occurs smoothly even at an external voltage of about 10 to 50 V, so that low-voltage driving is easy and a large area can be obtained.

The field emission display device having the carbon-based material as an electron emission source is generally manufactured in a triode structure in order to easily control electron emission. The triode structure has a gate electrode having a cathode electrode with an insulating layer interposed therebetween. The gate may be divided into two types: an under gate structure disposed below the gate, and a normal gate structure positioned above the cathode electrode with the gate electrode interposed therebetween.

In other words, the lower gate structure refers to a structure in which a cathode electrode is disposed between the gate electrode and the fluorescent film, and the general gate structure refers to a structure in which the gate electrode is disposed between the cathode electrode and the fluorescent film. The field emission display element which has it is demonstrated as an example.

As described above, in the field emission display device having the general gate structure, since the gate electrode is disposed on the cathode electrode with the insulating layer interposed therebetween, in order to form the electron emission layer on the cathode electrode, the surface of the cathode electrode is exposed. Negative holes should be formed in the insulating layer. Conventionally, as shown in FIG. 1, the insulating layer 102 is formed to a certain height by a thin film process using vacuum deposition or a thick film process by printing a paste. The gate electrode 104 is formed over the 104, and the photoresist film PR is formed over the electrode 104, and then the negative hole 106 is formed using a known wet etching method.

Here, reference numerals 108, 110, and 112, which are not described, denote electron emission layers, cathode electrodes, and cathode substrates, respectively.

However, according to the method using the wet etching, an under cut phenomenon occurs due to the isotropy of the etching. Hereinafter, an isotropic phenomenon will be described with reference to FIGS. 2 and 3.

FIG. 2 is a view for explaining the principle of isotropic phenomenon. In general, wet etching is performed in a circular shape around the etching start point P, which is similar to a wave source of water droplets or light spreading from one point. At this time, assuming that the etching is made at a constant speed, the position of the etching point (x (t), y (t)) over time can be expressed by the following equation (1).

, or

In Equation 1, r is the radius of the circle (the distance from the starting point of etching to the point where etching is performed).

The radius r (t) over time can be expressed by the following Equation 2.

Here, w is an etching rate, and has a different value depending on the type of insulating layer 102 and the type of etchant.

Therefore, when the circle equation is applied, the radius r (t) over time can be expressed by Equation 3 below.

, or

However, the wet etching process does not start at any one point, but at the same time at several micrometers exposed to the etchant, that is, at the portion where no gate electrode 104 is provided, as shown in FIG. . Therefore, after the insulating layer 102 is etched, the etching is performed in the form shown in FIG. 1 by the etching proceeding at the etching starting points P ₁ and P ₂ nearest to the gate electrode 104. Therefore, in the wet etching process, the undercut phenomenon, that is, the width etched at the opposite side of the etching start point (hereinafter referred to as the minimum etch width) is formed narrower than the etched width at the etching start point (hereinafter referred to as the maximum etching width). Phenomenon occurs.

For example, when the negative hole 106 is formed by wet etching in an insulating layer having a height of 10 μm and a width of 10 μm exposed to the etching solution, as shown in FIG. 1, the upper side of the insulating layer 102 is shown. The surface is etched with a maximum etch width W1 of 30 μm while the lower surface is etched with a minimum etch width W2 of approximately 10 μm.

As such, the conventional negative hole 106 has a minimum etch width W2 of about half the value of the maximum etch width W1, and thus, a cathode electrode (which can provide the electron emission layer 108). The surface area of 110 is reduced.

Accordingly, the conventional field emission display device having the negative hole 102 is more difficult to be fixed than the field emission display device having the negative hole formed such that the minimum etching width W2 and the maximum etching width W1 have an approximate value. Therefore, it is not easy to manufacture a high resolution device, and there is a problem in that a device having a high brightness is not easy because the amount of the electron emission layer that can be provided on the cathode is small.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object thereof is to form a negative hole having a substantially vertical cross-sectional shape by approximating a maximum etching width and a minimum etching width of an insulating layer etched to form a negative hole. It is to provide a negative hole forming method and a field emission display device having the negative hole.

1 is a view showing a negative hole forming method according to the prior art.

2 and 3 illustrate the principle of isotropic phenomenon in a general wet etching process.

4 to 6 show the principle of the negative hole forming process according to the present invention.

7 is a view showing a step of forming a first insulating film of the negative hole forming process according to the present invention.

8 is a view showing a step of forming a second insulating film of a negative hole forming process according to the present invention;

9 is a view showing a step of forming a gate electrode of the negative hole forming process according to the present invention.

10 is a view showing a step of forming a photosensitive film of the negative hole forming process according to the present invention.

11 is a view showing a step of forming a negative hole in the negative hole forming process according to the present invention.

12 is a schematic cross-sectional view showing a field emission display device of the present invention.

In order to achieve the above object, the present invention provides a negative hole forming method in which an insulating layer having a multilayer structure is formed of two or more insulating films having different etching speeds, and the negative insulating layer is formed by etching the insulating layer.

According to another preferred embodiment of the present invention, the negative hole forming method,

Forming a cathode electrode on the cathode substrate;

Sequentially stacking two or more insulating pastes having different etching rates to form an insulating layer formed of an insulating layer having a multilayer structure on the cathode substrate;

Forming a gate electrode on the insulating layer;

Forming a photoresist film having a predetermined pattern on the gate electrode;

Etching the gate electrode and the insulating layer to form a negative hole;

Removing the photosensitive film;

It includes.

When the insulating layer is formed, a lower first insulating film is formed using an insulating paste having a relatively high etching rate, and an upper second insulating film is formed using an insulating paste having a relatively low etching rate.

According to the above method, since the first insulating film is etched at a higher speed than the second insulating film of the upper layer while the etching liquid penetrates into the lower insulating film of the lower layer having a relatively high etching rate, the interface portions of the first and second insulating films are It is formed in a shape projecting toward the inner side of the negative hole.

Thus, it is possible to form a substantially perpendicular negative hole having an approximation of the maximum etching width and the minimum etching width.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Hereinafter, the field emission display device having the general gate structure will be described as an example, but the present invention can be applied to the field emission display device having the lower gate structure. That is, in a field emission display device having a lower gate structure, a via hole must be formed so that a counter electrode provided to face the cathode electrode receives a voltage of the gate electrode. Can be used.

4 to FIG. 4 illustrate the principle of the method for forming a negative hole according to the present invention.

In the present embodiment, the insulating layer 12 in which the negative holes are formed is composed of two insulating layers 12a and 12b.

At this time, the etching speeds of the lower first insulating film 12a and the upper second insulating film 12b are w ₁ and w ₂ , respectively, and the radius of each of the insulating films 12a and 12b (the etching proceeds from the starting point of etching). If the distance to the point) is r ₁ , r ₂ , the radius (r ₁ , r ₂ ) can be expressed by the equation (4).

or

Accordingly, a circle having a radius r ₂ formed by etching the second insulating film 12b meets a circle having a radius r ₁ formed again while meeting the first insulating film 12a, as shown in Equation 5 below.

By the way, the wet etching process does not start at any one point, but at the same time at several micrometers exposed to the etchant, that is, at the portion where the gate electrode 14 is not provided, as shown in FIG. 5. Therefore, each of the etching points {(x ₀ , y ₀ ), (x ₁ , y ₁ ), (x _c , y _c ), (x ₂ , y ₂ )} during the etching process is It can be expressed by Equation 6.

In Equation 6, assuming that r ₂ = w ₂ t + h = 2h, each of the etching points {(x ₀ , y) for the elapsed time of t = (h / w ₂ ) ₀ ), (x ₁ , y ₁ ), (x _c , y _c ), (x ₂ , y ₂ )} may be represented by Equation 7.

Thus, assuming that w ₁ = aw ₂ , the x-axis value x ₀ at the point where the first insulating layer 12a is etched with the minimum width may be represented by Equation 8.

Therefore, as shown in FIG. 6, when t = (h / w ₂ ), the maximum etching width W1 of the second insulating film 12b and the minimum etching width W2 of the first insulating film 12a are represented by the following equation. It can be expressed by Equation 9.

According to the above Equation 9, it can be seen that the negative-hole pattern determined by the first insulating film (12a) an etching speed (w ₁₎ and an etching rate (w ₂₎ of the second insulating film (12b) of.

The present invention forms a negative hole using the above-described principle, and the present invention will be described with reference to FIGS. 7 to 11.

As shown in FIG. 7, a plurality of cathode electrodes 16 on the line (only one cathode electrode is shown in this embodiment) is thick-printed onto the cathode substrate 18 to form a constant etching rate (w). ₁₎ to form a first insulating film (12a) having a.

Here, the cathode electrode 16 may generally be formed of a metal such as chromium, silver, nickel, or ITO (Indium Tin Oxide) to a thickness of 1000 to 3000 kPa, and the cathode electrode 16 may be formed as a method of forming the cathode electrode 16. Depending on the material of the electrode 16, a photolithography method, a thick film printing method, or the like can be selectively used.

Next, as shown in FIG. 8, the second insulating paste having a later etching speed w ₂ compared with the etching rate w _{1 of} the first insulating film 12a is thick-film printed to form the first insulating film 12a. By forming the second insulating film 12b above, the insulating layer 12 made of the first and second insulating films 12a and 12b is formed.

After the insulating layer 12 is formed by the above-described method, the gate electrode 14 is formed on the insulating layer 12 as shown in FIG. 9.

In this case, the gate electrode 14 is formed to vertically cross the cathode electrode 16 while surrounding the electron emission layer (not shown) forming portion, the intersection region of the cathode electrode 16 and the gate electrode 14 is electrons Corresponding to the pixel region in which the emission layer (not shown) is formed.

Subsequently, after the photoresist film PR is patterned on the gate electrode 14 as shown in FIG. 10, the gate electrode 14 and the insulating layer 12 are etched using an etchant. In this case, as the etchant, a solution in which water, hydrofluoric acid, and nitric acid are mixed at a ratio of 7: 2: 2 may be used.

FIG. 11 illustrates a state in which etching is completed, and the insulating layer 12 of the present invention, which includes first and second insulating layers 12a and 12b having different etching rates, shows an etching pattern different from that of a conventional insulating layer. .

That is, in the present invention, the interface portion of the first and second insulating layers 12a and 12b is etched into an approximately eight-shaped cross section protruding toward the inner side of the negative hole 20, which is a lower first layer having a relatively high etching speed. This is because the first insulating film 12a is etched at a higher speed than the second insulating film 12b as the etching solution penetrates into the insulating film 12a.

In carrying out the present invention described above, the first insulating film 12a was formed using NP-7870B ^{™ manufactured} by Noritake Co., Ltd. having an etching rate w ₁ of 1.61 μm / sec, and the second insulating film 12b. ) Was formed using NP-7972C ^™ of Noritake Co., Ltd. having an etching rate (w ₂ ) of 1.37 μm / sec.

Therefore, when the etching rates w ₁ and w _{2 of the first} and _second insulating layers 12a and 12b are substituted into the above Equation 9, the same conditions as in the prior art, that is, the height 2h of the insulating layer 12 are applied. ) Is etched using an etching solution (water: hydrofluoric acid: nitric acid = 7: 2: 2) of 10 µm (each insulating layer has a height of 5 µm) and a width W3 exposed to the etching liquid is 10 µm. In one case, the second insulating film 12b has a maximum etching width W1 of 30 μm, whereas the first insulating film 12a having a relatively faster etching speed than the second insulating film 12b has a minimum of approximately 18 μm. It has an etching width W2.

As described above, in the method of forming a negative hole of the present invention, two or more insulating pastes having different etching rates are sequentially stacked to form an insulating layer made of an insulating layer having a multilayer structure, and the etching layer is etched using an etchant to minimize the minimum etching width. A negative hole having a cross-sectional shape substantially close to vertical (that is, the upper and lower widths are the same inside the hole) that is 0.6 times or more of the maximum etching width can be obtained.

In the above, the case where the first and second insulating films 12a and 12b are formed by using an insulating paste having different etching rates has been described as an example. However, the firing operation is performed even when the insulating layer is formed using the same insulating paste. In some cases, the first and second insulating layers may have different etching rates.

That is, printing of any one of the isolated second insulating film (12b) using the same insulation paste after printing, drying and firing the first insulating film (12a) by using the face only in the one NP-7870B ^TM or NP-7972C ^TM When dried and fired, as the first insulating film 12a is fired twice, the etching rate is different from that of the second insulating film 12b.

In the above embodiment, NP-7870B ^™ or NP-7972C ^™ is described as an insulating paste as an example, but it is apparent to those skilled in the art that other types of pastes may be used in addition to the above-described pastes.

12 is a schematic cross-sectional view of a field emission display device having a negative hole of the present invention.

The field emission display device includes cathode and anode substrates 18 and 22 disposed to face each other at regular intervals, a cathode electrode 16 disposed in a line shape on one surface of the cathode substrate 18, and a cathode electrode 16. The insulating layer 12 is formed in the pixel region where the gate electrode 14 intersects the cathode electrode 16 perpendicularly through the insulating layer 12, and the cathode electrode 16 and the gate electrode 14 cross each other. The electron emission layer 24 provided on the surface of the cathode electrode 16 into the negative hole 20 of the anode and the line-shaped anode electrode 26 provided on the anode substrate 22 in the same direction as the cathode electrode 16. And a fluorescent layer 28 provided on the surface of the anode electrode 26 to emit light when the electrons emitted from the electron emitting layer 24 collide with each other.

The electron emission layer 24 may be formed of a known conical metal tip (not shown), and may include graphite, carbon fiber, diamondlike carbon (DLC), and carbon nanotube ( Carbon-based materials such as carbon nanotubes (CNTs) may be printed and formed in a planar shape. In this embodiment, the electron emission layer 24 may be formed using carbon nanotubes (CNTs) that are easy to operate at low voltages and that have a large area. Formed.

In the field emission display device having such a configuration, electrons are emitted from the electron emission layer 24 when a voltage difference greater than or equal to a threshold voltage occurs between two opposite electrodes, that is, the cathode electrode 16 and the gate electrode 14.

Here, the threshold voltage refers to a voltage at which electrons start to be emitted from the electron emission layer 24, and the threshold voltage may have different values depending on the type of material constituting the electron emission layer 24. Have

In addition, the gate electrode 14 serves as a control electrode for controlling the emission amount of electrons emitted from the electron emission layer 24 and for controlling the focusing distance of electrons collided with the phosphor 28. As the driving voltage of (14) increases, the electron emission amount increases, and the electron focusing distance becomes wider.

Accordingly, when a driving voltage is applied to the cathode electrode 16 and the gate electrode 14 so that a voltage difference of more than a threshold voltage is generated, the electron emission layer 24 is applied according to the voltage difference applied to both electrodes 16 and 14. Electrons are emitted, and the emitted electrons collide with the phosphor 28 by a voltage applied to the anode electrode 26, thereby causing the phosphor to emit light.

Here, reference numeral 30 denotes a frit that seals the cathode substrate 18 and the anode substrate 22.

In the field emission display device having the above-described configuration, the negative hole 20 of the insulating layer 12 is formed by the method of the present invention shown in Figs.

That is, the insulating layer 12 includes a first insulating film 12a having a relatively high etching speed and a second insulating film 12b having a lower etching speed than the first insulating film 12a. The negative hole 20 to be formed is formed in a substantially vertical shape.

Therefore, when the carbon nanotube paste is injected into the negative hole 20 and then fired, the amount of the carbon nanotube paste remaining on the cathode electrode 16 is increased more than twice as compared with the conventional art. This is because the minimum etching width W2 of the first insulating film 12a is formed to be close to the maximum etching width W1 of the second insulating film 12b, that is, approximately 0.6 times or more.

As described above, in the field emission display device of the present invention, since the negative hole 20 has a substantially vertical cross-sectional structure, the pixel can be made highly detailed, and thus the resolution can be improved, and it is formed on the cathode electrode 16. Since the amount of the electron emission layer 24 is more than doubled compared with the related art, the image quality can be improved.

In the above embodiment, the insulating layer is formed using an insulating film having a two-layer structure, but it is apparent to those skilled in the art that the insulating layer may be formed of an insulating film having a three-layer structure or more.

As described above, the present invention is not limited to the above embodiments, and various modifications can be made within the scope of the claims, the detailed description of the invention, and the accompanying drawings. .

As described above, in the present invention, an insulating layer is formed by stacking insulating layers having different etching rates in a multi-layered structure, and then etching the insulating layer to form negative holes, whereby the minimum etching width is formed to a value close to the maximum etching width. It is possible to form a negative hole having a fine hole width substantially close to the vertical.

Therefore, it is possible to fabricate a high resolution and high luminance device having fine pixels.

In addition, by forming the insulating film by using a thick film printing method, the process time for forming the insulating film can be shortened compared to the thin film process, and there is an effect such as low-cost manufacturing is possible.

Claims (8)

A method of forming a negative hole in which two or more insulating pastes having different etching rates are sequentially stacked on a substrate to form an insulating layer made of an insulating layer having a multilayer structure, and wet etching the insulating layer to form negative holes. Forming a cathode electrode on the cathode substrate; Sequentially stacking two or more insulating pastes having different etching rates to form an insulating layer formed of an insulating layer having a multilayer structure on the cathode substrate; Forming a gate electrode on the insulating layer; Forming a photoresist film having a predetermined pattern on the gate electrode; Wet etching the gate electrode and the insulating layer to form a gate hole and a negative hole; Negative hole formation method comprising a. The method of claim 2, wherein the forming of the insulating layer comprises forming an insulating layer of a lower layer using an insulating paste having a relatively high etching rate, and forming an insulating layer of an upper layer using an insulating paste having a relatively low etching rate. A negative hole forming method characterized by the above-mentioned. A field emission display device having a negative hole formed by the method according to any one of claims 1 to 3. The display device of claim 4, wherein the field emission display device comprises: A pair of cathode and anode substrates facing each other; A cathode electrode provided on the cathode substrate; An insulating layer having a plurality of insulating holes in which two insulating pastes having different etching speeds are sequentially stacked, and having a plurality of negative holes for exposing a part of the surface of the cathode; A gate electrode formed on the insulating layer; An electron emission layer formed on the cathode inside the negative hole; An anode electrode formed on the anode substrate and a fluorescent film provided on the electrode; A field emission display device comprising a. 6. The field emission display as claimed in claim 5, wherein the insulating layer comprises a lower first insulating film and an upper second insulating film, and interface portions of the first and second insulating films protrude toward the inside of the negative hole. device. 6. The field emission display device according to claim 5, wherein the maximum etching width (W1) of the second insulating film and the minimum etching width (W2) of the first insulating film satisfy the following relational expression. 0.6W1 ≤W2 The field emission display device of claim 5, wherein the electron emission layer is formed of carbon nanotubes (CNTs).