KR100724369B1 - Field emission device with ultraviolet protection layer and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a field emission device having a UV shielding layer and a method of manufacturing the same. In the conventional normal gate type field emission device having a small effect due to the anode high electric field, an emitter material must be precisely formed inside a narrow and deep gate hole. Therefore, by applying a sacrificial layer or by applying a separate shielding layer on the cathode layer, and forming a photosensitive emitter material and exposing the back surface, the emitter material is formed inside the gate hole. Device characteristics may deteriorate due to the problem of removing the sacrificial layer, and when the shielding layer is applied, the photosensitive paste has to be applied by pattern printing through a high degree of alignment, which makes the process difficult. In order to solve the above problems, the present invention forms a lower ultraviolet shielding layer on the cathode electrode, forms an insulating layer, a thin film insulating layer, and a gate electrode in order on the upper portion thereof, and then forms a sacrificial layer on the entire upper surface thereof. Next, the gate hole is formed so that the sacrificial layer is not directly formed on the insulating layer, and the lower ultraviolet shielding layer is etched in a self-aligning manner to form an exposure window, thereby removing the sacrificial layer by the thin film insulating layer. In addition, it facilitates the exposure window forming process, and also allows the photosensitive emitter paste to be applied to the entire surface of the device, thereby greatly reducing the process difficulty, increasing the yield, and uniformizing the device quality.

Description

Field emission device having an ultraviolet shielding layer and a method of manufacturing the same {FIELD EMISSION DEVICE WITH ULTRAVIOLET PROTECTION LAYER AND MANUFACTURING METHOD THEREOF}

1 is a cross-sectional view showing the structure of a conventional normal three-electrode field emission device.

Figure 2 is a cross-sectional view showing the structure of a conventional planar three-electrode field emission device.

Figure 3 is a cross-sectional view showing the structure of a normal three-electrode field emission device formed by a conventional back exposure method.

Figures 4a to 4c is a cross-sectional view showing a process of manufacturing the back exposure type field emission device shown in FIG.

5A to 5D are cross-sectional views illustrating a process of manufacturing a back exposure field emission device in a manner different from those of FIGS. 4A to 4C.

6A to 6D are procedures cross-sectional views showing a process of manufacturing a back exposure type field emission device using a hetero gate.

7a to 7e is a cross-sectional view showing a manufacturing process of an embodiment of the present invention.

*** Explanation of symbols for main parts of drawing ***

100 transparent substrate 101 cathode electrode

102: lower ultraviolet shielding layer 103: insulating layer

104: thin film insulating layer 105: gate electrode

106: sacrificial layer 107: photosensitive emitter paste

Field of the Invention The present invention relates to a field emission device and a method of manufacturing the same, and in particular, an ultraviolet shielding layer applied to a back exposure method for implementing a normal gate type field emission device using a photosensitive emitter to be formed under and above the gate electrode. The present invention relates to a field emission device having an ultraviolet shielding layer and to a method of manufacturing the same, which is capable of improving the ease of processing by avoiding adverse effects caused by process residues and allowing the entire surface of the photosensitive emitter paste to be deposited.

Due to the rapid development of information and communication technology and the demand for the visualization of diversified information, the demand for electronic display is increasing and the appearance of the required display is also diversified. For example, in an environment where mobility is emphasized such as a portable information device, a display having a small weight, volume, and power consumption is required, and when used as an information transmission medium for the public, display characteristics of a large viewing angle are required. In addition, in order to satisfy such demands, electronic displays require conditions such as large size, low price, high performance, high definition, thinness, and light weight, and thus, development of a light and thin flat panel display device that can replace the existing CRT is urgently needed. It became necessary. Recently, as the needs of various display devices have been applied to the display field, devices using field emission have been actively developed for thin film displays that can provide high resolution while reducing size and power consumption.

The field emission device is attracting attention as a next-generation flat panel display for overcoming all the disadvantages of flat panel displays (LCD, PDP, VFD, etc.) currently being developed or produced. The field emitter display has a simple electrode structure, high-speed operation based on the same principle as the CRT, and has the advantages that the display must have such as infinite color, infinite gray scale, high brightness, and high video rate. have.

The field emission display device uses a quantum mechanical tunneling phenomenon in which electrons come out of the vacuum from the metal or conductor when a high field is applied to the metal or conductor surface (emitter) in the vacuum. At this time, the device exhibits the current-voltage characteristic according to the Fowler-Nordheim law. The field emission display device is composed of an anode portion which emits an electron emission source and the emitted electrons collide with each other to emit light, a spacer that supports the upper and lower plates, and a sealing portion for maintaining a vacuum tightness.

Recently, the importance of the field emission device using the carbon nanotubes due to the excellent electron emission characteristics at a relatively low vacuum degree has been recognized. Carbon nanotubes are hexagonal honeycomb structures formed by combining one carbon atom with three other carbons in a shape of a tube. The carbon nanotubes are extremely small, ranging from several to several hundred nanometers in diameter, and have a single wall. ) It grows into a structure or a multi-wall structure. These carbon nanotubes may be electrical conductors, such as metals, depending on the shape and diameter of the coil. They may also have properties of poorly conducting semiconductors, and because of their hollow and long lengths, they are excellent in mechanical, electrical, and chemical properties. It is used as an emitter material of the device.

Since such carbon nanotubes have a small diameter (about 1.0 to several tens of nm), the field enhancement factor is considerably superior to conventional microtip type spin-emitting field emission tips, resulting in low electron emission. Since it can be made in a critical field (turn-on field, about 1 to 5 [V / μm]), there is an advantage that can reduce the power loss and production cost.

Such carbon nanotubes may be formed by screen printing in the form of paste on the cathode or grown by chemical vapor deposition. In recent years, carbon nanotubes are easy to mass-produce and process fast instead of slow growth. It is common to use tube printing in the form of a paste, or to give a photosensitive characteristic to the paste and to expose it by a back exposure method.

The structure of the conventional field emission device will be described in detail with reference to the accompanying drawings.

1 to 2 show representative structures among the three-electrode structures of the field emission device using the conventional carbon nanotubes.

1 illustrates a normal gate structure, in which a cathode electrode 2, an insulating layer 3, and a gate electrode 4 are formed on a substrate 1 as illustrated, and then the gate is formed by a photolithography process. The electrode 4 and the insulating layer 3 are etched to form through holes, and then carbon nanotubes 5 are formed on the exposed cathode electrode 2. The anode electrode 8 is formed on the upper substrate 7 on which the phosphor is formed so as to face the lower substrate formed by the spacer or partition 6. When voltage is applied to the gate electrode 4 and the cathode electrode 2, electrons are emitted from the carbon nanotube 5 emitter, which is attracted by the high electric field of the anode electrode 8 to which the high voltage is applied. Accelerated collision causes the phosphor of the upper plate 7 to be excited to emit light.

However, this normal structure has a large area because electron emission is likely to occur locally only around the hole where the electric field is strongest, leakage current to the gate electrode 4 is increased due to an asymmetric field distribution, and the process procedure is difficult. There are also problems that are not easy to paint, which has reduced usage for some time. However, in recent years, methods have been proposed to solve these various problems, so that the emitter emits electrons even when the device is not selected by the high field of the anode electrode 8. It is a structure that is attracting attention again because it can utilize the characteristics.

At one time, planar structures, which simplify the difficult process of the normal gate structure while placing the gate under the cathode electrode or on the same plane, have been introduced, which is advantageous in large area, which is illustrated in FIG. 2.

First, FIG. 2A is a cross-sectional view of an under gate structure field emission device, which is the simplest planar structure. As shown in FIG. 2A, an electric field causing electron emission is applied to the gate electrode 11 under the nanotube 14. That's the way. The gate electrode 11 is formed on the glass substrate 10, and then the insulating layer 12 and the cathode electrode 13 are sequentially formed on the glass substrate 10, and then the carbon nanotubes 14 are formed on the cathode electrode 13. To form).

FIG. 2B is a cross-sectional view of a coplanar structure field emission device in which the gate electrode 22 and the cathode electrode 23 are formed on the same layer as shown in FIG. That is, after forming the gate electrode 22 and the cathode electrode 23 on the insulating layer 21 formed on the glass substrate 20, the carbon nanotube 25 is formed on the cathode electrode 23. .

FIG. 2C illustrates a counter electrode undergate structure in which the coplanar structure and the undergate structure are mixed. A gate wiring 31 is formed below the cathode electrode 35 as shown in the drawing. In order to arrange the gate electrode 34 on the same plane as that of 35, a through hole is formed to connect the gate wiring 31 and the gate electrode 34.

The planar structures have advantages in that they are relatively easy to process due to relatively simple processes, but have a fatal problem in that the emitter is exposed to the anode high field as it is. In particular, emitters having low field emission starting voltage characteristics, such as carbon nanotubes, are inevitably affected by such top anode fields. In general, since a high voltage must be applied to the anode due to the characteristics of the top plate to which the high voltage phosphor is to be used, if the reduction is made, the luminance is lowered and the luminance is lowered. Therefore, additional measures, such as forming a separate electric field shielding structure or adjusting the distance between the upper and lower plates, are required, and in some cases, complicated control such as providing various driving voltages alternately by changing the driving method is required. do.

Due to these considerations, a method for easily and precisely forming an emitter even if a narrow and deep gate hole is formed by using a conventional normal gate structure that can avoid the influence of the anode high electric field in recent years is proposed. The photosensitive emitter paste is applied to the gate hole and then exposed from the back side to form a precise emitter.

3 illustrates a structure of a normal gate field emission device manufactured by using a backside exposure method, and as shown in FIG. 3, an emitter material such as carbon nanotube paste may be precisely formed in the gate hole. ), A transparent cathode electrode 51 is formed, and the ultraviolet shielding layer 52 in which only the inner region of the gate hole is removed is further applied. The carbon nanotubes 55 are positioned only in the removal region of the ultraviolet shielding layer 52.

The structure of FIG. 3 will be described in more detail through the process procedure cross-sectional views provided through FIGS. 4A to 4C.

First, as shown in FIG. 4A, a transparent cathode electrode 51 is formed on a transparent substrate 50, an opaque ultraviolet shielding layer 52 is formed on the upper portion thereof, and then aligned with the cathode electrode 51 wiring. Pattern it. The dielectric layer 53 and the gate electrode 54 are sequentially formed thereon. As the opaque ultraviolet shielding layer 52, an amorphous silicon layer is mainly used in an environment requiring a high temperature process. Since the dielectric layer 53 to be formed to be high can be easily formed as a general purpose device that can be commonly applied to various similar processes, the use of the dielectric layer 53 instead of another insulating layer is becoming common.

In addition, as shown in FIG. 4B, the gate electrode 54, the dielectric layer 53, and the ultraviolet shielding layer 52 are sequentially etched to define a field emission region to form a gate hole, and a photosensitive layer is formed on the entire upper surface thereof. After the emitter paste 55 is formed, it is exposed on the back surface of the substrate so that only the portion of the photosensitive emitter paste 55 positioned in the exposure window portion from which the ultraviolet shielding layer 52 is partially removed is exposed. The photosensitive emitter paste 55 mainly uses a carbon nanotube paste containing a photosensitive material.

As shown in FIG. 4C, when the exposed emitter paste 55 is developed, the remaining portion of the exposed gate hole except for the emitter paste 55 is removed, and the remaining emitter paste 55 is removed. Can be fired and used as an electron emission unit.

Accordingly, although the narrow and deep gate holes are formed, the emitter material can be formed relatively accurately. However, the lower ultraviolet shielding layer 52, which is not a complete insulator, is not formed on the lower front surface of the cathode electrode 51. UV rays pass through the dielectric layer 62 and the gate electrode 64 (about 200 μm) of the thin film and reach up to the top because they must be formed so as not to invade other adjacent cathode electrode patterns even though they are formed to be the same or wider than Since the gate electrode 64 pattern may be transmitted through a region where the pattern is not formed, the photosensitive emitter paste 55 may not be collectively applied to the entire surface of the structure. This means that the photosensitive emitter paste 55 should be pattern printed in the range of the lower ultraviolet shielding layer 61. For this purpose, precise alignment is required, which makes the process difficult. If an alignment error occurs when printing the pattern, the emitter material may remain on the gate electrode 64 or the dielectric layer 62, thereby causing mis-emitting light.

5A to 5D show a method of forming an emitter paste under the gate hole by performing back exposure in a manner different from the process shown in FIGS. 4A to 4C. In this case, the sacrificial layer for shielding ultraviolet rays is gated. After forming the upper surface of the hole and defining the emitter region, the emitter is formed and finally the sacrificial layer is removed.

First, as shown in FIG. 5A, a transparent cathode electrode 61 is formed on the transparent substrate 60, and an insulating layer 62 and a gate electrode 63 are formed on the transparent substrate 60.

Then, as shown in FIG. 5B, a portion of the gate electrode 63 and the insulating layer 62 is etched away to define the field emission region, and then the sacrificial layer 64 to be used as the ultraviolet shielding layer is formed on the entire surface of the structure. Form. Since the sacrificial layer will need to be removed later, tungsten (W) is mainly used because the etching selectivity with other layers should be high.

As shown in FIG. 5C, only a portion of the inside of the formed sacrificial layer 64 in which the emitter is to be formed is selectively etched and removed to form a photosensitive emitter paste 65 on the entire surface of the structure. Back exposure.

As shown in FIG. 5D, when the photosensitive emitter paste 65 is developed to remove the unsensitized portion, the sacrificial layer 65 is etched and removed to form carbon nanotubes in a region below the gate hole. 65) is formed.

In this case, since the sacrificial layer 65 is formed on the surface of the gate hole having the rough surface by etching and the upper exposed surface of the insulating layer 62, when the W used as the sacrificial layer 65 is removed, the gate is removed. W trapped in the insulating layer 62 on the inner surface of the hole and the insulating layer 62 exposed on the upper part of the hole is not completely removed, causing a short circuit between the gate electrode 63 and the cathode electrode 61 or the adjacent devices. There is a risk of a short circuit between the formed gate electrodes, and since a certain region of the sacrificial layer 65 formed inside the gate hole must be selectively removed, alignment errors are likely to occur in this process, so that the emitter is not formed at the center of the gate hole later. Instead of this, there is a problem that the light emitting uniformity is varied due to eccentricity therein. In particular, as the fine gate holes are formed, alignment of the etch regions of the sacrificial layer 64 for forming the gate holes and the lower emitters in the entire emission region becomes very difficult due to shrinkage and expansion of the panel due to the thermal process.

6A to 6D are other methods for preventing the surface of the gate electrode from being damaged when the back exposure method using the sacrificial layer shown in FIGS. 5A to 5D is used. (Korean Patent Publication No. 2005-0034313 " Field emission display device and method for fabricating the same> are sectional views of a method of using a hetero gate electrode.

As shown in FIG. 6A, the cathode electrode 71 is formed on the transparent substrate 70, and then patterned to form an electrode pattern. The insulating layer 72, the first gate electrode 73, and the first electrode are sequentially formed thereon. The two-gate electrode 74 is formed. The stacked structure of the gate electrode is formed of Cr and Ag, Cr and Al, or Al and Ag.

As shown in FIG. 6B, the structures are sequentially etched to form gate holes, and a sacrificial layer 75 is formed on the entire upper surface thereof. As shown in FIG. 6C, a portion of the inner region of the gate hole is etched and removed from the sacrificial layer 75, and then the photosensitive emitter paste 76 is formed on the entire surface of the sacrificial layer 75 and exposed to the rear surface. As shown in FIG. 6D, the photosensitive emitter paste 76 is removed through development, leaving only the portion cured by the backside exposure to complete the bottom of the field emission device having a fine emitter. Since the field emission device manufactured by the above method forms the gate electrodes 73 and 74 through the above-described composition, even if the second gate electrode 74 is somewhat damaged, the first gate electrode 73 located below is formed. There is no damage and line resistance does not increase. However, even in this case, since the sacrificial layer 75 is still formed on the front surface of the structure including the gate hole, only a portion of the center region inside the gate hole is etched, so precise etching alignment is difficult. It is difficult to completely remove the sacrificial layer 75 material trapped in the rough dielectric layer exposed between them, and a short circuit between the gate electrodes 73 and 74 and a cathode electrode or a gate electrode short between adjacent elements may occur. In addition, since the thickness of the gate electrodes 73 and 74 is thick, adhesion to the lower insulating layer 72 may not be good and peeling may occur.

As described above, the normal gate type field emission device having a small influence by the conventional anode high field requires a narrow and deep gate hole, and an emitter material must be precisely formed inside the gate hole, so that a sacrificial layer is applied or an upper portion of the cathode layer is formed. Although a separate shielding layer was applied to the photosensitive emitter material and the photosensitive emitter material was formed to expose only a specific portion, the emitter material was formed inside the fine gate hole. Device characteristics may be deteriorated, and when a separate shielding layer is applied on the cathode, the photosensitive paste may not be coated on the entire surface, and pattern printing should be performed. Therefore, high difficulty alignment is required, resulting in a difficult process.

The present invention for solving the conventional problems as described above, forming a lower ultraviolet shielding layer on top of the cathode electrode, and in turn forming an insulating layer, a thin film insulating layer and a gate electrode on top of the cathode electrode, a sacrificial layer on the upper front After forming a gate hole so that the sacrificial layer is not directly formed on the insulating layer and the lower ultraviolet shielding layer is etched in a self-aligning manner to form an exposure window, which is sacrificed by the thin film insulating layer. Field emission with an ultraviolet shielding layer to facilitate the removal of the layer and to allow the application of the photosensitive emitter paste to the entire surface while preventing the formation of a sacrificial layer inside the gate hole, thereby improving process ease and process quality. It is an object to provide a device and a method of manufacturing the same.

In order to achieve the object as described above, the present invention comprises a cathode electrode pattern formed on a transparent substrate; An ultraviolet shielding layer positioned on the cathode electrode pattern and selectively removing only a portion where an emitter is to be formed to expose the cathode; An insulating layer formed on the entire surface of the structure while having a field emission region exposing the removed portion of the ultraviolet shielding layer; A thin film insulating layer formed on the entire upper surface of the insulating layer; A gate electrode formed on the thin film insulating layer; And an emitter formed on the cathode electrode exposed by the removed portion of the ultraviolet shielding layer.

The ultraviolet shielding layer is formed of a metal or a metal oxide having resistance to temperature for firing the insulating layer.

The emitter is characterized in that it comprises at least one of carbon-based electron emitting materials including carbon nanotubes, diamond-like carbon, graphite nanofibers, graphite.

In addition, the present invention comprises the steps of forming and patterning a cathode electrode and an ultraviolet shielding layer on a transparent substrate; Forming an insulating layer on the formed structure, and further forming a thin film insulating layer thereon; Forming and patterning a gate electrode on the thin film insulating layer and forming a sacrificial layer thereon; Etching the lower layers of the sacrificial layer to expose the cathode to form a field emission region; And after printing the photosensitive emitter material in the field emission region of the structure, exposing and developing and removing the sacrificial layer.

The thin film insulating layer is to prevent the sacrificial layer from being collected in the insulating layer, and is formed on the entire surface of the insulating layer.

The thin film insulating layer may be formed of one of materials including a silicon nitride film, a silicon oxide film, and spin-on-glass having good flatness, adhesion, and insulation.

Embodiments of the present invention as described above will be described in detail with reference to the accompanying drawings.

7A to 7E are cross-sectional views illustrating a manufacturing process of an embodiment of the present invention. As shown in the drawing, a thin film insulating layer 104 is further formed on the insulating layer 103, and the lower UV shielding layer 102 is sacrificed. A method of simultaneously applying layer 106 is used. This completely blocks the risk of the sacrificial layer 106 being trapped in the insulating layer 103 and prevents light from leaking into the upper layer of the device during ultraviolet exposure, so that the photosensitive emitter material remains on top of the device. It can be prevented.

First, as shown in FIG. 7A, the cathode electrode 101 and the lower UV shielding layer 102 are formed and patterned on the transparent substrate 100. The cathode electrode 101 and the lower ultraviolet shielding layer 102 may be deposited and patterned by chemical vapor deposition, physical vapor deposition, or the like, respectively, or may be deposited and patterned at the same time to the lower ultraviolet shielding layer 102. have. The cathode electrode 101 has a transparent material and is suitable for ITO because it is formed of a material that is resistant to heat and is not affected by the etching of the insulating layer to be subsequently deposited. The lower ultraviolet shielding layer 102 may use a metal and a metal oxide capable of selectively etching the transparent cathode electrode 101. In particular, a material that is not affected by a high temperature insulating layer forming process, such as amorphous silicon or titanium, may be mainly used. Among them, amorphous silicon may vary resistance through impurity doping, which is useful for generating a resistive layer of a device. We can do it, and application frequency is high. When the amorphous silicon is applied to the lower ultraviolet shielding layer 102, it is formed to have a thickness of 1000 Å or more.

As shown in FIG. 7B, the insulating layer 103 and the thin film insulating layer 104 are sequentially formed on the formed structure. Typically, the insulating layer 103 is formed of a thick film insulating layer obtained through post-printing firing and a thin film insulating layer formed through chemical vapor deposition or physical vapor deposition. In the case of the thick film insulation layer, a glassy powder composed of PbO, B ₂ O ₃ , SiO _2, etc. is made into a paste state, and a thick film having a thickness of about 5 to 50 μm is obtained through firing at about 400 to 580 ° C. after screen printing. In order to prevent damage to the insulating layer 103 by the post-process may be further formed on the protective layer. However, if the insulating layer of about 1 ~ 10㎛ by high-speed deposition is not necessary to form a protective layer on top.

However, in the present invention, any insulating layer 103 is provided for the purpose of protecting the insulating layer 103 from a post-process, and for solving the problem that the sacrificial layer to be formed thereafter is collected in the rough insulating layer 103 and is not easily removed. This thin film insulating layer 104 is formed on top of the formed film. Therefore, the thin film insulating layer 104 should be formed on the entire surface of the insulating layer 103, and should have selective etching characteristics with respect to the gate electrode and the sacrificial layer to be formed later, the adhesion between the gate electrode and the insulating layer 103 Not only should the adhesion properties be good for the increase, but the surface must be smooth for easy removal of the sacrificial layer. In addition, since the insulating layer 103 is to be formed on the entire surface, the insulating property should be excellent.

Therefore, the thin film insulating layer 104 may be a thin film such as silicon nitride film, silicon oxide film, spin-on-glass (Spin-On-Glass) satisfying all the above characteristics.

As shown in FIG. 7C, the gate electrode 105 is formed on the thin film insulating layer 104 and then patterned, and the sacrificial layer 106 is formed of a metal different from the gate electrode 105 on the entire upper surface thereof. Form. The gate electrode 105 may be formed of a metal layer such as Mo, Ti, Cr, Al, and the like, and is generally formed to a thickness of about 1000 to 5000 kPa. In addition, since the sacrificial layer 106 is to be removed after being used as the upper UV shielding layer, the sacrificial layer 106 must be etch selective with the gate electrode 105, and the emitter material, the cathode electrode 101, and the insulating layers 103. (104) and etch selectivity. In addition, since the shielding against ultraviolet rays is the biggest feature, tungsten (W) or molybdenum (Mo) should be formed to a sufficient height. However, since the sacrificial layer 106 is formed only on the gate electrode 106 and the thin film insulating layer 104, there is a portion where the sacrificial layer 106 is in direct contact with the insulating layer 103 having a rough surface. I never do that.

As shown in FIG. 7D, a gate hole for defining an electron emission region is formed by using a photoresist pattern PR or the like, and the photosensitive emitter paste 107 is coated on the entire upper surface of the structure, followed by back exposure. Is carried out. The process of forming the gate hole sequentially dry or wet etch the sacrificial layer 106, the gate electrode 105, the thin film insulating layer 104, the insulating layer 103, and the lower ultraviolet shielding layer 102 in order. In this process, the lower ultraviolet shielding layer 102 is etched by an automatic alignment without a separate alignment process so that an exposure window is formed at the center of the lower portion of the correct gate hole. In this case, it is possible to apply the photosensitive emitter paste 107 to the entire surface of the structure without pattern printing, in which the lower ultraviolet shielding layer 102 and the sacrificial layer 106 completely absorb the ultraviolet light provided by the back light source. Because it blocks. Therefore, since the photosensitive emitter paste 107 is applied without any alignment, the process becomes very easy. The photosensitive emitter paste 107 is formed of a powder of at least one of carbon-based electron emitting materials including carbon nanotubes, diamond-like carbon, graphite nanofibers, graphite, photosensitive materials, organic materials, solvents, and the like. When firing after photosensitization / development, only the carbon-based electron-emitting material remains in a desired area while reducing its volume.

As shown in FIG. 7E, the emitter is developed to leave only the portion of the photosensitive and cured photosensitive emitter paste 107 and to remove the remaining portion, and then to remove the sacrificial layer 106. The sacrificial layer 106 is removed using a solution other than an acid. At this time, the sacrificial layer 106 formed at an outer region of the gate electrode 105 is positioned on the thin film insulating layer 104 having a high level planarity. This eliminates the risk of unwanted electrical shorts because it can be completely removed without being trapped in the layer.

As described above, the field emission device having the ultraviolet shielding layer and the method of manufacturing the same according to the present invention form a lower ultraviolet shielding layer on the cathode electrode, and then sequentially form an insulating layer, a thin film insulating layer, and a gate electrode on the cathode electrode. The sacrificial layer is formed on the upper front surface to form a gate hole so that the sacrificial layer is not directly formed on the insulating layer, and the lower ultraviolet shielding layer is etched in a self-aligning manner to form an exposure window. The insulating layer facilitates the removal of the sacrificial layer, facilitates the process of forming the exposure window, and enables the application of the photosensitive emitter paste to the entire surface of the device, greatly reducing the process difficulty, increasing the yield, and improving the device quality. Excellent effect.

Claims (11)

A cathode electrode pattern formed on the transparent substrate; An ultraviolet shielding layer positioned on the cathode electrode pattern and selectively removing only a portion where an emitter is to be formed to expose the cathode; An insulating layer formed on the transparent substrate and having a field emission region exposing the removed portion of the ultraviolet shielding layer; A thin film insulating layer formed on the insulating layer; A gate electrode formed on the thin film insulating layer; And an emitter formed on the cathode electrode exposed by the removed portion of the ultraviolet shielding layer. The field emission device as claimed in claim 1, wherein the ultraviolet shielding layer is formed of any one of metal, metal oxide, and amorphous silicon having resistance to temperature for firing the insulating layer. 3. The field emission device as claimed in claim 2, wherein the ultraviolet shielding layer is titanium. 3. The field emission device as claimed in claim 2, wherein the ultraviolet shielding layer is amorphous silicon with or without impurities, and has a thickness of 1000 GPa to 100000 GPa. The field emission device of claim 1, wherein the emitter comprises at least one of carbon-based electron emission materials including carbon nanotubes, diamond-like carbon, graphite nanofibers, and graphite. . Depositing and patterning a cathode electrode and an ultraviolet shielding layer on the transparent substrate; Forming an insulating layer on the transparent substrate and the ultraviolet shielding layer, and further forming a thin film insulating layer thereon; Forming and patterning a gate electrode on the thin film insulating layer and forming a sacrificial layer thereon; Etching the lower layers of the sacrificial layer to expose the cathode to form a field emission region; And removing the sacrificial layer after the photosensitive emitter material is printed on the field emission region and then exposed to light and developed to form the emitter. 2. The method of claim 6, wherein the thin film insulating layer is to prevent the sacrificial layer from being collected in the insulating layer, and is formed on the entire surface of the insulating layer. . 7. The electric field with an ultraviolet shielding layer according to claim 6, wherein the thin film insulating layer is formed of one of materials including a silicon nitride film, a silicon oxide film, and a spin-on-glass having good flatness, adhesion and insulation properties. Method of manufacturing the emitting device. The method of claim 6, wherein the sacrificial layer is formed of a metal material having selective etching characteristics with the cathode electrode, the gate electrode, and the insulating layer. 10. The method of claim 9, wherein the sacrificial layer is formed of one of tungsten and molybdenum. 7. The field emission device as claimed in claim 6, wherein the printing of the photosensitive emitter material is performed by applying the photosensitive emitter material on the field emission region and the sacrificial layer. Manufacturing method.

Images