KR100784511B1 - Appratus for Field Emission Display and Method for fabricating thereof - Google Patents

Abstract

The present invention provides a field emission display device and a method of manufacturing the same. The field emission display according to the exemplary embodiment of the present invention is formed in a region covering the first cathode electrode, the resistance layer formed on the first cathode electrode, and the resistance layer formed on the lower substrate to prevent damage to the resistance layer. A second cathode electrode, an insulating layer formed on the second cathode electrode, a gate electrode formed on the insulating layer and an emitter formed on the insulating layer and the second cathode electrode in the opening formed in the gate electrode to emit electrons; . A method of manufacturing a field emission display device according to an exemplary embodiment of the present invention includes forming a first cathode electrode on a lower substrate, forming a resistive layer on the first cathode electrode, and forming a second cathode in a region covering the resistive layer. Forming a cathode electrode and forming an insulating layer, a gate electrode, and an emitter on the second cathode electrode.

Field emission indicators, emitters, cathode electrodes

Description

Field emission display device and its manufacturing method {Appratus for Field Emission Display and Method for fabricating

1 is a schematic diagram of a field emission display device according to the present invention.

2 is a cross-sectional view of a field emission display device according to the present invention.

3 is a cross-sectional view of a lower electrode structure of a field emission display device according to an exemplary embodiment of the present invention.

4A through 4G are cross-sectional views of respective manufacturing processes of the field emission display device according to the exemplary embodiment.

(Explanation of symbols for the main parts of the drawing)

200: lower substrate 210: first cathode electrode

220: resistive layer 230: second cathode electrode

240: insulating layer 250: gate electrode

260 emitter

The present invention relates to a field emission display device and a method for manufacturing the same, and more particularly, to a field emission display device and a method for manufacturing the same that can suppress the reaction between the resistive layer and the insulating layer.

With the development of information and communication technology and the advent of the multimedia era, the importance of display is being emphasized more than ever. Accordingly, there is a demand for the development of a lightweight, thin, low power consumption, and high quality flat panel display.

Flat panel displays currently under development or production include PDP, LCD, VFD, FED, OLED, and ELD. However, in terms of price and picture quality, CRTs are still competitive with flat panel displays.

Recently, attempts have been made to develop thin CRTs by applying devices using field emission to display fields. This is because it provides a thin and excellent image quality with the existing CRT.

In general, a field emission device is a device that utilizes a phenomenon in which electrons are emitted into a vacuum from an emitter by an applied voltage. Here, the emitter acts as an electron gun, and unlike the emission of electrons by heat, the field emission device has the characteristics of a cold cathode device because it is not accompanied by heat.

In the field emission device, the emitter is formed over the entire surface of the cathode plate in a one-to-one correspondence with pixels, which are pixels.

However, unlike the CRT, the field emission device must maintain a narrow space between the upper substrate and the lower substrate at a high vacuum, so the reliability problem must be solved first of all for practical use. In the field emission devices, the reliability that is directly related to the image quality is an essential characteristic of electron emission uniformity over the entire area. Once the emitter structure in the field emission device is determined, the uniformity of spatial electron emission across the entire area becomes important. This is due to the high spatial frequency pattern of the eye, the subject of human vision, and the high sensitivity to sharp edges.

In the field emission device, a resistive layer is formed under the cathode electrode in order to ensure uniformity of electron emission across all pixels. This resistance layer serves to increase overall uniformity between pixels by negative feedback, and to improve device reliability by preventing short circuits of rows and columns.

However, when the insulating layer is formed on the resistive layer, an oxidation problem occurs due to the reaction between the insulating layer and the resistive layer, and the resistive layer is denatured. Unevenness of the ruins

In addition, in order to make electrical contact, the resistive layer on the cathode is removed, and the cathode is damaged by etching at the interface between the cathode and the resistive layer, and the cathode is also damaged on the cathode during subsequent etching of the insulating layer. There is a problem in that it becomes electrically unstable to cause a short defect.

Accordingly, an aspect of the present invention is to provide a field emission display device capable of suppressing a reaction between a resistive layer and an insulating layer.

Another object of the present invention is to provide a method of manufacturing the above-described field emission display device.

Technical problems to be achieved by the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned above will be clearly understood by those skilled in the art from the following description. Could be.

In accordance with an aspect of the present invention, a field emission display device includes a first cathode electrode formed on a lower substrate, a resistance layer formed on the first cathode electrode, and a region covering the resistance layer. A second cathode electrode which prevents damage of the resistive layer, an insulating layer formed on the second cathode electrode, a gate electrode formed on the insulating layer and the insulating layer and formed on the second cathode electrode in the opening formed in the gate electrode An emitter that emits electrons, in which case the emitter is formed in a corresponding region between the resistive layers to enable back exposure.

In addition, the resistive layer is preferably a-Si.

Moreover, it is preferable that the thickness of a resistance layer is 1000 kPa-10000 kPa.

In addition, the insulating layer is preferably a dielectric layer.

According to another aspect of the present invention, there is provided a method of manufacturing a field emission display device, including forming a first cathode electrode on a lower substrate, forming a resistance layer on the first cathode electrode, Forming a second cathode electrode in a region covering the resistance layer and forming an insulating layer, a gate electrode, and an emitter on the second cathode electrode.

Specific details of other embodiments are included in the detailed description and drawings. Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. Like reference numerals refer to like elements throughout.

Hereinafter, a field emission display device according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 to 3.

1 is a schematic diagram of a field emission display device according to the present invention. As shown in FIG. 1, the field emission display device according to the present invention is a full color display device. For example, R (120R) and G (120G) formed in a stripe shape. , B (120B) phosphor is formed on the inner surface of the upper substrate 100, the ITO anode which is a kind of transparent electrode to apply an anode voltage between the upper substrate 100 and R, G, B phosphors The electrode layer 110 is formed.

In addition, an FEC (Field Emission Cathode) array consisting of a plurality of field emission cathodes is formed on the lower substrate 200 on which the electron emission portions are formed, and electrons are emitted from the FEC array and the emitted anode is formed. The phosphor captured by the electrode 110 causes the phosphor captured by the captured anode electrode 110 to emit light.

Here, when the field emission is briefly described, if the applied voltage of the metal or semiconductor surface is about 10 ⁹ (V / m), the electrons will pass through the potential barrier by the tunneling effect and electrons will be emitted in vacuum even at room temperature. This is called field emission, and a cathode emitting electrons is called a field emission cathode or a field emission device.

In addition, each FEC array is formed on the lower substrate 200 so as to correspond to R, G, and B phosphors for full color display, respectively, and is formed on the cathode electrode 210, 220, 230 and the gate electrode (orthogonal to each other). 250 is driven in a matrix form. Electrons emitted from the FEC array fly toward the upper substrate 100 spaced apart at a predetermined interval by a spacer 290 formed by a suitable method.

In order to enable such an operation, a space formed between the upper substrate 100 and the lower substrate 200 is a vacuum atmosphere. In order to maintain a vacuum atmosphere, a peripheral edge portion of the upper substrate 100 and the lower substrate 200 is sealed by a sealant 281. In general, a voltage of about several tens of V to several KV is applied between the anode electrode layer 110 and the second cathode electrode 230 to accelerate the electrons.

A structure and an operation principle of the field emission display device will be described in detail with reference to FIG. 2. 2 is a cross-sectional view of a field emission display device according to the present invention. As shown in FIG. 2, cathode electrode layers 210, 220, and 230 are formed on the lower substrate 200, and a plurality of emitters 260 emitting electrons by generation of a conical electric field thereon are formed thereon. Is formed. In addition, an integral insulating layer 240 is formed between the emitters 260 to surround each of the emitters in the form of enclosing the emitters, and the cathode electrode layers 210, 220, and 230 are formed on the insulating layer 240. The gate electrode 250 with which the opposing part is common is formed.

In addition, the upper substrate 100 and the lower substrate 200 may be spaced apart from each other by the spacer 290 such that the fluorescent layer 120 and the emitter 260 form a space 280, for example, 100 μm˜. It is attached 3mm apart. The spacer 290 is formed in plural so that the upper substrate 100 and the lower substrate 200 face each other to form a space 280. In addition, the spacer 290 is a material having a high hardness and good insulation such as a ceramic including glass, an oxide or a nitride, or an insulating material such as a polymer including polyamide.

The lower electrode structure of the field emission display device according to the present invention will be described in detail with reference to FIG. 3. 3 is a cross-sectional view of a lower electrode structure of a field emission display device according to an exemplary embodiment of the present invention. As shown in FIG. 3, the field emission display device according to the exemplary embodiment of the present invention may include a lower substrate 200, a first cathode electrode 210, a resistance layer 220, and a second cathode electrode 230. And an emitter 260 formed on the insulating layer 240, the gate electrode 250, and the second cathode electrode 230 in the opening formed in the insulating layer 240 and the gate electrode 250.

Here, the first cathode electrode 210 is formed of a transparent conductive thin film on the lower substrate 200 using indium tin oxide (ITO) or the like, and is formed by sputtering or the like.

In addition, the resistance layer 220 is formed on the first cathode electrode 210 to be spaced apart by the size of the bottom surface of the emitter 260 forming portion, and is applied to heat in consideration of a-Si material or an insulating layer process formation temperature. Strong, glass substrates and metals and metal oxides capable of selective etching can be used. The thickness of the resistive layer 220 is a thickness capable of shielding ultraviolet rays (UV), depending on the process, but in the case of a-Si, the thickness of the resistive layer 220 is preferably 1000 kPa to 10000 kPa. The above-described resistance layer 220 is formed on a part of the lower substrate 200, and is preferably formed in a larger area than the emitter 260 forming portion for back exposure and development, which will be described later.

The second cathode electrode 230 is formed of a transparent conductive thin film by using indium tin oxide (ITO) or the like in a region covering the above-mentioned resistive layer 220. As described above, in the field emission display device according to the exemplary embodiment of the present invention, the second cathode electrode 230 is further formed on the resistance layer 220, so that the insulating layer 240 and the resistance layer 220 are formed. Since the reaction can be suppressed, non-uniform etching due to the oxide accompanying the high temperature process of the resistive layer 220 and the insulating layer 240, residue generation, and the like can be suppressed. This makes it possible to form a uniform emitter 260. In addition, when the resistive layer 220 and the insulating layer 240 are etched, the damage of the first cathode electrode 210 is prevented, thereby reducing the short defect of the first cathode electrode 210 and the electrically stable cathode electrode layer 210. 230).

The insulating layer 240 is formed of an insulating material such as a silicon oxide film (SiOx), a silicon nitride film (SiNx), or the like on the second cathode electrode 230, or a thick film dielectric used in a PDP process or the like is formed of an insulating material. Can be. Here, even when the insulating layer 240 is a thick film dielectric layer, the second cathode electrode 230 is formed between the resistance layer 220 and the insulating layer 240, so that the reaction between the resistance layer 220 and the insulating layer 240 is performed. Can be suppressed.

The gate electrode 250 is formed of at least one of Cr, Ni, Mo, Cu, Pt, Ti, Al, and Ag on the insulating layer 240, and has a thickness of the gate electrode 250. Is formed to a thickness of about 1000 ~ 5000Å.

The emitter 260 is formed on the second cathode electrode 230 in the opening formed in the insulating layer 240 and the gate electrode 250 to emit electrons. Carbon nanotubes, diamond-like carbon, graft nanofiber (Graphite Nano Fober), graft (Grphite) and at least any one and combinations thereof.

Hereinafter, a method of manufacturing a field emission display device according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 4A to 4J. 4A through 4J are cross-sectional views of respective manufacturing processes of the field emission display device according to the exemplary embodiment.

First, as shown in FIG. 4A, a first cathode electrode 210 made of ITO material is formed on the lower substrate 200 by using a vacuum deposition method. Here, as the vacuum deposition method, sputtering or thermal evaporation or compound deposition (CVD) or two-beam evaporation method or spin coating of a metal sol solution may be used. Thereafter, a material usable as the resistive layer 220 such as a-Si is formed by chemical vapor deposition, physical vapor deposition, or the like. At this time, the resistance layer 220 is preferably formed to be spaced apart by the size of the lower surface of the emitter formation site to be described later.

Next, as shown in FIG. 4B, after the photoresist patterning is performed using a mask 220 ′ for the resistive layer 220 having a predetermined pattern, the resistive layer 220 pattern is formed by wet and dry etching methods.

Next, as shown in FIG. 4C, a second cathode electrode 230 made of ITO material is formed in a region covering the first cathode electrode 210 and the resistance layer 220 by using a vacuum deposition method. Here, as the vacuum deposition method, sputtering or thermal evaporation or compound deposition (CVD) or two-beam evaporation method or spin coating of a metal sol solution may be used.

Next, as shown in FIG. 4D, an insulating layer 240 is formed on the second cathode electrode 230. Here, the first insulating layer 230 may be formed of a silicon oxide film, a silicon nitride film insulating material, or a thick film dielectric used in a PDP process may be formed of an insulating material. By chemical vapor deposition, a reaction gas such as SiH 4 or N 2 O may be deposited by PECVD, or may be formed through e-beam deposition. In addition, SOG (Spin-on Glass) such as PPSQ may be implemented by baking after coating by a method such as spray coating or spin coating.

Next, as shown in FIG. 4C, a lower electrode 220 made of ITO material is formed on the first insulating layer 230 by using a vacuum deposition method. Here, as the vacuum deposition method, sputtering or thermal evaporation or compound deposition (CVD) or two-beam evaporation method or spin coating of a metal sol solution may be used.

Next, as shown in FIG. 4D, after the photoresist patterning is performed using a mask for the lower electrode 220 of a predetermined pattern, the lower electrode 220 pattern is formed by wet and dry etching methods.

Next, as shown in FIGS. 4E to 4G, the gate electrode 250 is formed on the insulating layer 240 by using any one of Cr, Ni, Mo, Cu, Pt, Ti, Al, and Ag metals. Preferably, but not limited to, any material that provides sufficient conductivity may be used. The thickness of the gate electrode 250 is preferably 1000 kPa to 5000 kPa, and can be formed by sputtering, electron beam deposition, or chemical vapor deposition. Next, after photoresist patterning using the gate electrode mask, the gate electrode 250 pattern is formed through an etching process.

Next, a predetermined photoresist (not shown) is patterned such that an opening, which is an area in which the emitter 260 is to be formed, is formed on the above-described gate electrode 250. Here, the photoresist (not shown) is a photoresist of 3μm or less used in a conventional electrode process, when the insulating layer 240 is formed of a thin film and the post etching process is a dry etching or a wet etching process of dipping (Dipping) method A resist (not shown) may be used, and the photoresist 252 may be used when the printing method is an insulating layer 240 formed of a thick film insulating layer or an insulating layer 240 formed of a thick film by high-speed deposition using a thin film insulating layer forming method. ), It is necessary to take thicker, so a photoresist for plating mold (not shown) is used.

Next, the gate electrode 250 and the insulating layer 240 are sequentially subjected to dry etching or wet etching to form predetermined openings.

Next, a photosensitive paste is applied to the entire lower substrate including the openings described above. In this case, the photosensitive paste is usually made by mixing CNT powder (powder), binder (binder) and solvent (solvent) in a ratio and a photosensitive material of the photopolymer component to react to the light of the UV wavelength. After applying the photosensitive paste described above, the emitter 260 is formed by performing an exposure using ultraviolet (UV) on the opposite side to which the photosensitive paste is applied to form the emitter 260.

Next, the emitter 260 is formed through post-exposure development to form a final field emission display device according to the present invention.

Although the embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains can understand that the present invention can be implemented in other specific forms without changing the technical spirit or essential features. will be. Therefore, the above-described embodiments are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the appended claims rather than the detailed description, and the meaning and scope of the claims and All changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

In the field emission display device according to the exemplary embodiment of the present invention as described above, a uniform emitter can be formed by suppressing a reaction between the resistive layer and the insulating layer, and an electrically stable cathode electrode is manufactured, such as a short short circuit. It can work.

In addition, the method for manufacturing a field emission display device according to an embodiment of the present invention can effectively manufacture the above-described field emission display device.

Claims (5)

A first cathode electrode formed on the lower substrate; A resistance layer formed on the first cathode electrode; And A second cathode electrode formed in an area covering the resistance layer to prevent damage of the resistance layer; An insulating layer formed on the second cathode electrode; A gate electrode formed on the insulating layer; And An emitter formed on the second cathode electrode in the opening formed in the insulating layer and the gate electrode to emit electrons, And the emitter is formed in a region corresponding to the resistance layer. The method of claim 1, And the resistive layer is a-Si. The method of claim 2, The resistive layer has a thickness of 1000 kPa to 10,000 kPa. The method of claim 1, And the insulating layer is a dielectric layer. delete

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