KR20030025484A - equipment for removing an air bubble - Google Patents
equipment for removing an air bubble Download PDFInfo
- Publication number
- KR20030025484A KR20030025484A KR1020010058531A KR20010058531A KR20030025484A KR 20030025484 A KR20030025484 A KR 20030025484A KR 1020010058531 A KR1020010058531 A KR 1020010058531A KR 20010058531 A KR20010058531 A KR 20010058531A KR 20030025484 A KR20030025484 A KR 20030025484A
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- KR
- South Korea
- Prior art keywords
- semiconductor package
- upper die
- lower die
- bubble removing
- die
- Prior art date
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- 239000004065 semiconductor Substances 0.000 claims abstract description 48
- 238000000034 method Methods 0.000 claims abstract description 26
- 238000000465 moulding Methods 0.000 claims abstract description 13
- 238000010438 heat treatment Methods 0.000 claims abstract description 10
- 238000010521 absorption reaction Methods 0.000 abstract 1
- 229920005989 resin Polymers 0.000 description 15
- 239000011347 resin Substances 0.000 description 15
- 229920001187 thermosetting polymer Polymers 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 9
- 239000012790 adhesive layer Substances 0.000 description 4
- 239000007788 liquid Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229920003002 synthetic resin Polymers 0.000 description 2
- 239000000057 synthetic resin Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000002390 adhesive tape Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000005429 filling process Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
본 발명은 반도체 패키지의 제조장치 및 이를 이용한 제조방법에 관한 것으로, 보다 상세하게는 몰딩물질(molding compound)을 사용하여 TBGA(Taped Ball Grid Array) 타입 또는 EPBGA(Enhanced Power Ball Grid Array)타입의 패키지를 몰딩 시, 상기 물질물질에 발생된 기포를 용이하게 제거할 수 있는 기포제거장치에관한 것이다.The present invention relates to a manufacturing apparatus of a semiconductor package and a manufacturing method using the same, and more particularly, to a package of a tapered ball grid array (TBGA) type or an enhanced power ball grid array (EPBGA) type using a molding compound. When molding, it relates to a bubble removing device that can easily remove the bubbles generated in the material.
일반적으로 알려진 바와 같이, 전자제품의 사이즈(size)가 경박단소화 되어가고, 반도체 칩의 집적도가 높아지고 연산속도가 증가되어 감에 따라, 합성수지몰드를 이용하지 않고, 합성수지재의 서킷테이프(circuit tape)를 이용하는 TBGA (Taped Ball Grid Array)타입의 패키지와 구동시 열방출을 위한 히트싱크(heat sink)가 구비되어 있으며, 파워(Power) 비·지·에이 패키지라고도 불리우는 EPBGA(EPBGA : Enhanced Power Ball Grid Array package)타입의 패키지가 개발되었다.As is generally known, as the size of electronic products becomes lighter and shorter, the degree of integration of semiconductor chips increases, and the operation speed increases, a circuit tape of a synthetic resin material is used without using a synthetic resin mold. Equipped with a TBGA (Taped Ball Grid Array) type package and a heat sink for heat dissipation during operation, EPBGA (EPBGA: Enhanced Power Ball Grid), also known as Power B / G / A package. Array package) type was developed.
하기에서는 편의상 TBGA타입의 반도체 패키지의 제조과정 만을 언급하기로 한다.In the following, only the manufacturing process of the semiconductor package of the TBGA type will be referred to for convenience.
도 1a 내지 도 1d는 종래 기술에 따른 TBGA타입의 반도체 패키지의 제조과정을 보인 공정단면도이다.1A to 1D are cross-sectional views illustrating a process of manufacturing a TBGA type semiconductor package according to the prior art.
상기 서킷테이프(1)는, 도 1a에 도시한 바와 같이, 폴리이미드 필름(polyimide film)에 회로를 형성한 서킷필름(circuit film)(2)의 배면에 형성된 접착층(4)과, 상기 접착층(4) 상에 부착되어 상기 접착층(4)이 오염되는 것을 방지하기 위한 보호테이프(6)로 구성된다.As shown in FIG. 1A, the circuit tape 1 includes an adhesive layer 4 formed on a rear surface of a circuit film 2 having a circuit formed on a polyimide film, and the adhesive layer ( It is attached to 4) is composed of a protective tape (6) for preventing the adhesive layer (4) from being contaminated.
상기 구성을 가진 서킷테이프를 이용한 TBGA 타입의 반도체 패키지의 제조방법은, 도 1b에 도시된 바와 같이, 먼저 서킷테이프(1)로부터 보호테이프(6)를 제거한다. 이어서, 도 1c에 도시된 바와 같이, 기판(10) 표면에 접착층(4)에 의해 서킷필름(2)을 부착시킨 후, 기판(10)의 안착부(11)에 반도체칩(8)을 탑재시킨다.이때, 상기 반도체 칩(8)은 양면 접착테이프(미도시) 또는 접착제에 의해 안착부(11)에 탑재된다.In the method for manufacturing a TBGA type semiconductor package using the circuit tape having the above configuration, as shown in FIG. 1B, the protective tape 6 is first removed from the circuit tape 1. Subsequently, as shown in FIG. 1C, the circuit film 2 is attached to the surface of the substrate 10 by the adhesive layer 4, and then the semiconductor chip 8 is mounted on the mounting portion 11 of the substrate 10. At this time, the semiconductor chip 8 is mounted on the mounting portion 11 by a double-sided adhesive tape (not shown) or adhesive.
그 다음, 와이어본딩 공정에 의해 반도체 칩(8)의 칩패드(미도시)과 서킷필름(2)을 연결시키는 본딩와이어(14)를 형성한다. 이때, 본딩와이어(14)는 반도체칩(8)과 서킷필름(2)의 회로를 상호 연결하는 역할을 한다.Next, a bonding wire 14 for connecting the chip pad (not shown) of the semiconductor chip 8 and the circuit film 2 is formed by a wire bonding process. In this case, the bonding wire 14 serves to interconnect the circuits of the semiconductor chip 8 and the circuit film 2.
이어서, 서킷회로(2) 상에 반도체 칩(8)을 애워싸도록 댐(dam)(12)을 형성한다. 이때, 댐(12)은 시린지(syringe)를 이용하여 에폭시(epoxy) 등의 코팅액을 주입하여 형성한다.Next, a dam 12 is formed on the circuit circuit 2 to surround the semiconductor chip 8. In this case, the dam 12 is formed by injecting a coating liquid such as epoxy using a syringe.
상기 댐(12)은 이 후의 패키지 몰딩 공정에서 주입되는 용융된 열경화성 수지가 외부로 흘러넘치는 현상을 방지하기 위한 역할을 한다.The dam 12 serves to prevent a phenomenon that the molten thermosetting resin injected in a subsequent package molding process overflows to the outside.
그 다음, 도 1d에 도시된 바와 같이, 액상의 용융된 열경화성 수지를 이용하여 필링(filling) 공정에 의해 반도체 칩(8)을 덮는 몰딩체(16)를 형성한다.Next, as illustrated in FIG. 1D, a molding 16 covering the semiconductor chip 8 is formed by a filling process using a liquid molten thermosetting resin.
이때, 상기 필링 공정 진행 시에 열처리 공정이 수반된다. 상기 몰딩체(16)는 반도체 칩(8)을 외부 환경으로부터 보호하기 위한 것이다.At this time, a heat treatment process is involved in the peeling process. The molding 16 is for protecting the semiconductor chip 8 from an external environment.
이 후, 상기 서킷필름(2)의 회로면에 작은 납알갱이로 구성된 솔더볼(12)을 부착하여 패키지 제조를 완성한다.Thereafter, a solder ball 12 made of small lead particles is attached to the circuit surface of the circuit film 2 to complete the package manufacture.
상기 서킷테이프(1)를 이용한 TBGA 타입의 패키지는 통상적인 반도체 패키지에 비해, 전기신호의 이동경로가 짧아져 처리속도가 향상되며 저전력구동이 가능할 뿐 아니라, 작은 크기에 더 많은 리드를 넣을 수 있으며, 열발생 및 방출에도 유리하다.TBGA type package using the circuit tape (1) is shorter than the conventional semiconductor package, the movement path of the electrical signal is shortened to improve the processing speed and low power drive, and can put more leads in a small size It is also advantageous for heat generation and release.
도 2는 종래 기술에 따른 문제점을 도시한 공정단면도이다.Figure 2 is a process cross-sectional view showing a problem according to the prior art.
그러나, 종래 기술에서는 액상의 용융된 열경화성 수지를 이용하여 TBGA 타입의 패키지 또는 EPBGA 타입의 패키지를 몰딩할 경우, 댐 형성공정, 필링 공정 및 열공정 등을 거치면서, 도 2에 도시된 바와 같이, 열경화성 수지에 기포(void)(a)가 발생되었다.However, in the prior art, when molding a TBGA type package or an EPBGA type package by using a liquid molten thermosetting resin, as shown in FIG. 2 while going through a dam forming process, a peeling process and a thermal process, A void (a) was generated in the thermosetting resin.
따라서, 상기 기포(a)발생에 의해 다량의 제품이 불량하게 되어 생산 수율이 저하된 문제점이 있었다.Therefore, a large amount of the product is poor due to the bubble (a) generation, there was a problem that the production yield is lowered.
이에 본 발명은 상기 종래의 문제점을 해결하기 위해 안출된 것으로, TBGA 또는 EPBGA 타입의 반도체 패키지의 몰딩 공정 시, 기포가 발생되는 것을 억제할 수 있는 기포제거장치를 제공함에 그 목적이 있다.Accordingly, an object of the present invention is to provide a bubble removing apparatus capable of suppressing bubble generation during molding of a TBGA or EPBGA type semiconductor package.
도 1a 내지 도 1d는 종래 기술에 따른 반도체 패키지의 제조과정을 보인 공정단면도.1A to 1D are cross-sectional views illustrating a process of manufacturing a semiconductor package according to the prior art.
도 2는 종래 기술에 따른 문제점을 도시한 공정단면도.Figure 2 is a process cross-sectional view showing a problem according to the prior art.
도 3은 본 발명에 따른 기포제거장치의 단면도.3 is a cross-sectional view of the bubble removing apparatus according to the present invention.
도면의 주요부분에 대한 부호의 설명Explanation of symbols for main parts of the drawings
100. 반도체패키지 110. 하부다이100. Semiconductor Package 110. Lower Die
112. 제 2기포제거부 114. 가열부112. Second bubble removing section 114. Heating section
120. 상부다이 122. 제 1기포제거부120. Upper die 122. First bubble removing unit
124. 진공흡입구 140. 전원공급부124. Vacuum inlet 140. Power supply
상기 목적을 달성하기 위한 본 발명의 기포제거장치는 반도체패키지가 안착되는 하부다이와, 하부다이와 일정간격으로 이격되도록 위치되며, 업/다운동작에 의해 반도체패키지를 클램핑하는 상부다이와, 상부다이에 업/다운 구동력을 주기 위한 전원공급부와, 하부다이와 상부다이에 각각 형성되어 기포를 제거하기 위한 기포제거부를 포함하여 구성된 것을 특징으로 한다.The bubble removing apparatus of the present invention for achieving the above object is positioned to be spaced apart from the lower die, the lower die and a predetermined distance, the semiconductor die is seated, the upper die for clamping the semiconductor package by the up / down operation, and the upper die up / It is characterized in that it comprises a power supply for providing a driving force down, and formed in the lower die and the upper die, respectively, bubble removing portion for removing bubbles.
본 발명의 기포제거장치는 반도체패키지가 안착되며, 반도체패키지에 열을 공급하기 위한 가열부 및 반도체패키지 방향으로의 초음파 공급에 의해 기포를 제거하는 제 1기포제거부를 가진 하부다이와, 하부다이와 일정간격으로 이격되도록위치되며, 업/다운동작에 의해 반도체패키지를 클램핑하는 상부다이와, 상부다이에 형성되며, 진공흡입에 의해 기포를 제거하는 제 2기포제거부와, 상부다이에 업/다운 구동력을 주기 위한 전원공급부를 포함하여 구성되는 것을 특징으로 한다.The bubble removing apparatus of the present invention has a lower die having a semiconductor package mounted thereon, a lower die having a heating portion for supplying heat to the semiconductor package, and a first bubble removing portion for removing bubbles by ultrasonic supply in a semiconductor package direction. Positioned so as to be spaced apart, the upper die for clamping the semiconductor package by the up / down operation, a second bubble removing portion formed in the upper die, to remove bubbles by vacuum suction, and to give the upper die up / down driving force Characterized in that comprises a power supply.
본 발명에서는 열경화성 수지에 의해 반도체패키지의 몰딩 공정 진행 시, 열경화성 수지에 발생된 기포를 진공흡입 방식 및 초음파에 의한 진동방식으로 용이하게 제거할 수 있다.In the present invention, during the molding process of the semiconductor package by the thermosetting resin, bubbles generated in the thermosetting resin can be easily removed by the vacuum suction method and the vibration method by the ultrasonic wave.
이하, 본 발명의 바람직한 실시예를 첨부된 도면을 참조하여 상세히 설명하면 다음과 같다.Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
본 발명의 기포제거장치는 TBGA 타입 또는 EPBGA 타입의 반도체패키지에 모두 적용되나, 편의상 하기에서는 TBGA 타입의 반도체패키지에 적용한 것을 예로 하여 설명한다.The bubble removing apparatus of the present invention is applied to both a TBGA type or EPBGA type semiconductor package, but for convenience, it will be described below by applying to a TBGA type semiconductor package as an example.
도 3은 본 발명에 따른 기포제거장치의 단면도이다.3 is a cross-sectional view of the bubble removing apparatus according to the present invention.
본 발명의 기포제거장치는, 도 3에 도시된 바와같이, 크게 하부다이(110)와, 상부다이(120)으로 나뉜다.As shown in FIG. 3, the bubble removing apparatus of the present invention is largely divided into a lower die 110 and an upper die 120.
상기 하부다이(110)는 상부에 반도체패키지(100)가 안착되며, 하부에 반도체패키지(100)에 열을 공급하기 위한 가열부(114) 및 상기 가열부(114) 하단에 형성되어 반도체패키지(100) 방향으로의 초음파를 공급하고, 상기 공급된 초음파의 진동에 의해 기포를 제거하는 제 1기포제거부(112)가 각각 형성되어 있다.The lower die 110 has a semiconductor package 100 mounted thereon, a heating unit 114 for supplying heat to the semiconductor package 100 and a lower portion of the heating unit 114 at a lower portion thereof. A first bubble removing unit 112 is provided to supply ultrasonic waves in the direction of 100) and to remove bubbles by vibration of the supplied ultrasonic waves.
상기 상부다이(120)는 하부다이(110)와 일정간격으로 이격되도록 위치되고, 업/다운(up/down)동작에 의해 반도체패키지(100)를 클램핑(clamping)한다. 도면부호 122는 반도체패키지(100)를 클램핑하는 부위를 도시한 것이다.The upper die 120 is positioned to be spaced apart from the lower die 110 at a predetermined interval, and clamps the semiconductor package 100 by an up / down operation. Reference numeral 122 denotes a portion for clamping the semiconductor package 100.
상기 상부다이(120)에는 열경화성 수지에 발생된 기포를 제거하기 위한 제 1기포제거부(122)가 형성되어 있다. 이때, 상기 제 1기포제거부(122)에는 표면에 다수의 진공흡입구(124)가 형성되어 있으며, 상기 진공흡입구(124)에 의해 반도체패키지(100)의 열경화성 수지에 발생된 기포가 흡입되어 외부로 배기된다.The upper die 120 is formed with a first bubble removing portion 122 for removing bubbles generated in the thermosetting resin. In this case, a plurality of vacuum suction holes 124 are formed on the surface of the first bubble removing part 122, and bubbles generated in the thermosetting resin of the semiconductor package 100 are sucked by the vacuum suction holes 124 to the outside. Exhausted.
전원공급부(140)는 상부다이(120)와 전기적으로 연결되어 상부다이(120)에 업/다운 구동력을 공급한다.The power supply unit 140 is electrically connected to the upper die 120 to supply an up / down driving force to the upper die 120.
상기 구성을 가진 본 발명의 기포제거장치는, 먼저 시린지를 이용하여 용융된 열경화성 수지를 필링한 후, 도 3에 도시된 바와 같이, 하부다이(110)의 가열부(114)에 의해 큐어링(curing) 공정을 진행한다.In the bubble removing apparatus of the present invention having the above structure, first, the molten thermosetting resin is filled using a syringe, and then, as shown in FIG. 3, the curing is performed by the heating part 114 of the lower die 110. curing) process.
이때, 제 2기포제거부(112)로부터 초음파가 반도체패키지(100)에 공급됨에 따라, 열경화성 수지에 발생된 기포가 상기 초음파의 진동에 의해 제거된다.At this time, as the ultrasonic waves are supplied to the semiconductor package 100 from the second bubble removing unit 112, bubbles generated in the thermosetting resin are removed by the vibration of the ultrasonic waves.
상기 제 2기포제거부(112)는 일렉트로마그네틱(electromagnetic) 또는 피에조(piezo) 세라믹(ceramic) 등을 적용할 수도 있다.The second bubble removing unit 112 may use an electromagnetic or piezo ceramic.
또한, 상부다이(120)의 제 1기포제거부(122)에 의해 열경화성 수지에 발생된 기포를 진공흡입하여 외부로 배기시킨다.In addition, the bubbles generated in the thermosetting resin by the first bubble removing unit 122 of the upper die 120 is sucked under vacuum to exhaust to the outside.
본 발명에서는 열경화성 수지를 이용하여 반도체패키지에 몰딩 공정을 진행 할 경우, 상기 열경화성 수지에 발생된 기포를 진공흡입 방식 및 초음파에 의한 진동방식으로 용이하게 제거할 수 있다.In the present invention, when a molding process is performed on a semiconductor package using a thermosetting resin, bubbles generated in the thermosetting resin can be easily removed by a vacuum suction method and a vibration method by ultrasonic waves.
이상에서와 같이, 본 발명에서는 열경화성 수지를 이용하여 TBGA 타입 또는 EPBGA 타입 반도체패키지에 몰딩 공정을 진행할 경우, 상기 열경화성 수지에 발생된 기포를 진공흡입 방식 및 초음파에 의한 진동 방식에 의해 용이하게 제거할 수 있다.As described above, in the present invention, when a molding process is performed on a TBGA type or EPBGA type semiconductor package using a thermosetting resin, bubbles generated in the thermosetting resin can be easily removed by a vacuum suction method and a vibration method by ultrasonic waves. Can be.
따라서, 제품의 불량율을 낮출 수 있으므로 생산 수율이 향상된다.Therefore, since the defective rate of a product can be lowered, a production yield improves.
기타, 본 발명은 그 요지를 일탈하지 않는 범위에서 다양하게 변경하여 실시할 수 있다.In addition, this invention can be implemented in various changes within the range which does not deviate from the summary.
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| JPH09139397A (en) * | 1995-11-14 | 1997-05-27 | Rohm Co Ltd | Resin molding equipment and semiconductor device using the equipment |
| JPH09312308A (en) * | 1996-05-21 | 1997-12-02 | Oki Electric Ind Co Ltd | Method and apparatus for manufacturing semiconductor device |
| KR19990085085A (en) * | 1998-05-13 | 1999-12-06 | 김영환 | Molding apparatus for manufacturing semiconductor package |
| JP2000036520A (en) * | 1998-05-15 | 2000-02-02 | Nec Corp | Method for mounting flip chip and device therefor |
| JP2001144115A (en) * | 1999-11-10 | 2001-05-25 | Mitsumi Electric Co Ltd | Method and apparatus for packaging integrated circuit |
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