KR20030013612A - Driving method for scanning of plasma display panel and apparatus thereof - Google Patents

Abstract

PURPOSE: A scan driving method of a plasma display panel is provided to improve driving efficiency without overlapping supply of a scan pulse signal. CONSTITUTION: A scan driving method comprises applying the first data pulse(MDP1) corresponding to a video signal of '1' to address electrode lines(X2). While the first data pulse signal(MDP1) is applied, the second pulse signals(MDP2,MDP3) corresponding to a video signal of '1' having a different width of the first data pulse signal are applied before and after the first data pulse signal. A scan pulse signal(MSP) is applied to scan electrode lines in synchronization with the first and second data pulses. The scan pulse is supplied with a resonance pulse via an energy recovery device when the second data pulse is applied.

Description

Scan driving method of plasma display panel and apparatus therefor {DRIVING METHOD FOR SCANNING OF PLASMA DISPLAY PANEL AND APPARATUS THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for driving a plasma display panel. More particularly, the present invention relates to a method for driving a plasma display panel and to a device for driving the plasma display panel. It is about.

Recently, a plasma display panel (hereinafter referred to as "PDP"), which is easy to manufacture a large panel, has attracted attention as a flat panel display device. As a PDP, a three-electrode AC surface discharge type PDP having three electrodes and driven by an alternating voltage is typical.

Referring to FIG. 1, a discharge cell of a three-electrode AC surface discharge type PDP includes a scan electrode 12Y and a sustain electrode 12Z formed on an upper substrate 10, and an address electrode formed on a lower substrate 18. 20X). The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan electrode 12Y and the sustain electrode 12Z side by side. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 14. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge, and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the scan electrode 12Y and the sustain electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower plates and the partition wall.

These discharge cells are arranged in a matrix form as shown in FIG. In FIG. 2, the discharge cells 1 are provided at the intersections of the scan electrode lines Y1 to Ym, the sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn. The scan electrode lines Y1 to Ym are sequentially driven, and the sustain electrode lines Z1 to Zm are commonly driven. The address electrode lines X1 to Xn are driven by being divided into odd-numbered lines and even-numbered lines.

The three-electrode AC surface discharge type PDP is driven by being divided into a plurality of subfields, and gray scale display is performed by emitting light a number of times proportional to the weight of video data in each subfield period. For example, when an image is displayed in 256 gray scales using 8-bit video data, one frame display period (for example, 1/60 second = about 16.7 msec) in each discharge cell 1 is shown in FIG. As shown, the data is divided into eight subfields SF1 to SF8. Each subfield SF1 to SF8 is further divided into a reset period, an address period and a sustain period, and 1: 2: 4: 8:... The weight is given at the ratio of 128. Here, the reset period is a period for initializing the discharge cells, the address period is a period for causing selective address discharge according to the logic value of the video data, and the sustain period is for discharge to be maintained in the discharge cells in which the address discharge has occurred. It is a period. The reset period and the address period are equally allocated to each subfield period.

4 is a view showing a waveform diagram according to a conventional method for driving a PDP.

Referring to FIG. 4, first, all discharge cells are initialized by causing discharge to occur in all discharge cells in a reset period (not shown). Following the reset period, in the address period, the scan pulse SP is sequentially supplied to the scan electrode lines Y1 to Ym, and the data pulse DP synchronized with the scan pulse SP is supplied to the address electrode lines X1. To Xn) to cause selective address discharge. Subsequently, sustain discharges are generated in the discharge cells in which the address discharge is generated by alternately supplying sustain pulses SUSPy and SUSPz to scan electrode lines Y1 to Ym and sustain electrode lines Z1 to Zm in the sustain period. This is maintained for a predetermined period of time.

In such a subfield driving method, the sustain period is a period for displaying an image, and a certain amount of time must be secured in order to achieve appropriate luminance. However, when the resolution becomes high or the size of the screen increases, the number of scan electrode lines Y of the PDP increases. Accordingly, since the address period is increased, the sustain period is naturally shortened, resulting in a problem of low luminance. For this reason, when the address electrode line is divided and multi-addressed, a driving IC is added to increase the manufacturing cost.

In order to solve this problem, the pulse width for address discharge should be reduced, but if the pulse width is reduced, the discharge becomes unstable and the probability of address failure increases. In order to eliminate such an address failure, a method of providing priming particles before an address discharge occurs by adding auxiliary electrode lines and a method by reconstruction and optimization of an address pulse in an existing three-electrode structure may be considered. However, the production of priming particles by the auxiliary electrode line has a disadvantage in that the manufacturing process of the panel is complicated and difficult to drive. Therefore, the method of improving the address pulse in the conventional three-electrode structure is the best method. However, when the number of scanning electrode lines Y increases, address discharge should occur for a very short period of about 1 [mu] s per line, but it is known that an address is impossible with a conventional 1 [mu] s pulse. This is because the discharge does not mature enough for 1 ms, and thus sufficient wall charges necessary for sustaining the discharge during address discharge cannot be formed on the scan electrode 12Y and sustain electrode 12Z. In addition, the state of space charge is different for each discharge cell, and the address becomes unstable due to the influence of adjacent cells.

Accordingly, an object of the present invention is to provide a scan driving method and apparatus for a plasma display panel having an energy recovery circuit in a scan pulse driving circuit to which scan pulses are superimposed to increase driving efficiency.

Another object of the present invention is to provide a scan driving method and apparatus for a plasma display panel which can increase driving efficiency without supplying scan pulses overlapping each other by providing another type of energy recovery circuit in the scan pulse driving circuit.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type plasma display panel.

FIG. 2 is an overall electrode layout of the plasma display panel including the discharge cells shown in FIG.

3 is a frame configuration diagram for explaining a conventional subfield driving method.

4 is a waveform diagram showing a method of driving a conventional plasma display panel.

5 is a waveform diagram illustrating driving waveforms driven in an address period of a plasma display panel according to an exemplary embodiment of the present invention.

FIG. 6 is a diagram illustrating a driving circuit according to a first embodiment of the present invention for driving the scan pulse in FIG. 5.

7 is a view illustrating in detail a switch operation and a driving waveform according to the driving circuit of FIG. 6;

FIG. 8 is a view showing a driving circuit of a PDP according to a second embodiment of the present invention for driving the scanning pulse in FIG.

9 illustrates a driving circuit of a PDP according to a third embodiment of the present invention.

10 is a view showing a driving waveform in the method for driving a PDP according to the fourth embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

1: discharge cell 10: upper substrate

12Y: scan / sustain electrode 12Z: sustain electrode

14,22 dielectric layer 16: protective film

18: lower substrate 20X: address electrode

24: partition 26: phosphor layer

40,45,47,50: Scan driver 41,46,48,51: Scan pulse E / R driver

44,44 ': scan electrode driving means

In order to achieve the above object, a scan driving method of a plasma display panel according to the present invention includes applying a first data pulse corresponding to a video signal of '1' to address electrode lines, and simultaneously applying the first data pulse. Applying a second data pulse corresponding to a video signal of '1' different from the width of the first data pulse before and after the first data pulse, and scanning formed in a direction crossing the address electrode lines In the electrode lines, a scanning pulse is supplied in synchronization with the first data pulse and the second data pulse, and the scanning pulse includes supplying a resonance pulse by an energy recovery device when the second data pulse is supplied. Characterized in that.

In this case, the scan electrode lines are divided into at least two scan electrode line blocks, and the scan pulses are sequentially supplied alternately to the scan electrode lines included in each block.

Another scan driving method of a plasma display panel according to the present invention includes applying a data pulse corresponding to a video signal of '1' to address electrode lines, and scanning electrode lines formed in a direction crossing the address electrode lines. Are divided into two blocks, and the scanning electrode lines included in each block are sequentially supplied with the scanning pulses in synchronization with the data pulses, and the scanning pulses are supplied to the energy recovery apparatus when the data pulses are supplied. It characterized in that it comprises a step of supplying a resonant pulse.

A scan driving apparatus for a plasma display panel according to the present invention includes a scan voltage source for generating a scan voltage, a first switch element connected to the scan voltage source for driving the scan voltage source for an address period, and a first switch element. A scan driver connected to sequentially supply scan pulses to a scan electrode, a second switch element connected between the scan driver and a base voltage source to supply a base voltage to the scan pulse, the scan driver and a second An energy recovery device for scanning pulses is provided which reduces the energy loss generated during the generation of the scanning pulses derived from the switch elements.

Another scan driving apparatus of a plasma display panel according to the present invention includes a scan voltage source for generating a scan voltage, a first switch element connected to the scan voltage source for driving the scan voltage source during an address period, and the first switch element. A first scan driver connected to the upper scan electrode line for supplying the scan pulse to the upper scan electrode line, a second scan driver connected to the first switch element to supply the scan pulse to the lower scan electrode line; A second switch element and a third switch element connected between the two scan driver and the base voltage source to supply the base voltage, respectively, and derived from the first and second scan driver and the second switch element, respectively. And energy recovery devices for the first and second scan pulses to reduce the energy loss generated during the generation of the scan pulses. And that is characterized.

Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 5 to 10.

5 is a waveform diagram illustrating driving waveforms driven in an address period of a plasma display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 5, the scan pulse Vs is applied to the scan electrode line Y and the scan pulse supplied to the scan electrode line Y is applied to the address electrode line X in the address period of the driving waveform of the present invention. Auxiliary data pulse ADP and main data pulse MDP are supplied in synchronization with Vs). At this time, the scan pulse Vs is connected to the scan electrode line Y by Y1, Y2, Y3,... Instead of being sequentially supplied as shown above, the VGA-class 480 scan electrode lines Y are divided into upper scan electrode lines Y1 to Y240 and lower scan electrode lines Y241 to Y480, and the upper and lower scan electrode lines The driving pulses Vs are driven so as not to overlap each other in the fields Y1 to Y480. For example, the scan pulses Vs in the scan electrode lines Y1 to Y480 are Y1, Y241, Y2, Y242, Y3, Y243,... Proceed in order.

When a data pulse DP having a logic value of '1' is supplied to the address electrode line X, a main data pulse MDP having a small width Td is applied, and a logic value of data is '0'. The main data pulse MDP is not applied. In addition, when the main data pulse MDP is applied, an auxiliary data pulse ADP having a width Tad smaller than the width Td of the main data pulse MDP is applied before and after the main data pulse MDP. . In addition, the scan pulse Vs applied to the upper and lower scan electrode lines Y1 to Y480 has a main scan pulse having a width (Tad + Td = Ts) of the main data pulse MDP and the auxiliary data pulse ADP. (MSP) and auxiliary data pulses (ADP) are divided into auxiliary scan pulses (ASP) having a width (Tad = Tas). The main scan pulse MSP is applied sequentially and alternately the upper and lower scan electrode lines Y1 to Y480, and the auxiliary scan pulse ASP is applied before the main scan pulse MSP. The scan pulses Vs alternately supplied to the scan electrode lines Y1 to Y480 and sequentially supplied are overlapped by the width Tas of the auxiliary scan pulse ASP.

FIG. 6 is a diagram illustrating a driving circuit according to a first embodiment of the present invention for driving the scan pulse in FIG. 5. FIG. 7 is a diagram illustrating in detail a switch operation and a driving waveform according to the driving circuit in FIG. 6. to be.

Referring to FIG. 6, a scan driving apparatus of a PDP according to the present invention includes a first switch element Q1, a scan driver 40, an E / R driver 41 for a scan pulse, and a second switch element Q2. do.

The first switch element Q1 is connected between the scan voltage source Vsc and the scan driver 40 so that the scan voltage source Vsc is supplied during the address period.

The scan driver 40 is connected in series between the first switch element Q1 and the second switch element Q2 to sequentially output the scan pulse SP. The scan driver 40 also includes a third switch element Q3 and a fourth switch element Q4 in series connection for the switching action. The scan pulse SP has a high voltage when the third switch element Q2 is turned on, and has a low voltage when the fourth switch element Q3 is turned on.

The scan pulse E / R driver 41 is derived and connected from the first node n1 between the scan driver 40 and the second switch element Q2. The scanning pulse E / R driver 41 includes a capacitor C connected to a base voltage source, first and second switches S1 and S2 connected in parallel to the capacitor C, and first and second switches. First and second diodes D1 and D2 connected in series to S1 and S2, respectively, and an inductor L connected between the first node n1 and the second node n2.

The second switch element Q2 is connected between the scan driver 40 and the base voltage source so that the OV is applied when the scan pulse SP is applied.

Referring to FIG. 7, since the first switch element Q1 is a function of supplying a scan voltage to the scan electrode line Y, the first switch element Q1 is always turned on during the address period for driving the PDP. The third switch and the fourth switch elements Q3 and Q4 represent one channel as a switch inside the scan driver 40.

The scan pulse generates an output waveform when the third switch element Q3 is turned off and the fourth switch element Q4 is turned on. As the fourth switch element Q4 is turned on and the second switch S2 of the E / R driver 41 for the scan pulse is turned on, the output pulse having the scan reference voltage Vsc has a falling slope. Will occur. At this time, the scan reference voltage by the scan reference voltage source Vsc is charged in the capacitor C.

Subsequently, when turning off the second switch S2 and turning on the second switch element Q2, all the voltages inside the scan driver flow to the base voltage source, thereby maintaining the state in which the scan pulse SP is OV. Hold for time T2. After the second holding time T2 is finished, the second switching device Q2 is turned off and the first switch S1 is turned on at the third holding time T3. In this case, the voltage charged in the capacitor C is output through the first switch S1, the first diode D1, and the fourth switch element Q4. At this time, the output waveform is to output the resonant pulse according to the LC resonant circuit of the capacitor (C) and the inductor (L).

In addition, the negative scanning pulse can be made by connecting the second switch element Q2 to the negative voltage source -Vw rather than the ground voltage source GND.

FIG. 8 is a diagram illustrating a driving circuit of a PDP according to a second embodiment of the present invention for driving the scan pulse of FIG. 5.

Referring to FIG. 8, the driving circuit according to the second embodiment of the present invention has the same driving circuit and driving waveform as in FIG. 7, but scan pulses on the upper scan electrode lines G1 and the lower scan electrode lines G2. Separate the scan driving device for supplying. At this time, since the operation of the scan driving device that sends the scan pulse to the upper scan electrode lines G1 and the lower scan electrode lines G2 is separated, the operation of the scan driver does not affect each other.

The scan driving apparatus of the PDP according to the present invention includes a first switch element Q1, an upper scan electrode line driver 44, and a lower scan electrode line driver 44 '.

The first switch element Q1 is connected between the scan voltage source Vsc, the upper scan electrode line driver 44 and the lower scan electrode line driver 44 'so that the scan voltage source Vsc is supplied during the address period.

The upper scan electrode line driver 44 includes a first scan driver 45, a first scan pulse E / R driver 46, and a second switch element Q2, and the lower scan electrode line driver 44 ′. A second scan driver 47, a second scan pulse E / R driver 48, and a second switch element Q2 'are provided.

The first scan driver 45 is connected in series between the first switch element Q1 and the second switch element Q2 to sequentially output the scan pulse SP to the upper scan electrode lines Y1 to Y240. The first scan driver 45 also includes a third switch element Q3 and a fourth switch element Q4 in series connection for the switching action. The scan pulse SP has a high voltage when the third switch element Q2 is turned on, and has a low voltage when the fourth switch element Q3 is turned on.

The E / R driver 46 for the first scan pulse is derived from the first node n1 between the first scan driver 45 and the second switch element Q2 and connected. The scan pulse E / R driver 46 includes an external capacitor C connected to a base voltage source, first and second switches S1 and S2 connected in parallel to the external capacitor C, and first and second electrodes. First and second diodes D1 and D2 connected in series to the two switches S1 and S2, respectively, and an inductor L connected between the first node n1 and the second node n2.

The second scan driver 47 is connected in series between the first switch element Q1 'and the second switch element Q2' to sequentially output the scan pulse SP to the lower scan electrode lines Y241 to Y480. do. The second scan driver 47 also includes a third switch element Q3 'and a fourth switch element Q4' of series connection for the switching action. The scan pulse SP has a high voltage when the third switch element Q2 'is turned on, and has a low voltage when the fourth switch element Q3' is turned on.

The E / R driver 48 for the second scan pulse is derived from the first node n1 between the second scan driver 47 and the second switch element Q2 'and connected. The scanning pulse E / R driver 48 includes an external capacitor C connected to a base voltage source, first and second switches S1 'and S2' connected in parallel to the external capacitor C, and a first one. And an inductor connected between the first and second diodes D1 'and D2' connected in series to the second switches S1 'and S2', respectively, and between the first node n1 and the second node n2. L).

The second switch elements Q2 and Q2 'are connected between the first and second scan drivers 45 and 47 and the base voltage source so that the OV is applied when the scan pulse SP is applied.

The driving circuit shown in FIG. 8 is operated in the same manner as the driving circuit and driving waveform shown in FIG.

9 is a diagram illustrating a driving circuit of a PDP according to a third embodiment of the present invention.

Referring to FIG. 9, in the driving circuit of the PDP according to the present invention, the inductor L of the scan pulse E / R driver 51 in FIG. 7 is connected in series to the first and second switches S1 and S2, respectively. And first and second inductors L1 and L2.

In this case, when the inductance values of the two inductors L1 and L2 have the same inductance value, when the inductance values of the two inductors have the same slope waveform rising and falling pulses by the resonant circuit with the capacitor C, they have different inductance values. It is possible to set different waveforms when the scan voltage from the scan voltage source is recovered and supplied by the E / R driver.

FIG. 10 is a diagram illustrating a driving waveform in the driving method of the PDP according to the fourth embodiment of the present invention.

Referring to FIG. 10, in the driving waveform according to the present invention, data pulses DP1, DP2, DP3,... Are sequentially driven to the address electrode X. FIG. The scan pulse is driven in synchronization with the data pulse DP. In this case, the scan pulses applied to the scan electrode lines are alternately supplied to the upper scan electrode lines Y241 to Y480 and the lower scan electrode lines Y241 to Y480 as shown in FIG. 5.

The scanning pulse applied here has a slope shape as shown in FIG. 7 using an energy recovery circuit.

As a result, the driving waveform according to the present invention enables the driving of the PDP using an energy recovery circuit by separately driving the upper and lower scan electrode lines without applying the scan pulses to overlap each other.

As described above, according to the scan driving method and apparatus of the plasma display panel according to the present invention, by using an energy recovery circuit when the scan pulses are overlapped, the internal heat generation of the scan driver can be reduced and power consumption can be reduced. .

In addition, when the scan driving apparatus of the present invention is used, the data pulses are not superimposed by changing the driving order of the scan electrode lines.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (17)

Applying a first data pulse corresponding to a video signal of '1' to the address electrode lines; Applying a first data pulse and a second data pulse corresponding to a video signal of '1' different from the width of the first data pulse before and after the first data pulse; Scanning pulses are supplied to the scan electrode lines formed in a direction crossing the address electrode lines in synchronization with the first data pulse and the second data pulse; And the scanning pulses are supplied with a resonant pulse by the energy recovery device when the second data pulses are supplied. The method of claim 1, The pulse width of the second data pulse is set to be narrower than the pulse width of the first data pulse. The method of claim 1, The scan electrode lines are divided into at least two scan electrode line blocks, and the scan pulses are sequentially supplied to the scan electrode lines included in each block, and the scan pulses are supplied. The method of claim 1, The scan driving method of the plasma display panel, characterized in that the shape, the slope and the overlapping time of the scan pulses supplied to the scan electrode lines are variable. Applying a data pulse corresponding to the video signal of '1' to the address electrode lines; Scanning electrode lines formed in a direction intersecting the address electrode lines are divided into two blocks, and scanning pulses alternately and sequentially supplied to the scanning electrode lines included in each block are synchronized with the data pulses. Wow, The scan pulse is a scan driving method of the plasma display panel comprising the step of supplying a resonant pulse by the energy recovery device when the data pulse is supplied. The method of claim 5, The scan driving method of the plasma display panel, characterized in that the shape, the slope and the overlapping time of the scan pulses supplied to the scan electrode lines are variable. A scan voltage source for generating a scan voltage, A first switch element connected to said scan voltage source for driving said scan voltage source for an address period; A scan driver connected to the first switch element for sequentially supplying scan pulses to scan electrodes; A second switch element connected between the scan driver and a ground voltage source to supply a ground voltage to the scan pulse; And an energy recovery device for the scan pulse derived from the scan driver and the second switch element to reduce energy loss generated during generation of the scan pulse. The method of claim 7, wherein The scan driver comprises: a third switch element for supplying a high voltage scan pulse to the scan electrode; And a fourth switch element connected to the third switch element to supply a low voltage scan pulse to the scan electrode. The method of claim 7, wherein The energy recovery device for scanning pulses includes a capacitor that charges and discharges a voltage supplied from the scan voltage source; An inductor driven by a voltage charged in the capacitor to form a series resonant circuit together with the capacitor to supply a resonance waveform to a scan electrode line during charge and discharge of the scan pulse; A first switch connected to the capacitor to switch signal paths of the capacitor and the inductor; A second switch commonly connected to the capacitor and the first switch to switch signal paths of the capacitor and the inductor; And first and second diodes connected in series with the first and second switches to flow only in a predetermined direction when switching signal paths. The method of claim 9, And an inductor for supplying a resonance waveform to the scan electrode further comprises first and second inductors separated in two so as to be connected in series with the first and second switches. The method of claim 10, And an inductance value of the first inductor and the second inductor is the same. The method of claim 10, And an inductance value of the first inductor and the second inductor is different from each other. A scan voltage source for generating a scan voltage, A first switch element connected to said scan voltage source for driving said scan voltage source for an address period; A first scan driver connected to the first switch element for supplying a scan pulse to an upper scan electrode line; A second scan driver connected to the first switch element for supplying a scan pulse to a lower scan electrode line; A second switch element and a third switch element connected between the first and second scan drivers and a base voltage source to supply the base voltage with the scan pulse; And an energy recovery device for the first and second scan pulses, which is derived from between the first and second scan drivers and the second switch element to reduce energy loss generated during generation of the scan pulses. Scan drive on display panel. The method of claim 13, The energy recovery apparatus for the first and second scan pulses includes a capacitor that charges and discharges the voltage supplied from the scan voltage source; An inductor driven by a voltage charged in the capacitor to form a series resonant circuit together with the capacitor to supply a resonance waveform to a scan electrode line during charge and discharge of the scan pulse; A first switch connected to the capacitor to switch signal paths of the capacitor and the inductor; A second switch commonly connected to the capacitor and the first switch to switch signal paths of the capacitor and the inductor; And first and second diodes connected in series with the first and second switches to flow only in a predetermined direction when switching signal paths. The method of claim 14, And an inductor for supplying a resonance waveform to the scan electrode further comprises first and second inductors separated in two so as to be connected in series with the first and second switches. The method of claim 15, And an inductance value of the first inductor and the second inductor is the same. The method of claim 15, And an inductance value of the first inductor and the second inductor is different from each other.