KR100330031B1 - Method for Driving Plasma Display Panel - Google Patents

Abstract

The present invention relates to a method of driving a PDP which can lengthen an address discharge time so that an address discharge failure does not occur while keeping the address time short.

The PDP driving method according to the present invention includes a plurality of scan / hold electrode lines and a plurality of address electrode lines for address discharge for selecting a cell to be displayed or non-displayed, the address period being a scan pulse and a previous line scan pulse. Generating an auxiliary scan pulse superimposed with the second pulse; adding an auxiliary scan pulse to the scan pulse and sequentially supplying the auxiliary scan pulse to the scan / sustain electrode lines; and a pulse width according to a logic value of data for selecting a cell to be displayed. And supplying data pulses to the address electrode lines.

According to the present invention, the address pulse width is adjusted to generate an auxiliary discharge at an unnecessary time in which no address discharge occurs, and thus the address discharge is performed. In addition, high speed driving is possible.

Description

Method for Driving Plasma Display Panel {Method for Driving Plasma Display Panel}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a plasma display panel, and more particularly, to a method of driving a plasma display panel which can lengthen an address discharge time so that an address discharge failure does not occur while keeping the address time short.

Recently, a plasma display panel (hereinafter referred to as a 'PDP'), which is easy to manufacture a large panel, has attracted attention as a flat panel display device. As a PDP, a three-electrode AC surface discharge type PDP having three electrodes and driven by an alternating voltage is typical.

Referring to FIG. 1, the discharge cells of the three-electrode AC surface discharge type PDP are formed on the scan / sustain electrode 12Y and the common sustain electrode 12Z formed on the upper substrate 10, and the lower substrate 18. An address electrode 20X is provided. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan / suspension electrode 12Y and the common sustain electrode 12Z side by side. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 14. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge, and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the scan / sustain electrode 12Y and the common sustain electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower plates and the partition wall.

These discharge cells are arranged in the form of a matrix as shown in FIG. In FIG. 2, the discharge cells 1 are provided at the intersections of the scan / sustain electrode lines Y1 to Ym, the common sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn. The scan / sustain electrode lines Y1 to Ym are sequentially driven, and the common sustain electrode lines Z1 to Zm are commonly driven. The address electrode lines X1 to Xn are driven by being divided into odd-numbered lines and even-numbered lines.

The three-electrode AC surface discharge type PDP is driven by being divided into a plurality of subfields, and gray scale display is performed by emitting light a number of times proportional to the weight of video data in each subfield period. For example, when an image is displayed in 256 gray scales using 8-bit video data, one frame display period (for example, 1/60 second = about 16.7 msec) in each discharge cell 1 is shown in FIG. As shown in the figure, the data is divided into eight subfields SF1 to SF8. Each subfield SF1 to SF8 is further divided into a reset period, an address period, and a sustain period, and 1: 2: 4: 8:... The weight is given at the ratio of 128. Here, the reset period is a period for initializing the discharge cells, the address period is a period during which selective address discharge occurs according to the logic value of the video data, and the sustain period is such that discharge is maintained in the discharge cells in which the address discharge has occurred. It is a period. The reset period and the address period are equally assigned to each subfield period.

4, a driving waveform diagram supplied to the PDP shown in FIG. 2 during an arbitrary subfield period is shown according to the conventional PDP driving method. First, all discharge cells are initialized by causing discharge to occur in all discharge cells in a reset period (not shown). Following the reset period, in the address period, the scan pulse SP is sequentially supplied to the scan / sustain electrode lines Y1 to Ym, and the data pulse DP synchronized with the scan pulse SP is applied to the address electrode lines. Supplying to (X1 to Xn) causes selective address discharge to occur. Subsequently, in the discharge sustain period, the address discharge is generated by alternately supplying the sustain pulses SUSPy and SUSz to the scan / sustain electrode lines Y1 to Ym and the common sustain electrode lines Z1 to Zm. In the discharge cells, the discharge is maintained for a predetermined period of time.

In such a subfield driving method, the discharge sustain period is a period for displaying an image, and a certain amount of time must be secured in order to achieve appropriate luminance. However, when the resolution is increased or the size of the screen increases, the number of scanning lines of the PDP increases. Accordingly, since the address period is increased, the discharge sustain period is naturally shortened, resulting in a problem of low luminance. For this reason, in the case of multi-addressing the address electrode line by dividing, a driving IC is added to increase the manufacturing cost.

In order to solve this problem, the pulse width for address discharge should be reduced, but if the pulse width is reduced, the discharge becomes unstable and the probability of address failure increases. In order to eliminate such an address failure, a method of providing priming particles before addressing by adding auxiliary electrode lines and a method of reconfiguring and optimizing an address pulse in an existing three-electrode structure may be considered. However, the production of priming particles by the auxiliary electrode line has a disadvantage in that the manufacturing process of the panel is complicated and difficult to drive. Therefore, the method of improving the address pulse in the conventional three-electrode structure is the best method. However, when the number of scan lines increases, address discharge should occur for a very short period of about 1 ms per line, but it is known that an address is impossible with a conventional 1 ms pulse. This is because the discharge does not mature enough for 1 ms, and thus, sufficient wall charges necessary for sustaining discharge during address discharge cannot be formed on the scan / maintenance electrode and the common sustain electrode. In addition, the state of the space charge is different for each discharge cell, and the address becomes unstable due to influence by adjacent cells. As described above, since the discharge is not properly performed at 1 ms or less, a method for shortening the address period while maintaining the discharge time at 1 ms or more during the address discharge is needed.

Accordingly, it is an object of the present invention to provide a method of driving a PDP which can lengthen an address discharge time so that an address discharge failure does not occur while keeping the address time short.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge plasma display panel.

FIG. 2 is an overall electrode arrangement diagram of a plasma display panel including the discharge cells shown in FIG. 1.

3 is a frame configuration diagram for explaining a conventional subfield driving method.

4 is a driving waveform diagram of a conventional plasma display panel driving method.

5 is an address driving waveform diagram in a plasma display panel driving method according to an embodiment of the present invention;

6 is an address driving waveform diagram of a plasma display panel driving method according to another embodiment of the present invention;

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 12Y: scanning / holding electrode

12Z: common sustain electrode 14: upper dielectric layer

16: protective film 18: lower substrate

20X: address electrode 22: lower dielectric layer

24: partition 26: phosphor

1: discharge cell

In order to achieve the above object, the PDP driving method according to the present invention includes a plurality of scan / hold electrode lines and a plurality of address electrode lines for address discharge for selecting a cell to be displayed or non-displayed, and the address period is scanned Generating a pulse, an auxiliary scan pulse overlapping the previous line scan pulse, adding an auxiliary scan pulse to the scan pulse, and sequentially supplying the scan pulse to the scan / hold electrode lines; and data for selecting a cell to be displayed. And supplying a data pulse to the address electrode line by varying the pulse width according to a logic value of.

Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS. 5 and 6.

5 shows an address pulse for address discharge in a PDP driving method according to an embodiment of the present invention. In FIG. 5, the pulse width supplied to the address electrode lines Xn, Xn + i, and Xn + j varies depending on the presence or absence of data, that is, the logic value of the data. In other words, in the case of the discharge cells having data to be displayed in the address electrode lines Xn, Xn + i, and Xn + j (that is, when the logic value of the data is '1'), the width Td is smaller than the conventional example. For example, when the main data pulse (MDP) having a width of about 1 ms is applied and there is no data to be displayed (that is, when the logic value of the data is '0'), the micro width ( An auxiliary data pulse ADP having Tad) is applied. In addition, the scan electrode lines Ym, Ym + 1, Ym + 2, and Ym + 3 include the main scan pulse MSP corresponding to the main data pulse MDP and the auxiliary data prior to the main scan pulse MSP. The scan pulse to which the auxiliary scan pulse ASP corresponding to the pulse ADP width Tad is added is applied. In other words, the conventional scanning pulse is applied in the form of having the same pulse width in synchronization with the data pulse, but in the present invention, the width of the auxiliary data pulse ADP is slightly earlier than the time when the main data pulse MDP is applied. The scanning pulse is applied at a point earlier than (Tad). Accordingly, the scan pulses sequentially supplied to the scan electrode lines Ym, Ym + 1, Ym + 2, and Ym + 3 are overlapped by the width Tas of the previous scan pulse and the auxiliary scan pulse ASP. Is approved. Here, the auxiliary data pulse ADP and the auxiliary scan pulse ASP serve to supply priming particles for a short time without generating a normal address discharge. In detail, in the discharge cell to which the main data pulse (MDP) is supplied, the secondary discharge occurs at the portion where the main data pulse (MDP) or the auxiliary data pulse (ADP) and the auxiliary scan pulse (ASP) supplied at the previous line scan time overlap. After the generation, the normal address discharge occurs at the portion where the main data pulse MDP and the main scan pulse MSP supplied at the current line scan time overlap. As a result, in the discharge cell supplied with the main data pulse MDP, the address discharge is discharged during the Tas + Ts time, as shown in FIG. 5A, thereby increasing the address discharge time. In the discharge cell supplied with the auxiliary data pulse ADP, as shown in FIG. 5B, the main data pulse MDP or the auxiliary data pulse ADP and the auxiliary scan pulse ASP that are supplied at the previous line scan time are overlapped. Auxiliary discharge occurs in the part, and the auxiliary discharge occurs in a part where the auxiliary data pulse (ADP) and the main scan pulse (MSP) supplied at the current line scan time overlap. However, this auxiliary discharge period is made short enough to prevent normal address discharge, that is, false discharge.

Further, in order to reduce the size of the auxiliary discharge, as shown in FIG. 6, the voltage Va of the auxiliary scan pulse ASP for the auxiliary discharge is larger than the voltage Vs of the main scan pulse MSP for the normal address discharge. It can also be applied small.

As described above, in the PDP driving method of the present invention, the width of the data pulse is adjusted according to the logic value of the data, and the scan pulses are sequentially supplied for a predetermined time. As a result, an auxiliary discharge is generated in such a way that an erroneous discharge does not occur in an unnecessary time in which no discharge occurs in the address period, and then address discharge is performed using priming particles generated in the auxiliary discharge. In addition, the actual address discharge period can be extended. Accordingly, since the address pulse can be applied shorter than before, high-speed driving is possible, and address failure due to insufficient address time in each discharge cell can be prevented.

As described above, in the PDP driving method according to the present invention, the address pulse width is adjusted by generating an auxiliary discharge at an unnecessary time when the address discharge is not generated by adjusting the address pulse width, so that the overall address time is shorter than the conventional address discharge. The period is increased to prevent address failure and to enable high speed driving.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (6)

A driving method of a plasma display panel including a plurality of scan / hold electrode lines and a plurality of address electrode lines for address discharge for selecting a cell to be displayed or not displayed, The address period Generating a scanning pulse and an auxiliary scanning pulse overlapping the previous line scanning pulse; Adding the auxiliary scan pulse to the scan pulse and sequentially supplying the scan pulse to the scan / sustain electrode lines; And supplying data pulses to the address electrode lines with different pulse widths according to logic values of the data for selecting the cell to be displayed. The method of claim 1, A data pulse is supplied to a cell to be addressed according to the logic value of the data, and an auxiliary data pulse having a smaller pulse width than the data pulse is applied to a cell not to be addressed. The method of claim 2, When the data pulse is supplied to the address electrode line of any discharge cell included in the plasma display panel, A weak auxiliary discharge is generated by any of the data pulses and auxiliary data pulses supplied at the previous line scanning time and the auxiliary scan pulses superimposed thereon; And generating an address discharge by a data pulse supplied at a current line scan time and a scan pulse superimposed thereon using the auxiliary discharge. The method of claim 2, When the auxiliary data pulse is supplied to the address electrode line of any discharge cell included in the plasma display panel, A weak auxiliary discharge is generated by any of the data pulses and auxiliary data pulses supplied at the previous line scanning time and the auxiliary scan pulses superimposed thereon; And generating a weak auxiliary discharge by the auxiliary data pulses supplied at the current line scanning time and the scanning pulses superimposed thereon using the auxiliary discharges. The method of claim 1, And the voltage of the auxiliary scan pulse is smaller than that of the scan pulse. The method of claim 1, And a width of the scan pulse is 1 kHz or less.