KR20020065948A - p-type Ohmic contact of GaN Semiconductor Device - Google Patents
p-type Ohmic contact of GaN Semiconductor Device Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 36
- 239000002184 metal Substances 0.000 claims abstract description 61
- 229910052751 metal Inorganic materials 0.000 claims abstract description 61
- 150000004767 nitrides Chemical class 0.000 claims abstract description 33
- 238000009792 diffusion process Methods 0.000 claims abstract description 3
- 229910052697 platinum Inorganic materials 0.000 claims description 4
- 230000000694 effects Effects 0.000 claims description 3
- 150000002739 metals Chemical class 0.000 claims 1
- 230000002265 prevention Effects 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 4
- 229910052737 gold Inorganic materials 0.000 abstract description 3
- 230000003405 preventing effect Effects 0.000 abstract description 2
- 239000007769 metal material Substances 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 description 12
- 239000000758 substrate Substances 0.000 description 11
- 239000013078 crystal Substances 0.000 description 10
- 238000005253 cladding Methods 0.000 description 5
- 229910052594 sapphire Inorganic materials 0.000 description 5
- 239000010980 sapphire Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 229910002704 AlGaN Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000003086 colorant Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000009616 inductively coupled plasma Methods 0.000 description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 2
- 229910003465 moissanite Inorganic materials 0.000 description 2
- 238000005036 potential barrier Methods 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N zinc oxide Inorganic materials [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 1
- 229910019080 Mg-H Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000000313 electron-beam-induced deposition Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000010406 interfacial reaction Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
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- Electrodes Of Semiconductors (AREA)
Abstract
Description
본 발명은 질화물 반도체소자의 p형 오믹 콘택에 관한 것으로서, 특히, 소자의 구동전압을 낮추어 고효율 및 동작 수명(life time)을 연장할 수 있는 질화물 반도체소자의 p형 오믹 콘택에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to p-type ohmic contacts of nitride semiconductor devices, and more particularly, to p-type ohmic contacts of nitride semiconductor devices capable of extending the driving voltage of the devices to extend their efficiency and life time.
질화물 반도체소자는 청색 발광다이오드(light emitting diode : 이하, LED라 칭함), 청색 레이저 다이오드(laser diode : 이하, LD라 칭함) 또는 태양 전지 등의 재료로써 최근 크게 주목받고 있다.Nitride semiconductor devices have recently attracted much attention as materials such as blue light emitting diodes (hereinafter referred to as LEDs), blue laser diodes (hereinafter referred to as LDs), or solar cells.
그 중 800∼830 ㎚ 영역의 AlGaAs LED 및 LD에 대해 400 ㎚대의 단 파장 청색 LED는 정보 기록밀도를 3배 이상 증가시키는 것을 가능하게 하여 DVD(digital video disc) 시대의 도래를 예고하고 있다.Among them, the short wavelength blue LEDs in the 400 nm range for the AlGaAs LEDs and the LDs in the 800 to 830 nm region enable the information recording density to be increased by three times or more, thereby predicting the arrival of the digital video disc (DVD) era.
특히, 청색 LED의 개발로 인해 적색 및 녹색과 더불어 빛의 삼원색이 달성되어 모든 자연색의 구현이 용이하게 된다.In particular, the development of a blue LED achieves the three primary colors of light together with red and green to facilitate the implementation of all natural colors.
도 1은 일반적인 질화물 반도체 소자를 도시한 단면도이다.1 is a cross-sectional view showing a general nitride semiconductor device.
일반적으로 질화물 반도체 발광소자는 도 1과 같이 기판(100)과, 상기 기판(100) 상에 순차적으로 형성된 버퍼층(buffer layer)(110) 및 n형 접촉층(120)과, 상기 n형 접촉층(120) 상의 소정 부분에 형성된 n형 클래드층(clad layer)(130)과, 상기 n형 클래드층(130) 상에 순차적으로 형성된 활성층(140), p형 클래드층(150) 및 p형 접촉층(160)과, 상기 n형 클래드층(130)이 형성되지 않은 n형 접촉층(120) 상의 소정 부분 및 상기 p형 접촉층(160) 상의 소정 부분에 각각 형성된 n형 및 p형 전극(170)(180)을 포함하여 이루어진다.In general, a nitride semiconductor light emitting device includes a substrate 100, a buffer layer 110 and an n-type contact layer 120 sequentially formed on the substrate 100, and the n-type contact layer. An n-type clad layer 130 formed on a predetermined portion on the 120, an active layer 140, a p-type clad layer 150, and a p-type contact sequentially formed on the n-type clad layer 130. N-type and p-type electrodes formed on a predetermined portion on the n-type contact layer 120 where the layer 160 and the n-type cladding layer 130 are not formed, and on the p-type contact layer 160, respectively. 170) and 180.
이후에 도시하지 않았지만 각각의 전극에 와이어 본딩하여 열 방출용 히트-신크(Heat-sink)를 접촉시켜, 상기 전극부분에 전류를 흘려줌으로써 구동되는질화물 반도체 발광소자 칩을 제작한다.Although not shown in the drawings, a nitride semiconductor light emitting device chip driven by flowing a current through the electrode portion by contacting a heat-dissipating heat-sink by wire bonding to each electrode is manufactured.
상기에서 기판으로는 사파이어, GaN, SiC, ZnO, GaAs 또는 Si 등이, 상기 버퍼층으로는 GaN, AlN, AlGaN 등이 이용되나 일반적으로는 사파이어 절연기판 상에 유기금속화학기상증착(Metal Organic Chemical Vapor Deposition : 이하, MOCVD라 칭함) 방법으로 증착한 GaN를 이용하여 버퍼층을 형성한다.In the above, sapphire, GaN, SiC, ZnO, GaAs, or Si is used as the substrate, and GaN, AlN, AlGaN, etc. are used as the buffer layer, but in general, organic metal chemical vapor deposition on a sapphire insulating substrate (Metal Organic Chemical Vapor) Deposition: Hereinafter, a buffer layer is formed using GaN deposited by MOCVD.
그리고, 상기 n형 및 p형 접촉층으로는 각각 n형 및 p형 도핑에 의한 GaN를, 상기 n형 및 p형 클래드층은 각각 n형 및 p형 도핑에 의한 AlGaN를, 상기 n형 전극으로는 Ti/Al을, p형 전극으로는 Ni/Au를 이용하여 형성하고, 상기 p형층을 형성하기 위한 p형 불순물로는 주로 Mg를 도핑하여 형성한다.The n-type and p-type contact layers are GaN by n-type and p-type doping, respectively, and the n-type and p-type cladding layers are AlGaN by n-type and p-type doping, respectively. Is formed using Ni / Au as a p-type electrode, and is mainly formed by doping Mg as a p-type impurity for forming the p-type layer.
상기와 같은 구조의 일반적인 질화물 반도체소자는 고효율, 고출력의 소자제조에 있어서 몇 가지 문제점이 있다.The general nitride semiconductor device having the above structure has some problems in manufacturing a high efficiency, high output device.
첫째로, 질화물 반도체소자는 격자구조가 다른 사파이어 기판 상에 p-n 접합 질화물 반도체 박막을 성장시키기 때문에 기판과 상층부 결정성장층 사이에 격자부정합(lattice mismatch)이 존재하여 결정 성장된 막질 속에 다량의 결정 결함(dislocation)을 가짐으로 양질의 결정성장층을 얻기 어렵다.First, since a nitride semiconductor device grows a pn junction nitride semiconductor thin film on a sapphire substrate having a different lattice structure, a lattice mismatch exists between the substrate and the upper crystal growth layer, resulting in a large amount of crystal defects in the crystal grown film. (dislocation), it is difficult to obtain a good crystal growth layer.
둘째로, 결정 성장된 박막의 격자 결함에 의해 자연적으로 n형의 특성을 보이며 p형 접촉층을 형성하기 위해 도핑한 Mg가 분위기 가스인 암모니아(NH3)가스의 H와 결함되어 전기적으로 절연특성을 보이는 Mg-H 결합체를 형성한다. 따라서, 고농도의 p형 GaN를 얻는 것이 어렵다.Second, due to the lattice defect of the crystal-grown thin film, n-type is naturally exhibited, and the Mg doped to form the p-type contact layer is electrically insulated from the H of the ammonia (NH 3 ) gas, which is an atmospheric gas. To form an Mg-H conjugate. Therefore, it is difficult to obtain a high concentration of p-type GaN.
셋째로, GaN 발광소자에 전류를 유입시키기 위한 n형 및 p형 전극을 형성함에 있어서, GaN 표면과 전극 사이의 밴드갭 오프셋(band-gap offset) 때문에 대부분의 구동전압이 이곳을 통과하는데 소비된다. 이런 관계로 소자의 구동전압이 매우 크다는 문제가 있다.Third, in forming n-type and p-type electrodes for introducing current into the GaN light emitting device, most of the driving voltage is consumed to pass there because of the band-gap offset between the GaN surface and the electrode. . In this regard, there is a problem that the driving voltage of the device is very large.
본 발명에서 개선하고자하는 문제점은 상술한 종래 질화물 반도체소자의 문제점 중 세 번째에 관한 것으로서, 다시 말하자면 p형 결정성장층을 형성하기 위해 Mg를 도핑시킨 Mg:GaN 결정성장층과 금속전극 사이에는 서로 다른 에너지 밴드갭을 가지고 있어 그 차이에서 오는 밴드 갭 오프셋이 존재하며 이로 인하여 GaN 소자에 동작을 위해 전류를 유입시킬 경우, p형 GaN 결정성장층과 금속전극 사이에는 큰 전압소모(voltage drop)가 일어난다. 이는 결국 소자의 구동전압을 높여 GaN 발광소자의 발광 효율을 저하시킬 뿐만 아니라 소자의 동작 수명을 감소시키는 문제가 있다.The problem to be solved in the present invention relates to the third problem of the above-described conventional nitride semiconductor device, that is, between the Mg: GaN crystal growth layer and the metal electrode doped with Mg to form a p-type crystal growth layer. There is a different energy bandgap, so there is a bandgap offset from the difference, which causes a large voltage drop between the p-type GaN crystal growth layer and the metal electrode when current is introduced to the GaN device for operation. Happens. This, in turn, increases the driving voltage of the device, which not only lowers the luminous efficiency of the GaN light emitting device, but also reduces the operating life of the device.
따라서, 본 발명의 목적은 p형 결정성장층 상에 양호한 p형 오믹 콘택 전류 전압특성을 얻을 수 있는 전극재료를 개발함으로써, 소자의 구동 전압을 낮추어 소자의 발광효율을 높이고, 소자의 동작 수명을 연장시킬 수 있는 질화물 반도체소자의 p형 오믹 콘택을 제공함에 있다.Accordingly, an object of the present invention is to develop an electrode material capable of obtaining good p-type ohmic contact current voltage characteristics on a p-type crystal growth layer, thereby lowering the driving voltage of the device, improving the luminous efficiency of the device, and improving the operating life of the device. It is to provide a p-type ohmic contact of a nitride semiconductor device that can be extended.
상기 목적을 달성하기 위한 본 발명에 따른 질화물 반도체소자의 p형 오믹콘택은 n형 및 p형 전극을 포함하는 일반적인 구조의 질화물 반도체소자에 있어서, 상기 p형 전극으로는 반응성 제 1 금속층/금속간 상호확산 방지효과를 얻을 수 있는 제 2금속층/와이어본딩 효율을 증대시킬 수 있는 제 3 금속층이 순차적으로 적층한 TML(triple metal layer)구조인 것을 특징으로 한다.A p-type ohmic contact of a nitride semiconductor device according to the present invention for achieving the above object is a nitride semiconductor device having a general structure including n-type and p-type electrode, the p-type electrode as a reactive first metal layer / intermetallic A second metal layer / wire bonding efficiency capable of increasing the interdiffusion preventing effect may be a triple metal layer (TML) structure in which a third metal layer is sequentially stacked.
바람직하게는 상기 제 1 금속층으로는 Cr을, 제 2 금속층으로는 Ti 또는 Pt를, 그리고, 제 3 금속층으로는 Au을 사용하는 것을 특징으로 하고, 상기 제 1 금속층은 150 ∼ 350 Å, 제 2 금속층은 600 ∼ 1000 Å, 그리고, 제 3 금속층은 1000 ∼ 5000 Å의 두께 범위를 갖는 것을 특징으로 한다.Preferably, Cr is used as the first metal layer, Ti or Pt is used as the second metal layer, and Au is used as the third metal layer. The first metal layer is 150 to 350 GPa and a second. The metal layer is 600-1000 Pa, and the 3rd metal layer has a thickness range of 1000-5000 Pa.
도 1은 종래의 질화물 반도체소자를 도시하는 단면도.1 is a cross-sectional view showing a conventional nitride semiconductor element.
도 2는 GaN와 금속 전극 계면에서의 에너지 밴드 다이어그램.2 is an energy band diagram at the GaN and metal electrode interface.
도 3은 본 발명의 실시 예에 따른 질화물 반도체소자를 도시하는 단면도.3 is a cross-sectional view showing a nitride semiconductor device according to an embodiment of the present invention.
도 4는 본 발명에 따른 전극 구조형성 후 열처리 전 전류·전압 특성.4 is a current and voltage characteristics before heat treatment after forming the electrode structure according to the present invention.
도 5는 본 발명에 다른 전극 구조형성 후 열처리 후 전류·전압 특성.5 is a current and voltage characteristics after heat treatment after forming the electrode structure according to the present invention.
도 6은 본 발명의 실시 예에 따른 질화물 반도체소자의 작동전압 특성.6 is an operating voltage characteristic of a nitride semiconductor device according to an embodiment of the present invention.
<도면의 주요 부분에 대한 부호의 상세한 설명><Detailed Description of Symbols for Main Parts of Drawings>
200 : 기판 210 : 버퍼층200: substrate 210: buffer layer
220 : n형 접촉층230 : 활성층220: n-type contact layer 230: active layer
240 : p형 클래드층 250 : p형 접촉층240: p-type cladding layer 250: p-type contact layer
260 : n형 전극270 : p형 전극260 n-type electrode 270 p-type electrode
이하, 첨부된 도면을 참고하여 본 발명을 상세히 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.
도 2는 GaN와 금속 전극계면에서의 에너지 밴드 다이어그램이고, 도 3은 본 발명의 실시 예에 따른 질화물 반도체소자의 단면도이고, 도 4 및 도 5는 본 발명에 따른 전극 구조를 사용한 질화물 반도체 소자의 열처리 전, 후의 전류·전압 특성을 나타낸다. 도 6은 본 발명의 실시 예에 따른 질화물 반도체소자에 본 발명의 전극구조를 구현한 질화물 반도체소자의 작동전압 특성을 나타낸다.2 is an energy band diagram at GaN and a metal electrode interface, FIG. 3 is a cross-sectional view of a nitride semiconductor device according to an embodiment of the present invention, and FIGS. 4 and 5 are diagrams of a nitride semiconductor device using an electrode structure according to the present invention. The current and voltage characteristics before and after the heat treatment are shown. 6 illustrates an operating voltage characteristic of a nitride semiconductor device in which the electrode structure of the present invention is implemented in a nitride semiconductor device according to an embodiment of the present invention.
도 2를 참고하여 p형 결정성장층과 금속전극 사이에 오믹콘택을 얻기위한 방법으로는 기본적으로 GaN 표면과 금속전극 사이에 걸리는 구동전압 소비는 포텐셜 베리어(potential barrier) øm- χs로 정의되는 값의 크기에 의해 좌우되며, 이값을 최소화하기 위해 큰 일함수(work function)를 갖는 금속 전극을 사용하는 것이다.As a method for obtaining ohmic contact between the p-type crystal growth layer and the metal electrode with reference to FIG. 2, the driving voltage consumption between the GaN surface and the metal electrode is basically defined as a potential barrier ø m -χ s . It depends on the magnitude of the value to be used, and to minimize this value is to use a metal electrode with a large work function.
여기서 øm는 금속의 일함수이고, χs는 화합물 반도체의 전기음성도(electronaffinity)이다.Where ø m is the work function of the metal and χ s is the electronegativity of the compound semiconductor.
본 발명에서는 기본적으로 다층의 금속층을 형성하여 p형 GaN 접촉층과의 접촉금속으로서 Cr을 사용하여 금속 증착후 열처리 과정시 금속 밴드갭과 p형 GaN 밴드갭의 중간값을 갖는 금속과 GaN의 혼합물 생성에 의해 포텐셜 베리어를 낮추는 효과를 이용하고자 하며, 제 1 금속층인 Cr과 와이어본딩 효율을 높일 수 있는 제 3 금속층인 Au와의 사이에 열처리 시 발생할 수 있는 상호확산을 방지하기 위한 베리어 금속으로 Ti 혹은 Pt를 이용한 제 2 금속층을 삽입하여, 전류 유입시 경계면(interface)에서의 전류 터널링(current)확률을 높임으로서 오믹 콘택을 얻는 효과를 유도하였다.In the present invention, a mixture of a metal and GaN having a median value between a metal band gap and a p-type GaN band gap during the heat treatment process after deposition of metal using Cr as a contact metal with a p-type GaN contact layer is formed by forming a multi-layered metal layer. It is intended to take advantage of the effect of lowering the potential barrier by formation, and as a barrier metal to prevent interdiffusion that may occur during heat treatment between Cr, which is the first metal layer, and Au, which is a third metal layer, which may increase the wire bonding efficiency, is used as Ti or By inserting a second metal layer using Pt, the effect of obtaining an ohmic contact was increased by increasing the current tunneling probability at the interface when the current was introduced.
도 3과 같이 본 발명의 질화물 반도체 발광소자의 구조는 기본적으로 종래의 질화물 반도체 발광소자의 구조와 같이, 기판(200)과, 상기 기판(200) 상에 순차적으로 형성된 버퍼층(210) 및 n형 접촉층(220)과, 상기 n형 접촉층(220) 상에 순차적으로 형성된 활성층(230), p형 클래드층(240) 및 상기 p형 접촉층(250)과, 상기 활성층(230)이 형성되지 않은 n형 접촉층(220) 상의 소정 부분 및 p형 접촉층(250) 상의 소정 부분에 각각 형성된 n형 및 p형 전극(260)(270)을 포함하여 이루어진다.As shown in FIG. 3, the structure of the nitride semiconductor light emitting device of the present invention is basically the same as that of the conventional nitride semiconductor light emitting device, the substrate 200, the buffer layer 210 and the n-type sequentially formed on the substrate 200. The contact layer 220, the active layer 230, the p-type cladding layer 240, the p-type contact layer 250, and the active layer 230, which are sequentially formed on the n-type contact layer 220, are formed. And n-type and p-type electrodes 260 and 270 formed at predetermined portions on the n-type contact layer 220 and predetermined portions on the p-type contact layer 250, respectively.
본 실시 예에서 기판으로는 사파이어, GaN, SiC, ZnO, GaAs 또는 Si 등이, 상기 버퍼층으로는 GaN, AlN 등이 이용되나 본 발명에서는 사파이어 절연기판 상에 MOCVD 방법으로 성장한 InxGa1-xN(0≤x≤1)를 이용하여 버퍼층을 형성한다.In the present embodiment, sapphire, GaN, SiC, ZnO, GaAs, or Si is used as the substrate, and GaN, AlN, etc. are used as the buffer layer, but in the present invention, In x Ga 1-x grown by MOCVD on a sapphire insulating substrate. A buffer layer is formed using N (0 ≦ x ≦ 1).
그리고, 상기 n형 및 p형 접촉층으로는 각각 n형 및 p형 도핑에 의한 GaN를, 상기p형 클래드층은 p형 도핑에 의한 AlGaN를, 상기 p형층은 주로 Mg를 도핑하여 형성한다.The n-type and p-type contact layers are formed by GaN by n-type and p-type doping, the p-type cladding layer is AlGaN by p-type doping, and the p-type layer is mainly doped with Mg.
이후 GaN 에피 웨이퍼 표면에 포토리쏘그라피(photolithography) 방법으로 SiO2마스크를 이용하여, p형 접촉층의 일부를 n형 접촉층이 드러나는 위치까지 유도결합형 플라즈마를 이용하는 ICP(inductively coupled plasma) 식각 장비를 이용하여 건식 식각시킨다. 건식 식각후 전자빔 증착 장치를 이용하여 n형 접촉층 위에 Ti/Al을 이용한 n형 전극을 형성한다.Then, using an SiO 2 mask on the GaN epi wafer surface by photolithography, an inductively coupled plasma (ICP) etching apparatus using an inductively coupled plasma to a position where an n-type contact layer is exposed to a portion of the p-type contact layer. Dry etch using After dry etching, an n-type electrode using Ti / Al is formed on the n-type contact layer using an electron beam deposition apparatus.
본 발명에 따른 질화물 반도체 소자의 특징은 TML구조를 가지는 p형 전극으로, p형 접촉층과 접하는 제 1 금속층으로는 GaN 표면과 열처리시 경계면 반응(interfacial reaction)을 일으키는 반응성 물질인 Cr을 이용하고, 상기 제 1 금속층과 접하는 제 2 금속층은 상기 제 1 금속층과 후술할 와이어본딩을 위한 제 3 금속층과의 상호 확산을 방지하기 위해 Ti 또는 Pt를 이용하고, 상기 제 2 금속층과 접하여 차후의 와이어본딩 공정의 와이어와 접할 제 3 금속층은 금속 전극 형성후 전극과 결정성장층 사이의 접촉성증대를 위한 열처리 공정시, 상기 Ti 또는 Pt 등의 제 2 금속층의 증발을 방지하고 와이어 본딩 효율을 증대시키기 위해 Au를 이용하여 형성한다.A nitride semiconductor device according to the present invention is characterized in that it is a p-type electrode having a TML structure, and the first metal layer contacting the p-type contact layer is made of Cr, which is a reactive material that causes an interfacial reaction upon GaN surface and heat treatment. The second metal layer in contact with the first metal layer uses Ti or Pt to prevent mutual diffusion between the first metal layer and a third metal layer for wire bonding, which will be described later. The second metal layer is in contact with the second metal layer and subsequently wire bonded. The third metal layer to be in contact with the wire of the process is to prevent evaporation of the second metal layer such as Ti or Pt and to increase wire bonding efficiency in the heat treatment process for increasing the contact between the electrode and the crystal growth layer after forming the metal electrode. It forms using Au.
상기에서 제 1 금속층은 150 ∼ 350 Å, 제 2 금속층은 600 ∼ 1000 Å, 그리고, 제 3 금속층은 1000 ∼ 5000 Å의 두께 범위를 갖도록 형성한다.In the above description, the first metal layer is formed to have a thickness in the range of 150 to 350 mm 3, the second metal layer is 600 to 1000 m 3, and the third metal layer is 1000 to 5000 m 3.
상기의 TML구조를 갖는 금속 전극을 형성한 후, 불활성 가스 분위기에서 열처리하므로써 합금화를 유도하여 p형 전극의 오믹 콘택을 얻는다.After the metal electrode having the TML structure is formed, alloying is induced by heat treatment in an inert gas atmosphere to obtain an ohmic contact of the p-type electrode.
이후에 도시하지 않았지만 각각의 전극에 와이어 본딩하여 열방출용 히트-신크(Heat-sink)를 접촉시켜, 상기 전극 부분에 전류를 흘려줌으로써 구동되는 질화물 반도체소자의 칩을 제작한다.Although not shown in the drawings, wires are bonded to each electrode to contact a heat-dissipating heat-sink to fabricate a chip of a nitride semiconductor device driven by flowing a current through the electrode portion.
도 4는 본 발명의 실시 예인 (A)Cr/Ti/Au 및 (B)Cr/Pt/Au 전극을 형성한 후 열처리하기 전의 전류·전압 특성을 도시하는 것으로, 열처리하기 전에는 두가지 금속층 모두 쇼트키(schottky) 특성을 보이는 것을 알 수 있다.Figure 4 shows the current and voltage characteristics of the (A) Cr / Ti / Au and (B) Cr / Pt / Au electrode before the heat treatment after forming the embodiment of the present invention, before the heat treatment both Schottky It can be seen that it exhibits (schottky) properties.
도 5는 본 발명의 실시 예에 따라 (A)Cr/Ti/Au 및 (B)Cr/Pt/Au 전극을 형성한 후, 열처리 한 후의 전류·전압 특성을 도시하는 것으로, 도시된 바와 같이 600 ℃에서 열처리를 실시함에 따라 직선적인(linear) 전류·전압 곡선, 즉, 오믹(Ohmic)특성을 보이고 있다.FIG. 5 illustrates current and voltage characteristics after heat treatment after forming (A) Cr / Ti / Au and (B) Cr / Pt / Au electrodes according to an embodiment of the present invention. The linear current and voltage curves, that is, ohmic characteristics, are exhibited as the heat treatment is carried out at ° C.
도 6은 본 발명의 실시 예에 따른 질화물 반도체소자의 작동전압특성을 도시하는 것으로, (A)Cr/Ti/Au 전극을 형성한 후의 반도체 소자의 작동전압은 3.4V를 나타내었으며, (B)Cr/Pt/Au 전극을 형성한 후의 질화물 반도체소자의 작동전압은 3.7V의 특성을 나타내었다.6 illustrates an operating voltage characteristic of a nitride semiconductor device according to an embodiment of the present invention. (A) The operating voltage of the semiconductor device after forming the Cr / Ti / Au electrode is 3.4 V, and (B) The operating voltage of the nitride semiconductor element after the formation of the Cr / Pt / Au electrode showed a characteristic of 3.7V.
즉, Cr/Ti/Au 및 Cr/Pt/Au 전극 모두 양호한 p형 오믹콘택 전류·전압특성을 나타내고, 도 4 및 도 5에서와 같이 Cr/Pt/Au 전극보다는 Cr/Ti/Au 전극이 양호한 특성을 보임을 알 수 있다.That is, both the Cr / Ti / Au and Cr / Pt / Au electrodes exhibit good p-type ohmic contact current and voltage characteristics, and the Cr / Ti / Au electrodes are better than the Cr / Pt / Au electrodes as shown in FIGS. 4 and 5. It can be seen that it shows characteristics.
따라서, 본 발명에 따른 질화물 반도체 소자의 양호한 p형 오믹 콘택 전류·전압특성을 나타내는 Cr/Ti/Au 및 Cr/Pt/Au 물질을 이용하여 GaN표면과 금속전극 사이에 걸리는 전압소모를 최소화하여 소자의 구동전압을 낮추어 소자의 발광효율을 높이고, 소자의 동작 수명을 연장시킬 수 있는 이점이 있다.Therefore, by using Cr / Ti / Au and Cr / Pt / Au materials exhibiting good p-type ohmic contact current and voltage characteristics of the nitride semiconductor device according to the present invention, the voltage is minimized between the GaN surface and the metal electrode. It is possible to increase the luminous efficiency of the device by lowering the driving voltage of the device and to extend the operating life of the device.
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