JPH10261815A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPH10261815A
JPH10261815A JP6591497A JP6591497A JPH10261815A JP H10261815 A JPH10261815 A JP H10261815A JP 6591497 A JP6591497 A JP 6591497A JP 6591497 A JP6591497 A JP 6591497A JP H10261815 A JPH10261815 A JP H10261815A
Authority
JP
Japan
Prior art keywords
layer
type
semiconductor
group
nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6591497A
Other languages
Japanese (ja)
Inventor
Shigekazu Minagawa
重量 皆川
Masahiko Kawada
雅彦 河田
Jun Goto
順 後藤
Shoichi Akamatsu
正一 赤松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6591497A priority Critical patent/JPH10261815A/en
Publication of JPH10261815A publication Critical patent/JPH10261815A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To manufacture a semiconductor device into a structure, wherein a P side metallic electrode does not come into contact directly with a through lattice defect, and to prevent a metallic element from being diffused fast by a method wherein a P-type IV compound semiconductor region is formed on a crystal region consisting of a nitride semiconductor material and moreover, the metallic electrode is formed on this IV compound semiconductor region. SOLUTION: A P-type IV compound semiconductor region is formed on a crystal region consisting of a nitride semiconductor material and moreover, a metallic electrode is formed on this IV compound semiconductor region. That is, an N-type GaN layer 30, an undoped GaInN buffer layer 29, an undoped GaInN luminous layer 28, an undoped GaInN buffer layer 27, a P-type AlGaN layer 26 and a P-type GaN layer 25 are grown on a substrate crystal 31. Subsequently, a P-type polysilicon layer 24 is adhered to the layer 25 and a P-type polysilicon layer 23 is grown on the layer 24. The obtained wafer is subjected to dry etching from a P side and is subjected to mesa etching until the N-type nitride layer appears, a metallic electrode 22 is formed on the surface of a P-type mesa and a metallic electrode 21 is formed on the N-type nitride layer exposed by the etching.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体装置に係
り、Al,Ga,In等のIII族元素とN,P,As等のV族元素か
ら構成されるIII−V族化合物半導体のうち構成元素と
して少なくともN(窒素)を含む半導体材料、所謂窒化
物半導体材料で形成された半導体装置に好適な電極に関
するものである。本発明の半導体装置は、例えばAlN,Ga
N,あるいはInN結晶を基本的な構成物質とする電子デバ
イスまたは光デバイスとして実施されるものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device comprising a group III-V compound semiconductor composed of a group III element such as Al, Ga and In and a group V element such as N, P and As. The present invention relates to an electrode suitable for a semiconductor device formed of a semiconductor material containing at least N (nitrogen) as an element, that is, a so-called nitride semiconductor material. The semiconductor device of the present invention is, for example, AlN, Ga
The present invention is implemented as an electronic device or an optical device using an N or InN crystal as a basic constituent material.

【0002】[0002]

【従来の技術】窒化物半導体を用いたデバイスは、可視
発光ダイオードをはじめとして半導体レーザ、電界効果
トランジスタ、光検知器などが次々に開発されている。
これらのデバイスが期待された性能を発揮するために
は、低抵抗でかつ信頼性の高いオーミック電極が開発さ
れなければならない。
2. Description of the Related Art As devices using nitride semiconductors, semiconductor lasers, field effect transistors, photodetectors, etc., including visible light emitting diodes, have been developed one after another.
In order for these devices to exhibit the expected performance, ohmic electrodes having low resistance and high reliability must be developed.

【0003】窒化物半導体におけるオーミック電極は、
n型結晶に関してはほぼ満足のいくものが得られている
が、p型結晶にたいしてはまだ十分ではない。
[0003] Ohmic electrodes in nitride semiconductors are:
Almost satisfactory results have been obtained for n-type crystals, but not enough for p-type crystals.

【0004】窒化物結晶で作成された発光ダイオードの
劣化を例として説明する。現用の発光ダイオードの構造
を図1に簡略化して示した。p側金属電極(Ni/Au)11は
p型窒化物結晶層12につけられているが、窒化物結晶層
中にはそれをほぼ垂直に貫通している高密度の格子欠陥
(〜1010cm-3)が存在していることが知られている。ダ
イオードの劣化はp側金属電極をを構成している金属元
素がこの貫通格子欠陥に沿って拡散していき、発光層13
に達してpn接合を短絡するためと解釈されている。
(参考文献:M.Osinsky and D.L.Barton, DegradationM
echanisms in III-N Blue Light Emitting Diodes, pap
er Th-01, Proceedingsof theInternational Symposium
on Blue Laser and Light Emitting Diodes, Chiba,Ja
pan 1996) また、半導体レーザにおいてはその駆動条件が発光ダイ
オードよりも遥かに過酷であるため、室温での連続発振
時の寿命は二十から三十時間しかない。このレーザにお
ける劣化機構も本質的には上記発光ダイオードと同一で
あると考えられている。したがって、p側金属電極に起
因する劣化現象の阻止は非常に重要な技術課題である。
A description will be given of an example of deterioration of a light emitting diode made of a nitride crystal. FIG. 1 shows a simplified structure of an active light emitting diode. p-side metal electrode (Ni / Au) 11
Although attached to the p-type nitride crystal layer 12, it is known that the nitride crystal layer has a high density of lattice defects (up to 10 10 cm -3 ) penetrating it almost vertically. Have been. The degradation of the diode is caused by the fact that the metal element constituting the p-side metal electrode diffuses along the penetrating lattice defect, and the light emitting layer 13
To short-circuit the pn junction.
(Reference: M. Osinsky and DLBarton, DegradationM
echanisms in III-N Blue Light Emitting Diodes, pap
er Th-01, Proceedingsof theInternational Symposium
on Blue Laser and Light Emitting Diodes, Chiba, Ja
pan 1996) Further, since the driving condition of the semiconductor laser is much harsher than that of the light emitting diode, the lifetime at the time of continuous oscillation at room temperature is only 20 to 30 hours. The degradation mechanism of this laser is also considered to be essentially the same as that of the light emitting diode. Therefore, prevention of the deterioration phenomenon caused by the p-side metal electrode is a very important technical issue.

【0005】[0005]

【発明が解決しようとする課題】上述のごとく、窒化物
結晶をもちいた半導体デバイスの信頼性を向上させるた
めには、 p側金属電極を構成している金属元素が貫通格
子欠陥を通じて窒化物結晶中に拡散していくという現象
を阻止しなければならない。
As described above, in order to improve the reliability of a semiconductor device using a nitride crystal, the metal element constituting the p-side metal electrode must have a nitride crystal through a penetrating lattice defect. We need to stop the phenomenon of diffusion inside.

【0006】[0006]

【課題を解決するための手段】本発明は上記の問題点を
解決するために、p側金属電極と窒化物結晶の間にさら
にp型の結晶層を介在させ、これを以てp側金属電極が貫
通格子欠陥に直接接触しない構造にし、金属元素の早い
拡散を防止することを意図したものである。また、この
介在層があると他の機構で拡散する金属元素が窒化物層
に到達する時間を遅らせることができ、さらにこの層を
禁制帯幅の狭い半導体にすることによって価電子帯のエ
ネルギー不連続量を小さくし、かつ高い正孔濃度が得ら
れるので低接触抵抗の高信頼度電極が得られる。
According to the present invention, in order to solve the above-mentioned problems, a p-type crystal layer is further interposed between a p-side metal electrode and a nitride crystal, whereby a p-side metal electrode is formed. It is intended to have a structure that does not directly contact the penetrating lattice defect and to prevent rapid diffusion of metal elements. In addition, the presence of this intervening layer can delay the time required for the metal element diffused by another mechanism to reach the nitride layer. Further, by making this layer a semiconductor having a narrow bandgap, energy in the valence band can be reduced. Since the continuous amount is reduced and a high hole concentration is obtained, a highly reliable electrode having low contact resistance can be obtained.

【0007】従って、本発明ではAl,Ga,In等のIII族元
素とN,P,As等のV族元素から構成されるIII−V族化
合物半導体のうち、構成元素として少なくともN(窒
素)を含む半導体材料(上述及び後述の窒化物半導体を
指す)で形成された半導体装置において、窒化物半導体
からなる結晶(所謂窒化物結晶)領域上にp型のIV族半
導体及びp型のIV-IV族半導体の少なくとも一から成る層
(又は積層構造)を形成する。窒化物半導体の結晶領域
とは、半導体装置の仕様(例えば、電子デバイスか光デ
バイスかの違い)により異なる単層又は複数層の窒化物
結晶層のいずれの形成態様をも含めるものであり、その
一例として当該窒化物半導体の結晶領域を結晶基板(材
料を特に限定しない)上に形成してもよい。また、上述
のp型半導体層又はその積層構造は、いずれの態様にお
いても主たる構成元素がIV族元素であるため、以下IV族
半導体領域と総称する。
Therefore, in the present invention, at least N (nitrogen) is used as a constituent element in a group III-V compound semiconductor composed of a group III element such as Al, Ga and In and a group V element such as N, P and As. In a semiconductor device formed of a semiconductor material containing (a nitride semiconductor described above and below), a p-type group IV semiconductor and a p-type IV- A layer (or a laminated structure) made of at least one group IV semiconductor is formed. The crystal region of the nitride semiconductor includes any single-layer or multiple-layer nitride crystal layer formation modes that differ depending on the specifications of the semiconductor device (for example, whether the device is an electronic device or an optical device). As an example, the crystal region of the nitride semiconductor may be formed on a crystal substrate (material is not particularly limited). In any of the above-described p-type semiconductor layers or the stacked structure thereof, the main constituent element is a group IV element, and thus is hereinafter generally referred to as a group IV semiconductor region.

【0008】即ち、本発明の半導体装置は窒化物半導体
からなる結晶領域上にp型のIV族半導体領域を形成し、
更に当該IV族半導体領域上に金属電極を形成し、IV族半
導体領域とのオーミック・コンタクトを取って完成する
というp型窒化物半導体装置用電極のコンタクト構造に
特徴を有する。このように窒化物半導体領域とp型電極
との間にIV族半導体領域を形成する根拠は、第1にIV族
半導体における不純物の拡散が窒化物半導体より遅いこ
とにある。従って、本発明による半導体装置では、p型
電極を構成する材料(例えば、Au,Ti,Ni,W等)の窒化
物半導体領域(素子部)への拡散がIV族半導体領域で抑
制されるため、当該窒化物半導体領域において電子デバ
イスのスイッチングに係るキャリア移動が生じるチャネ
ル層、又は光デバイスの発光現象に係るキャリア再結合
が生じる発光層(活性層)を規定する接合の機能を電極
構成材料の流入で損なうことが回避できる。例えば、上
述の発光ダイオードにおけるpn接合の短絡も本発明に
より解消されるのである。
That is, the semiconductor device of the present invention forms a p-type group IV semiconductor region on a crystal region made of a nitride semiconductor,
Further, the present invention is characterized in that a metal electrode is formed on the group IV semiconductor region, and an ohmic contact with the group IV semiconductor region is established to complete the structure. The basis for forming the group IV semiconductor region between the nitride semiconductor region and the p-type electrode as described above is that the diffusion of impurities in the group IV semiconductor is slower than that of the nitride semiconductor. Therefore, in the semiconductor device according to the present invention, the diffusion of the material (for example, Au, Ti, Ni, W, etc.) constituting the p-type electrode into the nitride semiconductor region (element portion) is suppressed by the group IV semiconductor region. In the nitride semiconductor region, the function of a junction that defines a channel layer in which carrier movement related to switching of an electronic device occurs or a light emitting layer (active layer) in which carrier recombination related to a light emission phenomenon of an optical device occurs is determined by the function of an electrode constituent material. Damage due to inflow can be avoided. For example, the short circuit of the pn junction in the light emitting diode described above is also eliminated by the present invention.

【0009】さらに上述の効果に加えて、IV族半導体領
域は窒化物半導体より高い濃度のp型不純物のドープが
可能であるため、高濃度で導入されたp型不純物により
多量のキャリアを発生させ、p型電極と窒化物半導体領
域の電気抵抗を低減する効果をも実現することができ
る。IV族半導体領域を構成する元素としては、例えば、
Si(シリコン),SiC(炭化珪素)を用いる。
Further, in addition to the above effects, the group IV semiconductor region can be doped with a higher concentration of p-type impurities than the nitride semiconductor, so that a large amount of carriers are generated by the p-type impurities introduced at a high concentration. Also, the effect of reducing the electric resistance between the p-type electrode and the nitride semiconductor region can be realized. As an element constituting the group IV semiconductor region, for example,
Si (silicon) and SiC (silicon carbide) are used.

【0010】IV族半導体領域をIV-IV族半導体(ランダ
ムアロイとも呼ばれる)たるSiCで構成する場合、窒化
物半導体領域との界面におけるバンド不連続の低減によ
る界面におけるキャリアの移動、即ち電流を容易に流せ
る効果を実現できる。即ち、SiCのSiとC(炭素)の比
率を調整することで、IV族半導体領域の禁制帯幅を窒化
物半導体に近い値に設定できるためである。従って、上
述のIV族半導体領域に導入する不純物濃度をある程度抑
えても、p型電極と窒化物半導体領域の電気抵抗を低減
する効果を実現することができる。この効果を得るに当
たり、IV族半導体領域をSi層とSiC層とを組み合わせた
積層構造とし、又は窒化物半導体領域上にSiC層及びSi
層をこの順で形成して当該Si層上にp型電極を設けても
よい。
When the group IV semiconductor region is made of SiC, which is a group IV-IV semiconductor (also called random alloy), carrier movement at the interface due to reduction of band discontinuity at the interface with the nitride semiconductor region, that is, current can be easily reduced. The effect that can be flowed to the can be realized. That is, by adjusting the ratio of Si to C (carbon) in SiC, the bandgap of the group IV semiconductor region can be set to a value close to that of the nitride semiconductor. Therefore, the effect of reducing the electric resistance between the p-type electrode and the nitride semiconductor region can be realized even if the impurity concentration introduced into the group IV semiconductor region is suppressed to some extent. In order to obtain this effect, the group IV semiconductor region has a laminated structure in which a Si layer and a SiC layer are combined, or a SiC layer and a SiC layer are formed on a nitride semiconductor region.
The layers may be formed in this order, and a p-type electrode may be provided on the Si layer.

【0011】上記IV族半導体領域の態様は、特に限定さ
れるものでないが、この領域に導入されたp型不純物が
活性化するように少なくとも一部分に結晶構造(規則的
な原子配列)を有することが望ましい。例えば、多結晶
やこれと非晶質の部分が混在するものでもよい。注意す
べきは、IV族半導体領域を形成するときの温度上昇が下
地となる窒化物半導体領域の構成元素を脱離させないよ
うに設定することである。その目安の一例として、IV族
半導体領域形成温度を1000℃以下に設定するとよ
い。
The mode of the above-mentioned group IV semiconductor region is not particularly limited, but at least a part has a crystal structure (a regular atomic arrangement) so that the p-type impurity introduced into this region is activated. Is desirable. For example, polycrystal or a mixture of polycrystal and amorphous portion may be used. It should be noted that the temperature should be set so as not to desorb constituent elements of the underlying nitride semiconductor region when the group IV semiconductor region is formed. As an example of the standard, the group IV semiconductor region formation temperature may be set to 1000 ° C. or lower.

【0012】上記IV族半導体領域に導入される、即ち半
導体装置の完成時に当該IV族半導体領域に含まれるp型
不純物(アクセプタ)としては、例えばB(硼素),Al
(アルミニウム),Ga(ガリウム)などのIII族元素を利
用するとよい。
The p-type impurities (acceptors) introduced into the group IV semiconductor region, ie, contained in the group IV semiconductor region when the semiconductor device is completed, include, for example, B (boron), Al
Group III elements such as (aluminum) and Ga (gallium) are preferably used.

【0013】[0013]

【発明の実施の形態】以上に説明した本発明に特徴付け
られるp型介在層(コンタクト層やキャップ層と称され
ることもある)を備えた半導体装置の望ましい実施の一
態様を、下記の実施例及び図2を参照して具体的に説明
する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS One preferred embodiment of a semiconductor device having a p-type intervening layer (sometimes called a contact layer or a cap layer) characterized by the present invention described above will be described below. A specific description will be given with reference to the embodiment and FIG.

【0014】上述の窒化物半導体からなる半導体装置に
好適なp型介在層の具体的な例としては、p型ポリシリ
コン(poly Si)、p型多結晶炭化珪素(poly SiC)、ま
たはこれらの組み合わせを用いるとよい。実施例では、
p型多結晶シリコン(p型poly Si)とp型多結晶炭化珪
素(p型poly SiC)とを組み合わせた介在結晶層を採用
した一例で説明するが、以上の説明の範囲を逸脱しない
限りにおいては介在結晶層の態様は限定されないものと
する。
Specific examples of the p-type intervening layer suitable for the semiconductor device made of the above-described nitride semiconductor include p-type polysilicon (poly Si), p-type polycrystalline silicon carbide (poly SiC), and p-type polycrystalline silicon carbide (poly SiC). It is good to use a combination. In the example,
An example in which an intervening crystal layer in which p-type polycrystalline silicon (p-type poly Si) and p-type polycrystalline silicon carbide (p-type poly SiC) are combined will be described. The mode of the intervening crystal layer is not limited.

【0015】<実施例>標準的な有機金属気相成長法に
よりサファイア基板結晶31の上にシリコンをドープした
n型GaN層30を4μm、アンドープGaInNバッファ層29を50
Å、アンドープGaInN発光層28を25Å、アンドープGaInN
バッファ層27を50Å、マグネシウムをドープしたp型Al
GaN層26を200Å、同じくマグネシウムをドープしたp型
GaN層25を0.5μm成長する。続いてプロパン、モノシラ
ン、ジボランの混合ガスを流してp型poly SiC層24を0.1
μm被着し、この時点でプロパンガスを止めてp型のpo
ly Si層23を4μm成長する。このようにして得られたウ
エハをp側からドライエッチングでn型窒化物層が現れ
るまでメサエッチングする。p型メサの表面にTi/W/Al
金属電極22を形成し、ドライエッチングで露出させたn
型窒化物層にTi/Al金属電極21を形成する。それぞれの
ボンデイングパッドにリード線をボンデイングして発光
ダイオードが完成する。
<Example> Silicon was doped on a sapphire substrate crystal 31 by a standard metal organic chemical vapor deposition method.
4 μm n-type GaN layer 30 and 50 undoped GaInN buffer layer 29
Å, 25Å undoped GaInN light-emitting layer 28, undoped GaInN
Buffer layer 27 of 50 °, p-type Al doped with magnesium
GaN layer 26 is 200mm, also p-type doped with magnesium
The GaN layer 25 is grown by 0.5 μm. Subsequently, a mixed gas of propane, monosilane, and diborane is flowed to form the p-type poly SiC layer 24 by 0.1.
μm, propane gas was stopped at this point, and p-type po
The ly Si layer 23 is grown to 4 μm. The wafer thus obtained is subjected to mesa etching from the p side by dry etching until an n-type nitride layer appears. Ti / W / Al on the surface of p-type mesa
Formed metal electrode 22 and exposed by dry etching n
A Ti / Al metal electrode 21 is formed on the type nitride layer. A lead wire is bonded to each bonding pad to complete a light emitting diode.

【0016】この発光ダイオードを電流密度0.1kA/cm-2
で駆動したときの発光出力の低下率は0.001%/hrであ
った。
The light emitting diode is supplied with a current density of 0.1 kA / cm -2
The rate of decrease in the light emission output when driven at was 0.001% / hr.

【0017】他方、poly SiC及びpoly Si層をつけない
従来型の発光ダイオードの出力低下率は0.1%/hrであ
り、明らかに介在層の効果が認められた。
On the other hand, the output reduction rate of the conventional light emitting diode having no poly SiC or poly Si layer was 0.1% / hr, and the effect of the intervening layer was clearly recognized.

【0018】[0018]

【発明の効果】上記の実施例で判るように、p側金属電
極と窒化物結晶のあいだにp型のIV族ならびにIV-IV族半
導体の層を挿入することにより、素子の信頼性を大幅に
改善することができる。 これは電極金属が直接に窒化
物結晶に接触しないために、窒化物結晶中の貫通格子欠
陥を通じた電極金属の早い拡散が生じないことが主な原
因と考えられる。さらにはSiC, Siの順に禁制帯幅が小
さくなるので価電子帯の不連続が緩和される効果と、こ
れらの結晶が窒化物よりも遥かにp型化しやすく金属電
極との接触抵抗が低くなった効果が加わっているものと
解せられる。
As can be seen from the above embodiment, the reliability of the device is greatly improved by inserting a p-type group IV or IV-IV semiconductor layer between the p-side metal electrode and the nitride crystal. Can be improved. This is considered to be mainly because the electrode metal does not directly contact the nitride crystal, so that rapid diffusion of the electrode metal through a penetrating lattice defect in the nitride crystal does not occur. Furthermore, the band gap becomes smaller in the order of SiC and Si, so that the discontinuity of the valence band is reduced. It can be understood that the effect has been added.

【図面の簡単な説明】[Brief description of the drawings]

【図1】現用(従来技術)の窒化物結晶をもちいた発光
ダイオードの断面図である。
FIG. 1 is a cross-sectional view of a light-emitting diode using a nitride crystal of a current (prior art).

【図2】本発明になる窒化物結晶をもちいた発光ダイオ
ードの断面図である。
FIG. 2 is a cross-sectional view of a light emitting diode using a nitride crystal according to the present invention.

【符号の説明】[Explanation of symbols]

11…p側金属電極、12…p型窒化物結晶層、13…発光
層、14…n型窒化物結晶層、15…n側金属電極、16…サ
ファイア基板結晶、21…n側金属電極、22…p側金属電
極、23…p型 poly Si層、24…p型 poly SiC層、25…
p型GaN層、26…p型AlGaN層、27…GaInNバッファ層、2
8…GaInN発光層、29…GaInNバッファ層、30…n型GaN
層、31…サファイア基板結晶。
11 ... p-side metal electrode, 12 ... p-type nitride crystal layer, 13 ... light-emitting layer, 14 ... n-type nitride crystal layer, 15 ... n-side metal electrode, 16 ... sapphire substrate crystal, 21 ... n-side metal electrode, 22 ... p-side metal electrode, 23 ... p-type poly Si layer, 24 ... p-type poly SiC layer, 25 ...
p-type GaN layer, 26 ... p-type AlGaN layer, 27 ... GaInN buffer layer, 2
8 ... GaInN light emitting layer, 29 ... GaInN buffer layer, 30 ... n-type GaN
Layer, 31 ... Sapphire substrate crystal.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 赤松 正一 東京都国分寺市東恋ケ窪一丁目280番地 株式会社日立製作所中央研究所内 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Shoichi Akamatsu 1-280 Higashi Koigakubo, Kokubunji-shi, Tokyo Inside Central Research Laboratory, Hitachi, Ltd.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】窒化物半導体からなる結晶領域と、該結晶
領域上に形成されたp型のIV族半導体領域と、該IV族半
導体領域上に形成された金属電極とを含めて構成される
ことを特徴とする半導体装置。
1. A semiconductor device comprising: a crystal region made of a nitride semiconductor; a p-type group IV semiconductor region formed on the crystal region; and a metal electrode formed on the group IV semiconductor region. A semiconductor device characterized by the above-mentioned.
【請求項2】上記IV族半導体領域は、IV族半導体層及び
IV-IV族半導体層の少なくとも一を含むことを特徴とす
る請求項1記載の半導体装置。
2. The group IV semiconductor region includes a group IV semiconductor layer and
2. The semiconductor device according to claim 1, comprising at least one of a group IV-IV semiconductor layer.
【請求項3】上記IV族半導体層は、シリコンからなるこ
とを特徴とする請求項2記載の半導体装置。
3. The semiconductor device according to claim 2, wherein said group IV semiconductor layer is made of silicon.
【請求項4】上記IV-IV族半導体層は、炭化珪素からな
ることを特徴とする請求項2記載の半導体装置。
4. The semiconductor device according to claim 2, wherein said IV-IV group semiconductor layer is made of silicon carbide.
【請求項5】上記IV族半導体領域は、B、Al、及びGaか
ら選ばれる少なくとも一の元素を不純物として含むこと
を特徴とする請求項1乃至4のいずれかに記載の半導体
装置。
5. The semiconductor device according to claim 1, wherein the group IV semiconductor region contains at least one element selected from B, Al, and Ga as an impurity.
JP6591497A 1997-03-19 1997-03-19 Semiconductor device Pending JPH10261815A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6591497A JPH10261815A (en) 1997-03-19 1997-03-19 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6591497A JPH10261815A (en) 1997-03-19 1997-03-19 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH10261815A true JPH10261815A (en) 1998-09-29

Family

ID=13300725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6591497A Pending JPH10261815A (en) 1997-03-19 1997-03-19 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH10261815A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000277863A (en) * 1999-03-24 2000-10-06 Sanyo Electric Co Ltd Semiconductor light emitting element and manufacturing method therefor
US7238970B2 (en) 2003-10-30 2007-07-03 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
CN105261668A (en) * 2015-11-23 2016-01-20 南京大学 Heterojunction multiplication layer reinforced type AlGaN solar-blind avalanche photodiode and preparation method therefor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000277863A (en) * 1999-03-24 2000-10-06 Sanyo Electric Co Ltd Semiconductor light emitting element and manufacturing method therefor
US7238970B2 (en) 2003-10-30 2007-07-03 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
CN105261668A (en) * 2015-11-23 2016-01-20 南京大学 Heterojunction multiplication layer reinforced type AlGaN solar-blind avalanche photodiode and preparation method therefor

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