KR200198415Y1 - Semiconductor indexing device - Google Patents

Semiconductor indexing device Download PDF

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KR200198415Y1
KR200198415Y1 KR2019940036185U KR19940036185U KR200198415Y1 KR 200198415 Y1 KR200198415 Y1 KR 200198415Y1 KR 2019940036185 U KR2019940036185 U KR 2019940036185U KR 19940036185 U KR19940036185 U KR 19940036185U KR 200198415 Y1 KR200198415 Y1 KR 200198415Y1
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wafer
unit
index
light
semiconductor
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KR2019940036185U
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KR960025395U (en
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전한수
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김영환
현대반도체주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67763—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading
    • H01L21/67766—Mechanical parts of transfer devices

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Robotics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

본 고안은 반도체 인덱스장치에 관한 것으로, 종래의 장치는 웨이퍼 유/무감지를 위한 신호처리가 단일신호로 매핑을 하고 있기 때문에, 즉 발광부와 수광부를 통한 검출신호가 1개밖에 없기 때문에 웨이퍼가 인덱서의 캐리어내 슬롯에 정상적으로 로딩되어 있는 것과 슬롯이 엇갈리게 로딩되어 있는 것은 구별이 불가능하여, 단순히 스루빔이 차단되면 정상적인 것으로 인식하여 웨이퍼를 로딩하게 함으로써 웨이퍼의 파괴 및 웨이퍼 로드암이 마모되는 문제점이 있었다. 본 고안은 이러한 종래의 문제점을 해결하기 위해 웨이퍼유/무검출부를 한개 더 추가로 설치하여 웨이퍼 감지용 스루빔이 인덱스부내의 웨이퍼 로딩위치의 동일수평상에서 소정의 간격을 두고 두개로 통과하여 두 신호가 다 수광되지 못만 경우에만 웨이퍼가 있다라고 판단하게 함으로써 웨이퍼의 유/무를 정확하게 검출할 수 있는 반도체 인덱스장치를 안출한 것이다.The present invention relates to a semiconductor indexing apparatus. In the conventional apparatus, since the signal processing for wafer presence / non-sensing is mapped to a single signal, that is, since there is only one detection signal through the light emitting unit and the light receiving unit, the wafer is an indexer. It is indistinguishable from the normal loading of the slots in the carrier and the loading of the slots alternately. If the through beam is blocked, the wafer is recognized as normal and the wafer is loaded so that the wafer is broken and the wafer load arm is worn. . In order to solve this problem, the present invention provides an additional wafer presence / non-detection unit so that the wafer detection through beam passes through the two signals at a predetermined interval on the same level of the wafer loading position in the index unit. In this case, a semiconductor indexing device capable of accurately detecting the presence / absence of a wafer can be devised by judging that there is a wafer only when it cannot be received.

Description

반도체 인덱스장치Semiconductor Index Device

제1도는 종래 반도체 인덱스장치의 블럭도.1 is a block diagram of a conventional semiconductor indexing device.

제2도는 본 고안 반도체 인덱스장치의 블럭도.2 is a block diagram of a semiconductor index device of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

100 : 인덱스부 200 : 제 1 웨이퍼유/무검출부100: index portion 200: first wafer presence / no detection portion

300 : 제 2 웨이퍼유/무검출부 400 : 지피아이오제어부300: second wafer presence / non-detection unit 400: gpia Io controller

201 : 제 1 발광부 202 : 제 1 수광부201: first light emitting unit 202: first light receiving unit

301 : 제 2 발광부 302 : 제 2 수광부301: second light emitting unit 302: second light receiving unit

AND1 : 앤드게이트AND1: ANDGATE

본 고안은 반도체 장치에 관한 것으로, 특히 SURFSCAN-6200장치에 있어서, 캐리어내 웨이퍼 유/무를 감지하기 위한 웨이퍼유/무검출부를 하나더 추가로 장착하여 웨이퍼가 슬롯에 정상적으로 장착되었는지를 정확하게 감지할 수 있는 반도체 인덱스장치에 관한 것이다.The present invention relates to a semiconductor device. In particular, in the SURFSCAN-6200 device, an additional wafer presence / non-detection unit for detecting the presence / absence of wafers in a carrier can be installed to accurately detect whether a wafer is normally mounted in a slot. The present invention relates to a semiconductor indexing device.

제1도는 종래 반도체 인덱스장치의 블록도로서, 이에 도시된 바와 같이 웨이퍼 로딩/언로딩을 위한 인덱스부(10)와, 발광부(21)와 수광부(22)로 이루어져 제어신호에 따라 상기 인덱스부(10)의 웨이퍼 로딩위치에 빛을 발사하여 그 빛의 수광여부에 따라 웨이퍼의 유무를 검출하는 웨이퍼유/무검출부(20)와, 상기 웨이퍼유/무검출부(20)의 출력신호에 따라 상기 인덱스부(10)에 웨이퍼가 로딩되어 있는지의 여부를 감지하여 그에 따라 상기 인덱스부(10)를 제어하는 지피아이오제어부(30)로 구성된다.FIG. 1 is a block diagram of a conventional semiconductor indexing device. As shown in FIG. 1, the indexing unit 10 includes an index unit 10 for wafer loading / unloading, a light emitting unit 21, and a light receiving unit 22. The wafer presence / non-detection unit 20 which emits light to the wafer loading position of (10) and detects the presence or absence of the wafer according to whether the light is received or not, and according to the output signal of the wafer presence / non-detection unit 20 The index unit 10 is configured to detect whether a wafer is loaded or not and control the index unit 10 accordingly.

이와같이 구성된 종래 장치의 작용에 관하여 설명하면 다음과 같다.Referring to the operation of the conventional device configured as described above is as follows.

반도체의 이물질 검출을 위해서 사용되는 SURFSCAN-6200장치에 있어서, 캐리어내에 웨이퍼가 있는지를 판단하기 위한 신호처리는 단일 신호로 매핑을 하고 있다.In the SURFSCAN-6200 device used for detecting foreign matter in a semiconductor, signal processing for determining whether a wafer is present in a carrier is mapped to a single signal.

예를들어 인덱스부(10)의 캐리어에 웨이퍼를 장착하고 캐리어를 인덱스부(10)에 셋팅 후 카셋트를 선택해 주면 엘리베이터가 하강한다.For example, when the wafer is mounted on the carrier of the index unit 10, the carrier is set on the index unit 10, and the cassette is selected, the elevator descends.

이때, 캐리어내에 웨이퍼가 있는지를 검출하기 위해 지피아이오제어부(30)는 웨이퍼유/무검출부(20)의 발광부(21)에 제어신호를 출력한다.At this time, in order to detect whether there is a wafer in the carrier, the GYPIO controller 30 outputs a control signal to the light emitting unit 21 of the wafer presence / absence detection unit 20.

상기 제어신호를 입력받은 발광부(21)는 웨이퍼 유/무감지용 스루빔(Through Beam)을 인덱스부(10)의 웨이퍼 로딩위치에 발사하고, 이에따라 상기 인덱스부(10)의 웨이퍼로딩위치에 웨이퍼가 있는 경우에는 그 웨이퍼에 의해 상기 스루빔이 차단되어 수광부(22)에 입사되지 않고, 웨이퍼가 없는 경우에는 그 스루빔이 상기 수광부(22)에 입사되며, 그 수광부(22)에서는 그 빛의 수광여부에 따른 신호를 지피아이오제어부(30)에 전달한다.The light emitting unit 21 receiving the control signal launches a wafer through / non-sensing through beam at the wafer loading position of the index unit 10, and accordingly the wafer is placed at the wafer loading position of the index unit 10. If there is, the through beam is blocked by the wafer and is not incident on the light receiving portion 22. If there is no wafer, the through beam is incident on the light receiving portion 22, and the light receiving portion 22 of the light Transmits the signal according to whether or not the reception of the PIA control unit 30.

따라서, 지피아이오제어부(30)는 수광부(22)에서 스루빔을 수광하지 못한데 따른 신호가 입력될 때 케리어내에 웨이퍼가 없다라고 판단하고, 수광부(22)에서 스루빔을 수광한데 따른 신호가 입력될 때 캐리어내에 웨이퍼가 있다라고 판단하여 그에따른 인덱스 제어신호를 출력한다.Accordingly, when the signal for receiving the through beam from the light receiving unit 22 is input, the GYPIO controller 30 determines that there is no wafer in the carrier, and the signal for receiving the through beam from the light receiving unit 22 may be input. When it is determined that there is a wafer in the carrier, an index control signal is output accordingly.

이때 웨이퍼를 잘못장착하여 캐리어내의 슬롯에 엇갈리게 장착하여도 발광부(21)에서 발사된 웨이퍼유/무를 감지하기 위한 스루빔은 그 웨이퍼에 의해 차단되기 때문에 수광부(22)에서는 빛을 수광하지 못해 지피아이오제어부(30)는 웨이퍼가 있는 것을 판단하여 그에따른 인덱스 제어를 한다.At this time, even though the wafer is incorrectly mounted and staggered in the slots in the carrier, the through beam for detecting the presence / absence of the wafer emitted from the light emitting unit 21 is blocked by the wafer, so the light receiving unit 22 cannot receive light. The ion controller 30 determines that there is a wafer and performs index control accordingly.

이와같이 종래의 장치는 웨이퍼유/무감지를 위한 신호처리가 단일신호로 매핑을 하고 있기 때문에, 즉 발광부와 수광부를 통한 검출신호가 1개밖에 없기 때문에 웨이퍼가 인덱스부의 캐리어내 슬롯에 정상적으로 로딩되어 있는 것과 슬롯이 엇갈리게 로딩되어 있는 것은 구별이 불가능하여, 단순히 스루빔이 차단되면 정상적인 것으로 인식하여 웨이퍼를 로딩하게 함으로써 웨이퍼의 파괴 및 웨이퍼 로드암이 마모되는 문제점이 있었다.Thus, in the conventional apparatus, since the signal processing for wafer presence / nonsensitization is mapped to a single signal, that is, there is only one detection signal through the light emitting portion and the light receiving portion, the wafer is normally loaded in the slot in the carrier of the index portion. It is not possible to distinguish between the slot and the staggered loading, it is recognized that the through beam is blocked simply to recognize the normal to load the wafer has a problem that the wafer breakage and wear of the wafer load arm.

본 고안은 이러한 종래의 문제점을 해결하기 위해, 웨이퍼유/무검출부를 한개 더 추가로 설치하여 웨이퍼감지용 스루빔이 인덱스부의 웨이퍼 로딩위치의 동일 수평상에서 소정의 간격을 두고 두 개로 통과하여 두 신호가 다 수광되지 못한 경우에만 웨이퍼가 있다라고 판단하게 함으로써 웨이퍼의 유/무를 정확하게 검출할 수 있는 반도체 인덱스장치를 안출한 것이다.In order to solve this problem, the present invention provides an additional wafer presence / non-detection unit so that the wafer detection through beam passes through two at predetermined intervals on the same horizontal plane of the wafer loading position of the index unit. By determining that there is a wafer only when no light is received, a semiconductor indexing device capable of accurately detecting the presence or absence of a wafer is devised.

제2도는 본 고안 반도체 인덱스장치의 블럭도로서, 이에 도시한 바와같이 웨이퍼의 로딩/언로딩을 위한 인덱스부(100)와, 제 1 발광부(201)와 제 1수광부(202)로 이루어져 제어신호에 따라 상기 인덱스부(100)의 웨이퍼로딩위치 일측에 빛을 발사하여 그 빛의 수광여부에 따라 웨이퍼의 유무를 검출하는 제 1 웨이퍼유/무검출부(200)와, 제 2 발광부(301)와 제 2수광부(302)로 이루어져 제어신호에 따라 상기 인덱스부(100)의 웨이퍼 로딩위치의 일측과 소정간격을 둔 타측에 빛을 발사하여 그 빛의 수광여부에 따라 웨이퍼의 유무를 검출하는 제 2웨이퍼유/무검출부(300)와, 상기 제 1웨이퍼유/무검출부(200)와 제 2웨이퍼유/무검출부(300)의 출력을 앤드조합하여 출력하는 앤드게이트(AND1)와, 상기 앤드게이트(AND1)의 출력신호를 입력받아 상기 인덱스부(100)내에 웨이퍼의 유/무를 감지하여 그에따른 인덱스제어를 하는 지피아이오제어부(400)로 구성한다.FIG. 2 is a block diagram of a semiconductor index device of the present invention. As shown therein, an index part 100 for loading / unloading a wafer, and a first light emitting part 201 and a first light receiving part 202 are controlled. The first wafer presence / non-detection unit 200 and the second light emitting unit 301 which emit light to one side of the wafer loading position of the index unit 100 according to a signal and detect the presence or absence of the wafer according to whether the light is received. ) And the second light receiving unit 302 to emit light to one side of the wafer loading position of the index unit 100 and the other side at a predetermined interval according to a control signal to detect the presence or absence of the wafer according to whether the light is received or not. An AND gate AND1 for outputting a combination of the outputs of the second wafer oil / no detector 300, the first wafer oil / no detector 200, and the second wafer oil / no detector 300, and The output signal of the AND gate AND1 is input to the wafer in the index unit 100. The presence or absence of the index control according to the control is configured by the GIA IO control unit 400.

이와같이 구성한 본 고안의 작용 및 효과에 관하여 상세히 설명하면 다음과 같다.When described in detail with respect to the operation and effects of the present invention configured as described above.

웨이퍼를 인덱스부(100)의 캐리어내 슬롯에 장착하고 그 캐리어를 인덱스부(100)에 셋팅한 후, 카셋트를 선택해 주면 인덱스부(100)내의 엘리베이터가 하강을 한다.After the wafer is mounted in the slot in the carrier of the index unit 100 and the carrier is set in the index unit 100, the cassette is selected and the elevator in the index unit 100 descends.

이때, 지피아이오제어부(400)는 캐리어내 슬롯에 웨이퍼가 장착되었는지, 즉 웨이퍼의 유/무를 검출하기 위해 제 1및 제 2발광부(201,301)에 제어신호를 출력한다.At this time, the GYPIO controller 400 outputs a control signal to the first and second light emitting units 201 and 301 to detect whether the wafer is mounted in the slot in the carrier, that is, whether or not the wafer is present.

상기 제어신호를 입력받은 제 1및 제 2발광부(201,301)는 웨이퍼유/무검출을 위한 스루빔을 발사한다.The first and second light emitting units 201 and 301 receiving the control signal emit through-beams for wafer presence / no detection.

상기 제 1및 제 2발광부(201,301)에서 발사된 빛은 인덱스부(100)의 웨이퍼 로딩위치의 동일수평면상에서 소정간격을 두고 일측과 타측을 각기 통해 제 1및 제 2수광부(202,302)에 수광되는데, 웨이퍼가 없으면 수광이 되고, 웨이퍼가 있으면 그 웨이퍼에 의해 스루빔이 차단되어 수광이 안된다.The light emitted from the first and second light emitting parts 201 and 301 is received by the first and second light receiving parts 202 and 302 through one side and the other side at predetermined intervals on the same horizontal plane of the wafer loading position of the index part 100. If there is no wafer, light is received. If there is a wafer, the through beam is blocked by the wafer, and the light is not received.

이때, 상기 각 발광부(201,301)와 각 수광부(202,302)는 웨이퍼 로딩위치의 동일 수평상에서 소정간격을 두고 위치하기 때문에 웨이퍼가 수평하게 정상적으로 장착되었을 때만 양측 수광부(301,302)에서 빛을 수광하지 못하도록 되고, 만약, 웨이퍼가 슬롯에 엇갈리게 장착되거나 하면 상기 수광부(200),(302)중 어느한쪽에서는 빛을 수광하게 된다.At this time, since the light emitting parts 201 and 301 and the light receiving parts 202 and 302 are positioned at the same level on the same horizontal position of the wafer loading position, the light receiving parts 301 and 302 cannot receive light only when the wafer is normally mounted horizontally. If the wafers are alternately mounted in the slots, either of the light receiving parts 200 and 302 receives light.

상기 제 1 및 제 2 수광부(202,302)의 출력신호는 앤드게이트(AND1)에 의해 앤드조합되어 지피아이오제어부(400)에 입력된다.The output signals of the first and second light receiving units 202 and 302 are input-and-combined by the AND gate AND1 and input to the GYPIO controller 400.

상기 앤드게이트(AND1)의 출력신호를 입력받은 지피아이오제어부(400)는 어느 한쪽의 수광부라도 빛을 수광하면 이상이 있는것으로 판단하여 기기의 동작을 정지 시키는 등 앤드게이트(AND1)의 출력에 따라 웨이퍼의 유/무를 검출하여 그에따라 인덱스부(100)를 제어한다.Upon receiving the output signal of the AND gate AND1, the GIAIO controller 400 determines that there is an error when any one of the light receiving units receives light, and stops the operation of the device. The presence / absence of the wafer is detected and the index unit 100 is controlled accordingly.

이상에서 상세히 설명한 바와같이 본 고안은 웨이퍼유/무검출부를 로딩위치의 동일 수평상에서 소정간격을 두고 좌,우에 설치하고 그 두 신호를 앤드조합하여 웨이퍼 유/무검출신호로 출력하게 함으로써 웨이퍼가 슬롯의 좌우어느 한 쪽이라도 엇갈리게 장착되면 이를 감지할 수 있어 웨이퍼의 유/무 및 장착상태를 정확히 감지할 수 있는 효과가 있다.As described in detail above, the present invention installs the wafer presence / absence detection unit at the same horizontal position of the loading position at the left and right sides, and outputs the wafer presence / absence detection signal by combining the two signals by the wafer combination. Either side of the left and right side of the staggered mounting can detect this has the effect of accurately detecting the presence or absence of the wafer and the mounting state.

Claims (1)

웨이퍼의 로딩/언로딩을 위한 인덱스부와, 제어신호에 따라 상기 인덱스부의 웨이퍼 로딩위치의 동일 수평상에서 소정간격을 두고 일측 및 타측에 빛을 발사하여 그 빛의 수광여부에 따라 웨이퍼의 유무를 검출하는 제 1 및 제 2웨이퍼유/무검출부와, 상기 제 1 및 제 2 웨이퍼유/무검출부의 출력을 앤드조합하여 출력하는 앤드게이트와, 상기 앤드게이트의 출력신호를 입력받아 상기 인덱스로부에 웨이퍼의 유/무를 감지하여 그에따른 인덱스제어를 하는 지피아이오제어부로 구성하여 된 것을 특징으로 하는 반도체 인덱스장치.An index unit for loading / unloading wafers and light is emitted to one side and the other side at predetermined intervals on the same horizontal plane of the wafer loading position of the index unit according to a control signal to detect the presence or absence of the wafer according to whether the light is received or not. An AND gate for combining and outputting the first and second wafer oil / non-detection units, an output of the first and second wafer oil / non-detectors, and an output signal of the AND gate to the index path unit. A semiconductor indexing device, comprising a Gipio controller that detects the presence or absence of a wafer and performs index control accordingly.
KR2019940036185U 1994-12-27 1994-12-27 Semiconductor indexing device KR200198415Y1 (en)

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