KR960001467Y1 - Disk search circuit of wafer transfer system - Google Patents

Abstract

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Description

Disc Detection Circuit of Automatic Wafer Transfer System

1 is a cross-sectional view of an automatic wafer transfer system

Second Turning Disk Pad Detection Assembly Sectional View

3 is a circuit diagram of a conventional pad sensor sensing unit

4 is a circuit diagram of a pad sensor sensing unit according to the present invention

* Code designations for the main parts of the drawings

l: Main plate 2: Input cassette plate

3: flagline 4: input air track

5: input feeder 6: disc

7: wafer clamp 8: output air track

9: output conveyor 10: output cassette plate

11: disc pad optical sensor unit 12: input signal amplification unit

13: OR gate logic section 14: time delay logic section

15: optical coupler interface 16: CPU

l7, 18: amplifier 19, 20: diode

21, 24: buffer 22: variable resistor

23: capacitor 25, 26: optical coupler

The present invention relates to a disk detection circuit of an automatic wafer transfer system for more accurately loading a wafer onto a disk and preventing errors caused by undetected positions such as indexer motor busy errors.

In general, 8 wafers are usually loaded onto a disk through an AT-4 system (automatic wafer transfer system) to inject high current ion beams into the wafer during the semiconductor production process. In detail, in the drawing, 1 is the main plate, 2 is the input cassette plate, 3 is the flagliner, 4 is the input air track, 5 is the input conveyor, 6 is the disk, 7 is the wafer clamp, 8 is the output air. 9 denotes an output conveyor and 10 denotes an output cassette plate.

First, an input cassette plate 2 on which a wafer is mounted is placed on the main plate 1 supporting each component so that the wafer can be transferred by an elevator system. Wafer positioned on the rotating disk 6 by a flag aligner 3, an input air track 4, and an input transport 5 that determine the orientation. Placed in the clamp (7) to perform a deposition process on the wafer and the finished wafer is similarly output cassette plate (10) using an output air track (8) and an output transport (9) ) To the wafer.

In order to put or remove the wafer of FIG. 1 onto the wafer clamp 7, the wafer is sucked and moved by a vacuum chuck.

Disk pad sensing of the automatic wafer transfer system detects the position by using a light receiving sensor, and as shown in FIG. 2, the position is adjusted by a height adjuster, an inclination and a rotation adjusting screw, Two lenses are mounted on a support that is fixed by screws, and the disk pad is sensed through the lenses.

And the conventional sensing process by the lens was to follow the processing sequence as follows.

That is, as shown in the circuit shown in FIG. 3, a disk pad optical sensor unit 11 for sensing a disk, an input signal amplifier 12 for amplifying a signal detected by the sensor unit, and a CPU and an external device. The optical coupler interface unit 15 to adjust the different points and the operation timing of the data representation method to correctly send and receive data. The CPU unit 16 controls the motor by detecting the disk pad sensing while configuring the whole system. Is done.

However, as the wafer transfer system is used, pad sensing is not performed accurately due to aging of the equipment and contamination of the back of the disk, and the two light emitting lenses attached to the pad sensor unit during the disk pad sensing have a time of several μs. The disc will not stop until it is detected by both lenses at intervals.

This is because the two light emitting lenses function as the AND gate of the digital circuit and should always be detected in both lenses. However, when the back of the disk is contaminated, one lens is detected, but the other lens has an unstable operation due to diffuse reflection of light, which causes a problem that the disk cannot be located.

The present invention devised to solve the above problems is to provide a disk detection circuit of an automatic wafer transfer system that achieves accurate disk pad sensing to give effective use of equipment and process stability of semiconductor devices.

Therefore, in order to achieve the above object, the present invention, in the disk detection circuit through the parallel gate of the automatic wafer transfer system, the disk rear slot portion and the plate portion (disk bottom grooved portion and grooveless portion) by detecting a constant voltage input A disk pad optical sensor unit for detecting a signal, an input signal amplifier unit for detecting and amplifying a voltage detected by the disk pad optical sensor unit, an OR gate logic unit for detecting a wafer with a voltage amplified by the input signal amplifier unit, and The time delay logic unit makes the CPU operate normally without any error even when detected by one of the two lenses of the OR gate logic unit, and the optical coupler interface unit that exchanges data between the CPU and an external device. As the system is configured, it detects whether the disk And a CPU unit for controlling.

Hereinafter, an embodiment according to the present invention will be described in detail with reference to FIG. 4. In FIG. 12, an input signal amplifying unit, 13 an OR gate logic unit, 14 a time delay logic unit, and 15 an optical coupler The interface unit 16 is a CPU unit, 17 and 18 are amplifiers, 19 and 20 are diodes, 21 and 24 are buffers, 22 are variable resistors, 23 are capacitors 25 and 26 are optocouplers, respectively.

First, the present invention allows the disc to find the loading position when only one of the two lenses is detected. In order to realize this, the following two means have been devised.

That is, a buffer IC is used to clearly distinguish the detected signal while combining the OR gate circuit and the time function of the digital circuit.

As shown in FIG. 4, the disk rear slot portion and the plate portion (the disc bottom groove portion and the groove portion) detect a constant voltage (0 to 0.4 V for the slot and 2.4 to 3 V for the plate) as shown in FIG. A disk pad optical sensor unit 11 for detecting an input signal, an input signal amplifier 12 for detecting and amplifying a voltage detected by the disk pad optical sensor unit 11, and an amplification in the input signal amplifier 12 The OR gate logic unit 13, which detects the wafer at a predetermined voltage but enables disk pad sensing when only one of the two lenses detects the wafer, and one of two lenses of the OR gate logic unit l3. This is a logic that makes the CPU operate normally without error even though it is detected by the lens. The time delay logic unit that matches the waveform and time constant input to the CPU using the oscilloscope (l) 4) The optical cutler interface unit (l5), which adjusts the difference in the data representation method and the operation timing between the CPU and the external device to correctly send and receive data, detects whether the disk pad is sensed while configuring the entire system. It consists of the CPU part 16 which controls a motor.

This will be described in more detail as follows.

The input signal amplifier 11 is composed of two amplifiers 17 and 18.

When only one of the two lenses described above senses a wafer, the OR gate logic unit 13, which enables disk pad sensing, may include first and second diodes connected in reverse bias to the amplifiers 17 and 18. 19, 20, and the first buffer 21 is connected to the two diodes (19, 20) at the same time.

In addition, the time delay logic unit 14 includes a variable resistor 22, a capacitor 23 and a second buffer 24 connected in parallel with the variable resistor 22.

In addition, the optical cutler interface unit 15 is composed of optical cutlers 25 and 26 connected to the first buffer 21 and the second buffer 24, respectively, to be connected to the CPU unit 16. .

The present invention, which is made as described above, can minimize the error in indexing motor versatility error and wafer size determination caused by not finding the disk pad because the disk pad sensing is doubled than the conventional one, and impurities generated from the error occurrence. Particles can be minimized, and thus there is an effect of improving the stability and reliability in the manufacturing process of the semiconductor device.

Claims (5)

In the disk detection circuit of the automatic wafer transfer system, A disk pad optical sensor unit 11 for detecting an input signal of a predetermined voltage by detecting a disk rear plate portion and a plate portion (a groove at the bottom of the disk and a portion without a groove), An input signal amplifier 12 which detects and amplifies the voltage detected by the disk pad optical sensor unit 11, OR gate logic unit 13 to operate the system even if the input signal amplified by the lens of one of the two lenses in the input signal amplifier 12, A time delay logic unit 14 which matches waveforms and time constants of the outputs of the OR gate logic unit 13 to operate normally without an error occurring in the CPU; An optical coupler interface 15 for transmitting and receiving data between the CPU and an external device, And a CPU unit (16) for controlling a motor by detecting a disk pad sensing while configuring a charter system. The disk detection circuit of claim 1, wherein the input signal amplifier (12) comprises two amplifiers (17, 18). 2. The OR gate logic unit (13) according to claim 1, wherein the OR gate logic unit (13) is connected to the first and second diodes (19, 20) and the two diodes (19, 20) connected in reverse directions to the amplifiers (17, 18), respectively. A disk detection circuit of an automatic wafer transfer system, characterized in that it comprises a first buffer (21). The method of claim 1, wherein the time delay logic unit 14 comprises a variable resistor 22, a capacitor 23 and a second buffer 24 connected in parallel with the variable resistor 22. Disk detection circuit of an automatic wafer transfer system. The CPU unit 16 of claim 1, wherein the optical coupler interface unit 15 is composed of optical couplers 25 and 26 connected to the first buffer 21 and the second buffer 24, respectively. Disc detection circuit of an automatic wafer transfer system, characterized in that connected to.