KR20010111769A - Molding die for manufacturing semiconductor package - Google Patents

Molding die for manufacturing semiconductor package Download PDF

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Publication number
KR20010111769A
KR20010111769A KR1020000032434A KR20000032434A KR20010111769A KR 20010111769 A KR20010111769 A KR 20010111769A KR 1020000032434 A KR1020000032434 A KR 1020000032434A KR 20000032434 A KR20000032434 A KR 20000032434A KR 20010111769 A KR20010111769 A KR 20010111769A
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South Korea
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molding die
semiconductor package
manufacturing
clamping
mold
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KR1020000032434A
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Korean (ko)
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KR100540258B1 (en
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홍종철
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마이클 디. 오브라이언
앰코 테크놀로지 코리아 주식회사
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Priority to KR1020000032434A priority Critical patent/KR100540258B1/en
Publication of KR20010111769A publication Critical patent/KR20010111769A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)

Abstract

본 발명은 반도체 패키지의 몰딩공정시 수지가 외부 리드쪽으로 흘러나오는 것을 방지하기 위하여 외부리드를 눌러주는 부분이 개선된 반도체 패키지 제조용 몰딩다이에 관한 것으로서, 특히 댐바를 포함하는 리드프레임의 외부리드를 클램핑하는 몰딩다이의 클램핑 면적을 감소시키면서 그 클램핑 효과는 종래의 큰 클램핑 면적을 갖는 몰딩다이보다 더욱 향상시킬 수 있는 구조의 반도체 패키지 제조용 몰딩 다이를 제공하고자 한 것이다.The present invention relates to a molding die for manufacturing a semiconductor package, in which a part for pressing an outer lead is improved in order to prevent the resin from flowing out to the outer lead during a molding process of the semiconductor package. To reduce the clamping area of the molding die, the clamping effect is to provide a molding die for manufacturing a semiconductor package having a structure that can be further improved than the conventional molding die having a large clamping area.

Description

반도체 패키지 제조용 몰딩 다이{Molding die for manufacturing semiconductor package}Molding die for manufacturing semiconductor package

본 발명은 반도체 패키지 제조용 몰딩 다이에 관한 것으로서, 더욱 상세하게는 반도체 패키지의 몰딩공정시 수지가 외부 리드쪽으로 흘러나오는 것을 방지하기 위하여 외부리드를 눌러주는 부분이 개선된 반도체 패키지 제조용 몰딩다이에 관한 것이다.The present invention relates to a molding die for manufacturing a semiconductor package. More particularly, the present invention relates to a molding die for manufacturing a semiconductor package, in which an external lead is pressed in order to prevent the resin from flowing out to the external lead during the molding process of the semiconductor package. .

통상적으로 반도체 패키지는 웨이퍼를 개개의 칩으로 소잉하는 공정과, 소잉된 개개의 칩을 부재의 칩탑재영역에 부착하는 공정과, 칩탑재영역에 부착된 반도체 칩의 본딩패드와 부재의 와이어 본딩영역간을 와이어로 본딩하는 공정과, 상기 반도체 칩과 와이어등을 외부로 부터 보호하기 위하여 수지로 몰딩하는 공정과, 리드프레임의 외부리드를 커팅 및 트리밍하는 공정등으로 제조된다.In general, a semiconductor package includes a step of sawing a wafer into individual chips, a step of attaching the sawed individual chips to a chip mounting region of the member, and a bonding pad of the semiconductor chip attached to the chip mounting region and the wire bonding region of the member. Is bonded to a wire, a step of molding with a resin to protect the semiconductor chip and the wire from the outside, a step of cutting and trimming the outer lead of the lead frame.

상기 몰딩공정은 리드프레임의 칩탑재영역에 반도체 칩을 부착하고, 반도체 칩의 본딩패드와 리드간을 와이어로 본딩한 상태에서 첨부한 도 3a,3b에 도시한 바와 같이 각각 안쪽면에 오목한 캐비티(22)가 형성되고 주변이 평평한 클램핑면(24)으로 형성된 상형(26)과 하형(28)으로 구성되어 있는 몰딩다이(10)를 사용하여 진행하게 된다.In the molding process, as shown in FIGS. 3A and 3B, the semiconductor chip is attached to the chip mounting region of the lead frame, and the bonding pads and the leads of the semiconductor chip are bonded with wires. 22 is formed and proceeds by using a molding die 10 composed of an upper mold 26 and a lower mold 28 formed of a clamping surface 24 having a flat periphery.

좀 더 상세하게는, 상기 몰딩다이(10)의 하형(28)의 클램핑면(24)에 리드프레임의 리드를 안착시킨 다음, 상형(26)을 하방향으로 이동시켜 리드를 눌러 클램핑되도록 하고, 상형(26)과 하형(28)의 오목한 공간으로 수지를 공급함으로써, 반도체 칩과 와이어등이 수지로 몰딩된다.In more detail, the lead of the lead frame is seated on the clamping surface 24 of the lower mold 28 of the molding die 10, and then the upper mold 26 is moved downward to press the lead to clamp it. By supplying resin to the concave space of the upper mold | type 26 and the lower mold | type 28, a semiconductor chip, a wire, etc. are molded with resin.

이때, 상형(26)과 하형(28)의 클램핑면(24)은 댐바(16)를 포함하는 리드프레임의 외부리드(14)를 눌러주게 되는데, 상기 각 리드를 연결하고 있는 댐바(16)는 몰딩다이로부터 흘러나오는 수지의 흐름을 차단한다.At this time, the clamping surface 24 of the upper mold 26 and the lower mold 28 presses the outer lead 14 of the lead frame including the dam bars 16. The dam bars 16 connecting the leads are Shut off the flow of resin from the molding die.

상기 상형(26)과 하형(28)의 클램핑면(24)은 패기지 외부로 노출되는 외부리드(14)의 상하면과 이 외부리드(14)를 일체로 연결하고 있는 댐바(16)의 상하 전체면적에 걸쳐 눌러주는 즉, 그 클램핑 면적이 크기 때문에 클램핑시 큰 압력이 필요하고, 특히 면적이 크고 고밀도의 리드프레임인 경우에는 더 큰 클램핑 압력이 필요하며, 이렇게 높은 클램핑 압력을 갖춘 장비의 구입 비용을 상승시키는 단점이 있다.The clamping surface 24 of the upper mold 26 and the lower mold 28 is the entire upper and lower sides of the dam bar 16 which integrally connects the upper and lower surfaces of the outer lead 14 exposed to the outside of the package and the outer lead 14. Pressing over an area, i.e. its clamping area is large, requires large pressures for clamping, especially for large area and high density leadframes, which requires higher clamping pressures and the cost of purchasing equipment with such high clamping pressures. There is a disadvantage of raising.

따라서, 본 발명은 상기와 같은 단점을 감안하여 안출한 것으로서, 몰딩공정시 댐바를 포함하는 리드프레임의 리드에 대한 클램핑 면적을 감소시키면서 그 클램핑 효과는 향상시킬 수 있는 구조의 반도체 패키지 제조용 몰딩 다이를 제공하는데 그 목적이 있다.Accordingly, the present invention has been made in view of the above-described disadvantages, and has a molding die for manufacturing a semiconductor package having a structure in which a clamping effect can be improved while reducing a clamping area of a lead of a lead frame including a dam bar during a molding process. The purpose is to provide.

도 1a,1b는 본 발명에 따른 반도체 패키지 제조용 몰딩 다이를 나타내는 종단면도 및 횡단면도,1A and 1B are longitudinal and cross-sectional views showing a molding die for manufacturing a semiconductor package according to the present invention;

도 2a,2b는 본 발명에 따른 반도체 패키지 제조용 몰딩 다이의 다른 실시예를 나타내는 종단면도 및 횡단면도,Figures 2a, 2b is a longitudinal cross-sectional view and a cross-sectional view showing another embodiment of a molding die for manufacturing a semiconductor package according to the present invention;

도 3a,3b는 종래의 반도체 패키지 제조용 몰딩다이를 나타내는 종단면도 및 횡단면도.3A and 3B are longitudinal cross-sectional views and cross-sectional views showing a molding die for manufacturing a conventional semiconductor package.

<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>

10 : 몰딩다이 12 : 리드프레임10: molding die 12: lead frame

14 : 외부리드 16 : 댐바14: external lead 16: dam bar

18 : 돌출면 20 : 슬롯홀18: protruding surface 20: slot hole

22 : 캐비티 24 : 클램핑면22: cavity 24: clamping surface

26 : 상형 28 : 하형26: upper type 28: lower type

이하, 본 발명을 첨부도면을 참조로 설명하면 다음과 같다.Hereinafter, the present invention will be described with reference to the accompanying drawings.

본 발명은 상형(26)과 하형(28)으로 구성된 반도체 패키지 제조용 몰딩 다이에 있어서, 리드프레임의 댐바(16)와 외부리드(14)를 눌러줄 수 있도록 상형(26)과 하형(28)의 클램핑면에 돌출면(18)을 형성한 것을 특징으로 한다.The present invention is a molding die for manufacturing a semiconductor package consisting of the upper mold 26 and lower mold 28, the upper mold 26 and lower mold 28 of the upper mold 26 and the lower mold 28 so as to press the dam bar 16 and the outer lead 14 of the lead frame; The protruding surface 18 is formed on the clamping surface.

바람직한 구현예로서, 상기 돌출면(18)의 뒤쪽으로 슬롯홀(20)이 더 형성된 것을 특징으로 한다.In a preferred embodiment, the rear surface of the protruding surface 18 is characterized in that the slot hole 20 is further formed.

특히, 상기 돌출면(18)은 외부리드의 안쪽과 양측 상하면, 댐바(16)의 앞쪽상하면을 동시에 눌러주도록 연속된 굴곡 형상으로 돌출되게 성형된 것을 특징으로 한다.In particular, the protruding surface 18 is characterized in that it is formed to protrude in a continuous curved shape to simultaneously press the upper and lower surfaces of the inner side and both sides of the outer lead, the front upper and lower surfaces of the dam bar (16).

여기서 본 발명을 실시예로서, 첨부한 도면을 참조로 더욱 상세하게 설명하면 다음과 같다.Herein, the present invention will be described in more detail with reference to the accompanying drawings.

첨부한 도 1a,2a는 본 발명에 따른 반도체 패키지 제조용 몰딩다이를 나타내는 종단면도로서, 상기 몰딩다이(10)는 상형(26)과 하형(28)으로 구성되어 있고, 상기 상형(26)의 중앙 저면과 하형(28)의 중앙 상면에는 각각 서로 마주보는 캐비티(22)가 형성되어 있으며, 상기 상형(26)과 하형(28)의 테두리면은 클램핑면으로 형성되어 있다.1A and 2A are longitudinal cross-sectional views showing a molding die for manufacturing a semiconductor package according to the present invention, wherein the molding die 10 is composed of an upper mold 26 and a lower mold 28, and the center of the upper mold 26 is shown. Cavities 22 facing each other are formed on the bottom surface and the center upper surface of the lower mold 28, respectively, and the edges of the upper mold 26 and the lower mold 28 are formed as clamping surfaces.

여기서, 첨부한 도 1a에 도시한 바와 같이, 상기 몰딩다이(10)의 상형(26)과 하형(28)의 클램핑면에 서로 밀착되며 클램핑 가능한 돌출면(18)을 형성한다.Here, as shown in FIG. 1A, the protruding surface 18, which is in close contact with each other and is clampable, is formed on the clamping surfaces of the upper mold 26 and the lower mold 28 of the molding die 10.

또한, 첨부한 도 2a에 도시한 바와 같이, 상기 몰딩다이(10)의 상형(26)과하형(28)의 클램핑면에 형성된 돌출면(18)의 뒤쪽으로 오목한 슬롯홀(20)을 더 형성한다.In addition, as shown in FIG. 2A, a slot hole 20 is further formed in the rear of the protruding surface 18 formed on the clamping surface of the upper mold 26 and the lower mold 28 of the molding die 10. do.

특히, 상기 돌출면(18)은 첨부한 도 1a,1b에 도시한 바와 같이 연속된 굴곡 모양이 되도록 돌출 성형된다.In particular, the protruding surface 18 is protruded to form a continuous curved shape as shown in FIGS. 1A and 1B.

상기와 같이 형성된 본 발명의 몰딩다이를 사용하여 반도체 패키지 제조공정중 몰딩공정을 실시하는 상태를 설명하면 다음과 같다.Referring to the molding process of the semiconductor package manufacturing process using the molding die of the present invention formed as described above are as follows.

일반적으로 반도체 패키지 제조공정은 웨이퍼를 개개의 칩으로 소잉하는 공정과, 소잉된 개개의 칩을 부재의 칩탑재영역에 부착하는 공정과, 칩탑재영역에 부착된 반도체 칩의 본딩패드와 부재의 와이어 본딩영역간을 와이어로 본딩하는 공정을 진행한 후, 칩이 부착되고 와이어가 본딩된 상태의 리드프레임을 상기 몰딩다이에 올려 놓은 다음, 몰딩공정을 진행하게 된다.In general, a semiconductor package manufacturing process includes sawing a wafer into individual chips, attaching the sawed individual chips to a chip mounting region of the member, and bonding pads and members of the semiconductor chip attached to the chip mounting region. After the bonding process between the bonding areas with the wire, the lead frame in which the chip is attached and the wire is bonded is placed on the molding die, and then the molding process is performed.

즉, 상기 몰딩다이(10)의 하형(28)의 클램핑면에 댐바(16)를 포함하는 외부리드(14)를 올려놓으면 칩이 실장된 칩탑재판은 하형(28)의 캐비티(22)와 일치되어 위치하게 되는 바, 이 상태에서 상형(26)이 하향 이동되어 칩이 실장된 칩탑재판이 상형(26)의 캐비티(22)와 일치하며 위치되는 동시에 상형(26)의 클램핑면이 댐바(16)를 포함하는 외부리드(14)의 상면을 눌러주게 된다.That is, when the outer lead 14 including the dam bar 16 is placed on the clamping surface of the lower die 28 of the molding die 10, the chip mounting board on which the chip is mounted is formed with the cavity 22 of the lower die 28. In this state, the upper die 26 is moved downward so that the chip mounting plate on which the chip is mounted coincides with the cavity 22 of the upper die 26, and the clamping surface of the upper die 26 is the dam bar ( The upper surface of the outer lead 14 including the 16 is pressed.

좀 더 상세하게는, 상기 상형(26)과 하형(28)의 클램핑면에 형성된 돌출면(18)이 댐바(16)를 포함하는 외부리드(14)의 상면을 눌러서 클램핑하게 되는데, 도 1b에 도시한 바와 같이 상기 돌출면(18)이 굴곡된 형상으로 되어 있기 때문에 외부리드(14)의 양측끝 상하면과 안쪽 부분의 상하면, 그리고 댐바(16)의 안쪽끝 상하면을 동시에 눌러주게 된다.More specifically, the protruding surface 18 formed on the clamping surfaces of the upper mold 26 and the lower mold 28 is clamped by pressing the upper surface of the outer lead 14 including the dam bar 16. As shown in the figure, since the projecting surface 18 is curved, the upper and lower surfaces of both ends of the outer lead 14 and the upper and lower surfaces of the inner portion and the upper and lower surfaces of the inner end of the dam bar 16 are simultaneously pressed.

상기와 같이, 댐바(16)를 포함하는 외부리드(14)에 대한 상형(26)과 하형(28)의 클램핑 면적을 감소시킴에 따라, 몰딩다이의 적은 클램핑 압력으로도 댐바(16)를 포함하는 외부리드(14)를 용이하게 클램핑을 할 수 있다.As described above, as the clamping area of the upper mold 26 and the lower mold 28 with respect to the outer lead 14 including the dam bar 16 is reduced, the dam bar 16 is included even with a small clamping pressure of the molding die. The external lead 14 can be easily clamped.

또한, 첨부한 도 2b에 도시한 바와 같이, 상기 상형(26)과 하형(28)의 돌출면(18) 뒤로 슬롯홀(20)이 형성된 경우에는, 몰딩다이의 보다 적은 압력으로도 댐바(16)를 포함하는 외부리드(14)를 용이하게 클램핑할 수 있게 된다.In addition, as shown in FIG. 2B, when the slot hole 20 is formed behind the protruding surface 18 of the upper mold 26 and the lower mold 28, the dam bar 16 can be operated with a lower pressure of the molding die. It is possible to easily clamp the outer lead (14) including.

한편, 상기와 같이 댐바(16)를 포함하는 외부리드(14)가 클램핑 된 상태에서 상형(26)과 하형(28)의 캐비티(22)로 수지가 공급되는 몰딩공정이 진행되면, 캐비티(22)로부터 클램핑된 틈새 즉, 돌출면(18) 사이로 수지가 흘러나오는 경우가 발생할 수 있는데, 이 돌출면(18)에 클램핑되면서 접촉면적이 감소된 댐바(16)를 포함하는 외부리드(14)에 흘러나온 수지의 묻힘량을 감소시킬 수 있다.On the other hand, when the molding process in which the resin is supplied to the cavity 22 of the upper mold 26 and the lower mold 28 while the outer lead 14 including the dam bar 16 is clamped as described above, the cavity 22 May flow out of the clamped gap, that is, between the protruding surface 18, and the outer lead 14 including the dam bar 16 having a reduced contact area while being clamped to the protruding surface 18. It is possible to reduce the amount of buried resin flowed out.

이상에서 본 바와 같이, 본 발명에 따른 반도체 패키지 제조용 몰딩다이에 의하면 몰딩다이의 상형과 하형의 클램핑 면적을 감소시킴으로써, 적은 클램핑 압력으로도 댐바를 포함하는 외부리드를 용이하게 클램핑 할 수 있는 장점이 있다.As described above, according to the molding die for manufacturing a semiconductor package according to the present invention, by reducing the clamping area of the upper die and the lower die of the molding die, the advantage of being able to easily clamp the external lead including the dam bar even at a low clamping pressure. have.

Claims (3)

상형(26)과 하형(28)으로 구성된 반도체 패키지 제조용 몰딩 다이에 있어서,In the molding die for manufacturing a semiconductor package consisting of the upper mold 26 and lower mold 28, 리드프레임의 댐바(16)와 외부리드(14)를 눌러줄 수 있도록 상형(26)과 하형(28)의 클램핑면에 돌출면(18)을 형성한 것을 특징으로 하는 반도체 패키지 제조용 몰딩 다이.Molding die for manufacturing a semiconductor package, characterized in that the projecting surface 18 is formed on the clamping surface of the upper mold 26 and lower mold 28 so as to press the dam bar 16 and the outer lead 14 of the lead frame. 제 1 항에 있어서, 상기 돌출면(18)의 뒤쪽으로 슬롯홀(20)이 더 형성된 것을 특징으로 하는 반도체 패키지 제조용 몰딩 다이.2. The molding die of claim 1, wherein a slot hole (20) is further formed behind the protruding surface (18). 제 1 항에 있어서, 상기 돌출면(18)은 외부리드의 안쪽과 양측 상하면, 댐바(16)의 앞쪽 상하면을 동시에 눌러주도록 연속된 굴곡 형상으로 돌출되게 성형된 것을 특징으로 반도체 패키지 제조용 몰딩 다이.2. The molding die of claim 1, wherein the protruding surface (18) is formed to protrude in a continuous curved shape to simultaneously press the inner and upper and lower sides of the outer lead and the upper and lower surfaces of the dam bar (16) at the same time.
KR1020000032434A 2000-06-13 2000-06-13 Molding die for manufacturing semiconductor package KR100540258B1 (en)

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