KR20010066244A - Liquid crystal display device and method for fabricating the same - Google Patents

Abstract

PURPOSE: A method for fabricating a liquid crystal display(LCD) and an LCD according to the fabrication method thereof are provided to prevent a cross-talk and a time delay by reducing a resistance of a data line. CONSTITUTION: The liquid crystal display comprises a gate line(102) extended along one direction and a gate pad(106) formed on an edge of the gate line. The gate pad contacts with a gate pad electrode(107) covering the gate pad. And a data line(120) is formed along a direction vertical to the gate line, and a data pad(105) is formed on an edge of the data line. And, the data pad contacts with a data pad electrode(109) formed on the data pad. A source electrode(112) is formed on the data line, and a drain electrode(114) is separated from the source electrode. And a gate electrode(101) is formed on the gate line, and a thin film transistor(110) is constituted with the gate electrode and the source electrode and the drain electrode. And, a drain contact hole(116) is formed on the drain electrode of the thin film transistor, and a pixel electrode(118) contacting with the drain electrode through the drain contact hole is formed. Also, a capacitor electrode(150) prolonged from the pixel electrode is formed on a part of the gate line except a part where the thin film transistor is formed.

Description

Liquid crystal display device manufacturing method and liquid crystal display device according to the manufacturing method

The present invention relates to an image display device, and more particularly, to a manufacturing method of a liquid crystal display (LCD) including a thin film transistor (TFT) and a liquid crystal display device according to the manufacturing method. will be.

The driving principle of the liquid crystal display device uses the optical anisotropy and polarization property of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Accordingly, when the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular arrangement direction of the liquid crystal due to optical anisotropy to express image information.

Currently, the active matrix liquid crystal display (AM-LCD) in which the above-described thin film transistor and pixel electrodes connected to the thin film transistor are arranged in a matrix manner is attracting the most attention because of its excellent resolution and video performance.

In general, the structure of a liquid crystal panel, which is a basic component of a liquid crystal display, will be described.

1 is a cross-sectional view showing a cross section of a general liquid crystal panel.

In the liquid crystal panel 20, two substrates 2 and 4 having various kinds of elements are formed to correspond to each other, and the liquid crystal layer 10 is interposed between the two substrates 2 and 4. have.

The liquid crystal panel 20 includes an upper substrate 4 having a color filter representing a color and a lower substrate 2 having a switching circuit capable of converting a molecular arrangement direction of the liquid crystal layer 10.

The upper substrate 4 includes a color filter layer 8 for implementing colors and a common electrode 12 covering the color filter layer 8. The common electrode 12 serves as one electrode for applying a voltage to the liquid crystal 10. The lower substrate 2 has a thin film transistor S serving as a switching function and a pixel electrode 14 serving as an electrode for receiving a signal from the thin film transistor S and applying a voltage to the liquid crystal 10. It is composed of

The portion where the pixel electrode 14 is formed is called the pixel portion P. FIG.

In order to prevent leakage of the liquid crystal 10 injected between the upper substrate 4 and the lower substrate 2, sealants (sealant) is formed at the edges of the upper substrate 4 and the lower substrate 2. It is sealed with).

The operation and configuration of the lower substrate 2 will be described in detail with reference to FIG. 2, which shows a plan view of the lower substrate 2 shown in FIG. 1.

The pixel electrode 14 is formed on the lower substrate 2, and the data line 24 and the gate line 22 are formed in the vertical and horizontal alignment directions of the pixel electrode 14, respectively.

In the active matrix liquid crystal display device, a thin film transistor S, which is a switching element for applying a voltage to the pixel electrode 14, is formed at one portion of the pixel electrode 14. The thin film transistor S includes a gate electrode 26, source and drain electrodes 28 and 30, and the gate electrode 26 is connected to the gate wiring 22, and the source electrode 28 Is connected to the data line 24.

In addition, a data pad portion 50 is formed at one end of the data line 24. The data pad unit 50 includes a data pad 51 and a data pad electrode 54, and the data pad 51 and the data pad electrode 54 are electrically connected to each other through the data pad contact hole 52. Contact.

The data pad electrode 54 is generally made of the same material as the pixel electrode 14.

In addition, the drain electrode 30 is electrically connected to the pixel electrode 14 through a contact hole (not shown).

The operation of the active matrix liquid crystal display device described above is as follows.

When a voltage is applied to the gate electrode 26 of the switching thin film transistor, the data signal is applied to the pixel electrode 14, and the arrangement of liquid crystal molecules is changed by the signal applied to the pixel electrode, thereby changing the path of the backlight light. . When no signal is applied to the gate electrode 26, since no data signal is applied to the pixel electrode 14, no backlight path is changed by the liquid crystal.

In general, the manufacturing process of the lower substrate is often determined by what material is used for each device to be made or designed according to the specification.

For example, in the past, the small liquid crystal display was not a problem, but in the case of a large area of 18 inches or more and a high resolution (eg, SXGA, UXGA, etc.) liquid crystal display, the material used for the gate wiring and the data wiring was used. The resistivity value is an important factor in determining the superiority of the image quality. Therefore, in the case of a large area / high resolution liquid crystal display device, it is preferable to use a metal having low resistance such as aluminum or an aluminum alloy as the material of the gate wiring and the data wiring.

Hereinafter, a manufacturing process of a conventional active matrix liquid crystal display will be described in detail with reference to FIGS. 3A to 3E.

In general, the structure of a thin film transistor used in a liquid crystal display is an inverted staggered structure. This is because the structure is the simplest and the performance is excellent.

In addition, the reverse staggered thin film transistor is divided into a back channel etch (EB) and an etch stopper (ES) according to a method of forming a channel portion, and a back channel etch type structure having a simple manufacturing process. The manufacturing process of the liquid crystal display element to which is applied is demonstrated.

First, cleaning is performed to remove foreign matters or organic substances on the substrate 1 and to improve the adhesion between the metal thin film of the gate material to be deposited and the glass substrate, and then the metal film is deposited by sputtering.

3A is a step of forming a gate electrode 30 and a capacitor electrode 32 by patterning with a first mask after the deposition of the metal film.

The metal used for the gate electrode 30, which is important for the operation of the active matrix liquid crystal display, is mainly composed of aluminum having low resistance to reduce the RC delay, but pure aluminum has low chemical resistance and subsequent high temperature. In the case of aluminum wiring, it is used in the form of an alloy or a laminated structure is applied because it causes a wiring defect problem due to the formation of a hillock in the process.

After the gate electrode 30 and the capacitor electrode 32 are formed, a gate insulating film 34 is deposited over the top and the entire exposed substrate. In addition, amorphous silicon (a-Si: H), which is a semiconductor material, and amorphous silicon (n ⁺ a-Si: H), which contains impurities, are sequentially deposited on the gate insulating layer 34.

After deposition of the semiconductor material, a pattern is formed with a second mask to form an active layer 36 and an ohmic contact layer 38 having the same size as the active layer (FIG. 3B).

The ohmic contact layer 38 is intended to reduce contact resistance between a metal layer to be formed later and the active layer 36.

The process illustrated in FIG. 3C is a process of depositing a transparent conducting oxide (TCO) and patterning it with a third mask to form the pixel electrode 40. As the transparent conductive material, indium tin oxide (ITO) having excellent light transmittance is mainly used.

The pixel electrode 40 is configured to overlap with the capacitor electrode 32, which is to form a storage capacitor together with the capacitor electrode 32.

Thereafter, as shown in FIG. 3D, a metal layer is deposited and patterned with a fourth mask to form a source electrode 42 and a drain electrode 44. The drain electrode 44 is configured to contact the pixel electrode 40 at a predetermined position. The source and drain electrodes 42 and 44 use a single metal such as chromium (Cr) or molybdenum (Mo).

The ohmic contact layer existing between the source electrode 42 and the drain electrode 44 is removed using the source and drain electrodes 42 and 44 as a mask. If the ohmic contact layer existing between the source electrode 42 and the drain electrode 44 is not removed, serious problems may occur in the electrical characteristics of the thin film transistor S, and a great problem may occur in performance.

Careful attention is required to remove the ohmic contact layer 38. When the ohmic contact layer 38 is actually etched, since there is no etching selectivity with the active layer 36 formed thereunder, the active layer 36 is overetched by about 50 to 100 nm. The etching uniformity is a thin film. It directly affects the characteristics of the transistor S.

Finally, as shown in FIG. 3E, an insulating film is deposited and patterned with a fifth mask to form the protective film 46 to protect the active layer 36.

The passivation layer 46 may adversely affect the characteristics of the thin film transistor due to the unstable energy state of the active layer 36 and the residual material generated during etching, so that the inorganic silicon nitride layer (SiN _x ) or the silicon oxide layer (SiO ₂ ) or the like may be adversely affected. It is formed of organic BCB (BenzoCycloButene).

In addition, the passivation layer 46 may have high light transmittance, moisture resistance, and durability in order to protect the channel region and the main portions of the pixel region P of the thin film transistor S from moisture or scratch resistance defects that may occur during subsequent processes. This material is deposited.

By the above-described process, the thin film transistor substrate of the liquid crystal display device is completed.

As described above, in the conventional method of manufacturing a liquid crystal display, a single metal layer of chromium or molybdenum is used as the source and drain wiring.

That is, in FIG. 4, which is a cross section taken along the cut line IV-IV of the data pad part 50 of FIG. 2, the data pad 51 uses a single layer of chromium or molybdenum metal layer. Here, a gate insulating layer 34 is formed below the data pad 51, and a passivation layer 46 is formed on the data pad 51. In addition, the data pad 51 is in contact with the data pad electrode 54 made of the same material as the pixel electrode.

However, when the data pad 51 is formed using a single metal layer of chromium or molybdenum, a large area and high resolution liquid crystal display device may be caused due to signal delay due to wiring resistance of the data line. Image quality deterioration due to cross-talk may occur.

Therefore, although the resistance can be lowered by increasing the thickness of chromium or molybdenum used as the data wiring, if the thickness is increased to lower the resistance with only a single metal layer, problems such as stress balance due to the thickness increase may occur. There is a disadvantage.

The stress balance is a phenomenon in which the adhesion force between the substrate and the metal is weakened due to the process temperature during fabrication of the device, and the metal is lifted. As the thickness of the metal increases, the stress balance increases.

FIG. 5 illustrates a proposed structure for reducing signal delay caused by the wiring resistance of the data line and the data pad formed of the above-described single layer, and the data line and the data pad are formed in duplicate.

That is, the data pad 51 is composed of a stack of the first data metal 51a and the second data metal 51b.

Here, the first data metal 51a uses chromium or molybdenum, and the second data metal 51b uses aluminum (Al) having low resistance.

However, the data wiring structure of the laminated structure using aluminum as described above can reduce the wiring resistance to prevent image degradation due to signal delay, but the data pad 51 has a disadvantage in that the resistance can be further increased.

FIG. 6 is an enlarged cross-sectional view of part A of FIG. 5 and mainly illustrates an interface between the data pad electrode 54 and the second data metal 51b made of aluminum.

In FIG. 6, the data pad electrode 54 and the data pad 51b are in electrical contact with each other, but a transparent conductive electrode (mainly used as a pixel electrode) used as the data pad electrode 54 is composed of ITO. , IZO is used), an oxide film 56 may be formed at an interface of the data pad 51b used as aluminum.

The reason why the oxide film 56 is formed as described above is because aluminum is easily oxidized. That is, indium is used in the formation of the data pad electrode 54-tin-oxide (ITO) or indium-zinc-by an oxygen (O ₂₎ contained in the oxide (IZO) is used as the data pad (51b) Aluminum is oxidized to form an oxide film 56.

As described above, the contact resistance of the data pad portion may increase due to the formation of the oxide film 56 at the interface between the data pad 51b and the data pad electrode 54. Therefore, the wiring resistance is increased, so that the image quality may be deteriorated due to time delay in the large area liquid crystal display.

In order to solve the above problems, the present invention has the purpose of reducing the resistance of the data wiring to prevent image degradation due to cross-talk and time delay.

1 is a cross-sectional view showing a cross section corresponding to one pixel portion of a general liquid crystal display device.

2 is a plan view illustrating a plane corresponding to one pixel part of a general liquid crystal display;

3A to 3E are process charts showing the manufacturing process of the cross section taken along the cutting line III-III of FIG.

4 is a cross-sectional view taken along the line IV-IV of FIG. 2, which is a plan view of a conventional liquid crystal display.

5 is a sectional view showing another example of FIG. 4;

FIG. 6 is an enlarged cross-sectional view of part A of FIG. 5;

7 is a plan view corresponding to one pixel portion of the liquid crystal display according to the exemplary embodiment of the present invention.

FIG. 8 is a cross-sectional view taken along the line VII-VII of FIG. 7. FIG.

9A and 9B are process charts showing a fabrication process of a cross section taken along the cut line VIII-VIII in Fig. 7.

10 is an enlarged cross-sectional view of a portion B of FIG. 8.

FIG. 11 is a cross-sectional view taken along a cut line VI-XI of FIG. 7. FIG.

<Explanation of symbols for the main parts of the drawings>

101: gate electrode 102: gate wiring

106: gate pad 107: gate pad electrode

110: thin film transistor 112: source electrode

114: drain electrode 116: drain contact hole

118: pixel electrode 120: data wiring

In order to achieve the above object, the present invention includes a first substrate having a pixel region and a switching region defined at one corner of the pixel region; First wiring formed in a horizontal direction of a boundary portion of the pixel region; A second wiring insulated from the first wiring and an insulator at a boundary of the pixel region and formed in a longitudinal direction, and formed of a laminated structure of a first metal and a second metal having a lower resistance than the first metal; A thin film transistor receiving signals from the first and second wirings and formed in the switching region; A pixel electrode in contact with the thin film transistor; A first pad portion having a first pad positioned at an end of the first wiring, and a first pad electrode electrically contacting the first pad and made of the same material as the pixel electrode; A second pad portion disposed at an end of the second wiring, the second pad portion having a portion of the first metal layer exposed and contacting the exposed second pad and having a second pad electrode made of the same material as the pixel electrode; ; A second substrate spaced apart from the first substrate; Provided is a liquid crystal display including a liquid crystal layer filled in the first and second substrates.

In the present invention, the first and second substrates spaced apart from each other; A gate electrode formed on the first substrate; A gate insulating film covering the gate electrode and the substrate; An active layer formed on the gate insulating layer on the gate electrode; Source and drain electrodes formed on the active layer and having a first metal and a second metal stacked thereon, respectively; A passivation layer covering an entire surface of the substrate on which the source and drain electrodes are formed and having a drain contact hole communicating the second metal of the drain electrode to expose the first metal; A liquid crystal display device includes a pixel electrode formed on the passivation layer and in surface contact with a first metal of the drain electrode through the drain contact hole.

In addition, the present invention includes the steps of: providing a plurality of pixel regions and a substrate having a switching region defined at one corner of each pixel region; Forming a gate part including a plurality of gate lines in which gate electrodes are formed in one direction on each pixel area and gate pads extending from the gate lines; Forming a gate insulating film over the entire surface of the gate portion and an active layer in the switching region; A plurality of data lines on which the source electrode is formed on the active layer in the other direction on the gate insulating layer and on the active layer; a drain electrode formed in a direction corresponding to the source electrode; Forming a thin film transistor by forming a data portion, which is a stack of first and second metals including a data pad; Depositing a passivation layer over the thin film transistor, the gate part, and the data part, and patterning a portion of the gate pad, the data pad, and the drain electrode to be exposed; Etching a second metal of the exposed data pad and the drain electrode to expose a first metal; Depositing and patterning a transparent conductive material on the passivation layer to contact the first metal of the drain electrode in the pixel region, a data pad electrode in contact with the exposed first metal of the data pad, and the exposed A method of manufacturing a liquid crystal display device, the method comprising forming a gate pad electrode in contact with a gate pad, respectively.

Hereinafter, with reference to the accompanying drawings will be described in detail the configuration of the present invention.

7 is a plan view illustrating a plane of a liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 7, the liquid crystal display according to the exemplary embodiment of the present invention may include a gate line 102 extending in one direction and a gate pad 106 formed at an edge of the gate line 102. It is composed. The gate pad 106 is in contact with the gate pad electrode 107 covering the gate pad.

The data line 120 extends in a direction perpendicular to the gate line 102 extending in one direction, and a data pad 105 is formed at an edge of the data line 120. The data pad 105 is in contact with the data pad electrode 109 formed on the data pad 105.

In addition, at a predetermined position of the data line 120, a source electrode 112 extending from the data line 120 by a predetermined length is formed, and the drain electrode 114 is spaced apart from the source electrode 112 by a predetermined distance. ) Is formed.

In addition, a gate electrode 101 is formed on the gate line 102, and the thin film transistor 110 is formed of the gate electrode 101 and the source and drain electrodes 112 and 114.

A drain contact hole 116 is formed on the drain electrode 114 of the thin film transistor 110, and the pixel electrode 118 contacting the drain electrode 114 through the drain contact hole 116 is formed. Is formed.

In addition, a portion of the gate wiring 102 except for the portion where the thin film transistor 110 is formed, the capacitor electrode 150 extending from the pixel electrode 118 is formed.

FIG. 8 is a cross-sectional view taken along the line VII-VII of FIG. 7, and a manufacturing process of the liquid crystal display according to the present invention will be described with reference to the thin film transistor 110.

First, the gate electrode 101 is formed on the substrate 1. The gate electrode 101 is formed by depositing and patterning chromium (Cr), molybdenum (Mo) on the substrate 1 by a sputtering process.

Thereafter, the gate insulating layer 150, the pure semiconductor layer 152, and the impurity semiconductor layer 154 are formed on the substrate 1 on which the gate electrode 101 is formed, and then the pure and impurity semiconductor layers 152, 154 is patterned to form active layer 158.

The gate insulating layer 150 may be a silicon nitride layer (SiN _x ) or a silicon oxide layer (SiO ₂ ). The pure semiconductor layer 152 generally uses amorphous silicon, and the impurity semiconductor layer 154 may include n ⁺ amorphous silicon is used.

The source and drain electrodes 112 and 114 are formed on the active layer 158.

The source and drain electrodes 112 and 114 are stacked with two kinds of metals different from each other, and the first source and drain metals 112a and 114a have a high melting point such as chromium (Cr) or titanium (Ti). The metal is used, and the second source and drain metals 112b and 114b are made of aluminum-based metals such as aluminum (Al), aluminum-neodium (AlNd), and aluminum-tantalum (AlTa).

The passivation layer 156 is deposited on the entire surface of the substrate 1 on which the source and drain electrodes 112 and 114 are formed, and the drain contact hole 116 is formed to expose a portion of the drain electrode 114.

After the drain contact hole 116 is formed, the second drain metal 114b of the drain electrode 114 exposed by the drain contact hole 116 is removed. That is, the second drain metal 114b is removed, and the metal finally exposed by the drain contact hole 116 becomes the first drain metal 114a.

Here, the etching solution used to remove the second drain metal 114b uses a developer of the photo-resist PR used in the photolithography process when forming various patterns. The second drain metal 114b formed of an aluminum-based metal is a material having very low corrosion resistance so as to be etched by the developer.

Thereafter, the pixel electrode 118 is formed to substantially contact the first drain metal 114a of the drain electrode 114.

The side surfaces of the pixel electrode 118 and the etched second drain metal 114b of the drain electrode 114 are also in contact with each other.

The pixel electrode 118 is made of indium tin oxide (ITO) or indium zinc oxide (IZO) that is substantially transparent.

The reason why the second drain metal 114b is removed is that ITO or IZO used as the pixel electrode when the low resistance wiring (when aluminum metal is used) is applied to the source and drain electrodes in the conventional liquid crystal display. This is to solve the problem of deterioration of image quality due to a problem of increasing contact resistance.

Therefore, in the present invention, the source and drain wirings are generally formed of a double corrosion resistant metal (mainly chromium and molybdenum) and a low resistance aluminum-based metal (mainly aluminum, aluminum-neodium and aluminum-tantalum). The aluminum-based metal in contact with the ITO or IZO was etched with a PR developer to solve the problem of contact resistance between the drain electrode and the pixel electrode. At this time, there is no process added compared with the manufacturing process of the conventional liquid crystal display device.

9A and 9B are cross-sectional views illustrating the cross section taken along the cut line VIII-VIII in FIG. 7, showing the manufacturing process of the data pad portion.

First, referring to the structure of the data pad unit illustrated in FIG. 9A, a substrate 1 having a gate insulating layer 150 formed thereon, and a data pad 105 formed on the gate insulating layer 150 may be formed on the data pad 105. A passivation layer 156 having a data pad contact hole 103 having a portion of the data pad 105 exposed thereon is formed.

Here, the data pad 105 is formed of a double metal layer of a first data pad metal 105a and a second data pad metal 105b, and the first data pad metal is the first source and drain metal 112a. , The same metal as 114a, and the second data pad metal 105b is the same metal as the second source and drain metals 112b and 114b.

9B is a diagram illustrating a step of forming the data pad electrode 109.

Here, when the data pad electrode 109 is formed, the second data pad metal 105b exposed by the data pad contact hole 103 is removed, and then the data pad electrode 109 is removed from the first pad. It is formed in contact with the data pad metal 105a.

When removing the second data pad metal 105b, a PR developer is used.

FIG. 10 is an enlarged cross-sectional view of part B of FIG. 8 and illustrates contact between the pixel electrode 118 and the drain electrode 114.

Here, the pixel electrode 118 is in direct surface contact with the first drain metal 114a of the drain electrode 114 and in side contact with the second drain metal 114b.

FIG. 11 is a cross-sectional view illustrating a cross section taken along the cutting line VI-XI of FIG. 7, and corresponds to another example of the present invention.

In the present invention, the gate portion (ie, the gate electrode, the gate wiring, and the gate pad) uses a single layer of metal, but the gate portion also uses a double metal like the data portion (data wiring, source and drain electrodes, and data pads). The problem of signal delay and contact resistance (resistance between the data pad and the data pad electrode) due to the data wiring resistance can be solved.

That is, as shown in FIG. 11, the gate pad 106 is formed into a double of the first gate pad metal 106a and the second gate pad metal 106b to form the data pad 105 described above. In the same manner as the method, that is, the second gate pad metal 106b of the aluminum-based metal is etched to be in contact with the gate pad electrode 107. Liver resistance).

When manufacturing a liquid crystal display according to the embodiment of the present invention described above has the following features.

First, by configuring the data wiring in a two-layer structure, the resistance of the data wiring can be lowered to prevent signal delay in the liquid crystal display, thereby preventing deterioration in image quality due to cross-talk.

Second, the upper metal (aluminum-based low resistance metal) of the data pad in contact with the data pad electrode is etched with a developing solution so as to be in contact with the lower metal (metal resistant to corrosion such as chromium and molybdenum) of the data pad. There is an advantage that the contact resistance caused by the oxide film generated at the interface between the ITO or IZO used as the pad electrode and the upper metal of the data pad can be removed.

Claims (12)

A first substrate having a pixel region and a switching region defined at one corner of the pixel region; First wiring formed in a horizontal direction of a boundary portion of the pixel region; A second wiring insulated from the first wiring and an insulator at a boundary of the pixel region and formed in a longitudinal direction, and formed of a laminated structure of a first metal and a second metal having a lower resistance than the first metal; A thin film transistor receiving signals from the first and second wirings and formed in the switching region; A pixel electrode in contact with the thin film transistor; A first pad portion having a first pad positioned at an end of the first wiring, and a first pad electrode electrically contacting the first pad and made of the same material as the pixel electrode; A second pad portion disposed at an end of the second wiring, the second pad portion having a portion of the first metal layer exposed and contacting the exposed second pad and having a second pad electrode made of the same material as the pixel electrode; ; A second substrate spaced apart from the first substrate; Liquid crystal layer filled in the first and second substrate Liquid crystal display comprising a. The method according to claim 1, And the first wiring and the first metal layer are materials selected from a group consisting of chromium (Cr) and titanium (Ti). The method according to claim 1, The second metal layer is a material selected from the group consisting of aluminum (Al), aluminum-neodium (AlNd), and aluminum-tantalum (AlTa). The method according to claim 1, And the second wiring is a data wiring. The method according to claim 1, The pixel electrode is a material selected from a group consisting of substantially transparent ITO and IZO. First and second substrates spaced apart from each other; A gate electrode formed on the first substrate; A gate insulating film covering the gate electrode and the substrate; An active layer formed on the gate insulating layer on the gate electrode; Source and drain electrodes formed on the active layer and having a first metal and a second metal stacked thereon, respectively; A passivation layer covering an entire surface of the substrate on which the source and drain electrodes are formed and having a drain contact hole communicating the second metal of the drain electrode to expose the first metal; A pixel electrode formed on the passivation layer and in surface contact with the first metal of the drain electrode through the drain contact hole; Liquid crystal display comprising a. The method according to claim 6, And the gate electrode and the first metal are selected from a group consisting of chromium (Cr) and titanium (Ti). The method according to claim 6, And the second metal is a material selected from the group consisting of aluminum (Al), aluminum-neodium (AlNd), and aluminum-tantalum (AlTa). The method according to claim 6, The pixel electrode is a material selected from a group consisting of substantially transparent ITO and IZO. Providing a plurality of pixel regions and a substrate having a switching region defined at one corner of each pixel region; Forming a gate part including a plurality of gate lines in which gate electrodes are formed in one direction on each pixel area and gate pads extending from the gate lines; Forming a gate insulating film over the entire surface of the gate portion and an active layer in the switching region; A plurality of data wires having a source electrode formed on the active layer in the other direction on the gate insulating layer, and extending from each of the data wires; Forming a thin film transistor by forming a data portion, which is a stack of first and second metals including a data pad; Depositing a passivation layer over the thin film transistor, the gate part, and the data part, and patterning the gate pad, the data pad, and a portion of the drain electrode to be exposed; Etching a second metal of the exposed data pad and the drain electrode to expose a first metal; Depositing and patterning a transparent conductive material on the passivation layer to contact the first metal of the drain electrode in the pixel region, a data pad electrode in contact with the exposed first metal of the data pad, and the exposed Forming a gate pad electrode in contact with the gate pad, respectively Liquid crystal display manufacturing method comprising a. The method according to claim 10, The first metal of the gate part and the data part is a material selected from the group consisting of chromium (Cr) and titanium (Ti). The method according to claim 10, The second metal is a material selected from the group consisting of aluminum (Al), aluminum-neodium (AlNd), aluminum-tantalum (AlTa).