KR100333272B1 - Liquid crystal display and method for fabricating the same - Google Patents

Abstract

The present invention relates to a first metal having an intrinsic point and a low resistance formed on the metal having a high melting point in order to prevent degradation in image quality due to cross-talk that may occur in a liquid crystal display device having a large data line. A method of manufacturing a low resistance data wiring by forming a three-layer structure of two metals and a third metal covering the low resistance metal is disclosed.

Description

Liquid crystal display device manufacturing method and a liquid crystal display device according to the manufacturing method {Liquid crystal display and method for fabricating the same}

The present invention relates to an image display device, and more particularly, to a manufacturing method of a liquid crystal display (LCD) including a thin film transistor (TFT) and a liquid crystal display device according to the manufacturing method. will be.

The driving principle of the liquid crystal display device uses the optical anisotropy and polarization property of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Accordingly, when the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular arrangement direction of the liquid crystal due to optical anisotropy to express image information.

Currently, the active matrix liquid crystal display (AM-LCD) in which the above-described thin film transistor and pixel electrodes connected to the thin film transistor are arranged in a matrix manner is attracting the most attention because of its excellent resolution and video performance.

In general, the structure of a liquid crystal panel, which is a basic component of a liquid crystal display, will be described.

1 is a cross-sectional view showing a cross section of a general liquid crystal panel.

In the liquid crystal panel 20, two substrates 2 and 4 having various kinds of elements are formed to correspond to each other, and the liquid crystal layer 10 is interposed between the two substrates 2 and 4. have.

The liquid crystal panel 20 includes an upper substrate 4 having a color filter representing a color and a lower substrate 2 having a switching circuit capable of converting a molecular arrangement direction of the liquid crystal layer 10.

The upper substrate 4 includes a color filter layer 8 for implementing colors and a common electrode 12 covering the color filter layer 8. The common electrode 12 serves as one electrode for applying a voltage to the liquid crystal 10. The lower substrate 2 has a thin film transistor S serving as a switching function and a pixel electrode 14 serving as an electrode for receiving a signal from the thin film transistor S and applying a voltage to the liquid crystal 10. It is composed of

The portion where the pixel electrode 14 is formed is called the pixel portion P. FIG.

In order to prevent leakage of the liquid crystal 10 injected between the upper substrate 4 and the lower substrate 2, sealants (sealant) is formed at the edges of the upper substrate 4 and the lower substrate 2. It is sealed with).

The operation and configuration of the lower substrate 2 will be described in detail with reference to FIG. 2, which shows a plan view of the lower substrate 2 shown in FIG. 1.

The pixel electrode 14 is formed on the lower substrate 2, and the data line 24 and the gate line 22 are formed in the vertical and horizontal alignment directions of the pixel electrode 14, respectively.

In the active matrix liquid crystal display device, a thin film transistor S, which is a switching element for applying a voltage to the pixel electrode 14, is formed at one portion of the pixel electrode 14. The thin film transistor S includes a gate electrode 26, source and drain electrodes 28 and 30, and the gate electrode 26 is connected to the gate wiring 22, and the source electrode 28 Is connected to the data line 24.

In addition, the drain electrode 30 is electrically connected to the pixel electrode 14 through a contact hole (not shown).

The operation of the active matrix liquid crystal display device described above is as follows.

When a voltage is applied to the gate electrode 26 of the switching thin film transistor, the data signal is applied to the pixel electrode 14, and when the signal is not applied to the gate electrode 26, the data signal is applied to the pixel electrode 14. It doesn't work.

In general, the manufacturing process of the lower substrate is often determined by what material is used for each device to be made or designed according to the specification.

For example, in the past, the small liquid crystal display was not a problem, but in the case of a large area of 18 inches or more and a high resolution (eg SXGA, UXGA, etc.) liquid crystal display, the material used for the gate wiring and the data wiring is inherent The resistance value is an important factor in determining the superiority of the image quality. Therefore, in the case of a large area / high resolution liquid crystal display device, it is preferable to use a metal having low resistance such as aluminum or an aluminum alloy as the material of the gate wiring and the data wiring.

Hereinafter, a manufacturing process of a conventional active matrix liquid crystal display will be described in detail with reference to FIGS. 3A to 3E.

In general, the structure of a thin film transistor used in a liquid crystal display is an inverted staggered structure. This is because the structure is the simplest and the performance is excellent.

In addition, the reverse staggered thin film transistor is divided into a back channel etch (EB) and an etch stopper (ES) according to a method of forming a channel portion, and a back channel etch type structure having a simple manufacturing process. The manufacturing process of the liquid crystal display element to which is applied is demonstrated.

First, cleaning is performed to remove foreign matters or organic substances on the substrate 1 and to improve the adhesion between the metal thin film of the gate material to be deposited and the glass substrate, and then the metal film is deposited by sputtering.

3A is a step of forming a gate electrode 30 and a storage electrode 32 by patterning with a first mask after the deposition of the metal film.

The metal used for the gate electrode 30, which is important for the operation of the active matrix liquid crystal display, is mainly composed of aluminum having low resistance to reduce the RC delay, but pure aluminum has low chemical resistance and subsequent high temperature. In the case of aluminum wiring, it is used in the form of an alloy or a laminated structure is applied because it causes a wiring defect problem due to the formation of a hillock in the process.

After the gate electrode 30 and the storage electrode 32 are formed, a gate insulating film 34 is deposited over the top and the entire exposed substrate. In addition, amorphous silicon (a-Si: H), which is a semiconductor material, and amorphous silicon (n ⁺ a-Si: H), which contains impurities, are sequentially deposited on the gate insulating layer 34.

After deposition of the semiconductor material, a pattern is formed with a second mask to form an active layer 36 and an ohmic contact layer 38 having the same size as the active layer (FIG. 3B).

The ohmic contact layer 38 is intended to reduce contact resistance between a metal layer to be formed later and the active layer 36.

The process illustrated in FIG. 3C is a process of depositing a transparent conducting oxide (TCO) and patterning it with a third mask to form the pixel electrode 40. As the transparent conductive material, indium tin oxide (ITO) having excellent light transmittance is mainly used.

The pixel electrode 40 is configured to overlap with the storage electrode 32 to form a storage capacitor together with the storage electrode 32.

Thereafter, as shown in FIG. 3D, a metal layer is deposited and patterned with a fourth mask to form a source electrode 42 and a drain electrode 44. The drain electrode 44 is configured to contact the pixel electrode 40 at a predetermined position. The source and drain electrodes 42 and 44 use a single metal such as chromium (Cr) or molybdenum (Mo).

The ohmic contact layer existing between the source electrode 42 and the drain electrode 44 is removed using the source and drain electrodes 42 and 44 as a mask. If the ohmic contact layer existing between the source electrode 42 and the drain electrode 44 is not removed, serious problems may occur in the electrical characteristics of the thin film transistor S, and a great problem may occur in performance.

Careful attention is required to remove the ohmic contact layer 38. When the ohmic contact layer 38 is actually etched, since there is no etching selectivity with the active layer 36 formed thereunder, the active layer 36 is overetched by about 50 to 100 nm. The etching uniformity is a thin film. It directly affects the characteristics of the transistor S.

Finally, as shown in FIG. 3E, an insulating film is deposited and patterned with a fifth mask to form the protective film 46 to protect the active layer 36.

The passivation layer 46 may adversely affect the characteristics of the thin film transistor due to the unstable energy state of the active layer 36 and the residual material generated during etching, so that the inorganic silicon nitride layer (SiN _x ) or the silicon oxide layer (SiO ₂ ) or the like may be adversely affected. It is formed of organic BCB (BenzoCycloButene).

In addition, the passivation layer 46 may have high light transmittance, moisture resistance, and durability in order to protect the channel region and the main portions of the pixel region P of the thin film transistor S from moisture or scratch resistance defects that may occur during subsequent processes. This material is deposited.

By the above-described process, the thin film transistor substrate of the liquid crystal display device is completed.

As described above, in the conventional method for manufacturing a liquid crystal display, a single metal layer of chromium or molybdenum is used as the source and drain wiring.

That is, in FIG. 4, a cross section taken along cut line IV-IV of FIG. 2, the data line 24 uses a single layer of chromium or molybdenum metal layer as a structure covering the active layer 39. Here, an insulating film 34 is formed between the active layer 39, the data line 24, and the substrate 1.

However, when a data line is formed using a single metal layer of chromium or molybdenum, cross-talk caused by signal delay due to wiring resistance of the data line in a large-area, high-resolution liquid crystal display device ( Image quality deterioration due to cross-talk) may occur.

Therefore, although the resistance can be lowered by increasing the thickness of chromium or molybdenum used as the data wiring, when the thickness is increased to lower the resistance with only a single metal layer, problems such as stress balance due to the thickness increase may occur. There is a disadvantage.

The stress balance is a phenomenon in which the adhesion force between the substrate and the metal is weakened due to the process temperature during fabrication of the device, and the metal is lifted. As the thickness of the metal increases, the stress balance increases.

In order to solve the above-mentioned problem, the present invention has the object to reduce the resistance of the data wiring to prevent image degradation due to cross-talk.

1 is a cross-sectional view showing a cross section corresponding to one pixel portion of a general liquid crystal display device.

2 is a plan view illustrating a plane corresponding to one pixel part of a general liquid crystal display;

3A to 3E are process charts showing the manufacturing process of the cross section taken along the cutting line III-III of FIG.

4 is a cross-sectional view taken along the line IV-IV of FIG. 2, which is a plan view of a conventional liquid crystal display.

5 is a plan view corresponding to one pixel portion of a liquid crystal display according to an exemplary embodiment of the present invention.

6A to 6F are process drawings showing the process of the cross section taken along the cutting line VI-VI of FIG. 5.

FIG. 7 is an enlarged cross-sectional view of part D of FIG. 6F;

<Explanation of symbols for the main parts of the drawings>

50: gate wiring 52: gate electrode

54: storage electrode 56: pixel electrode

57: First Data Metal Layer 58: Third Data Metal Layer

59: second data metal layer 60: data wiring

62 source electrode 64 drain electrode

83: semiconductor island 84: active layer

80 insulating film 82 amorphous silicon

95: shield 96: contact hole

In the present invention to achieve the above object and the substrate; A gate electrode formed on the substrate, an insulating film formed on the gate electrode, an active layer formed on the insulating film, a source electrode formed on the active layer, and a position corresponding to the source electrode around the active layer A thin film transistor comprising a drain electrode formed on the thin film transistor; A first metal layer connected to the source electrode of the thin film transistor, a second metal layer having a width smaller than that of the first metal layer on the first metal layer, the second metal layer and substantially the same metal as the first metal layer; A data wiring comprising a third metal layer of the same width; A liquid crystal display including a pixel electrode in contact with the drain electrode is provided.

In addition, the first metal layer and the third metal layer is characterized in that the material selected from the group consisting of high melting point of chromium (Cr), titanium (Ti).

In addition, the second metal layer is characterized in that the material selected from the group consisting of low resistance aluminum (Al), aluminum-neodium (AlNd), aluminum-tantalum (AlTa).

And a semiconductor island formed under the first metal layer and made of the same material as the active layer of the thin film transistor.

In addition, the present invention comprises the steps of providing a substrate; Forming a gate electrode on the substrate; Depositing and selectively etching an insulating film, amorphous silicon, and amorphous silicon containing impurities on the gate electrode and the exposed substrate to form an active layer and a semiconductor island; Continuously depositing a first metal layer and a second metal layer over the active layer, the semiconductor island and the entire surface of the substrate, and patterning the second metal layer over the semiconductor island to form a second data metal; Depositing and simultaneously patterning a third metal layer on the second data metal and the exposed first metal layer to form a source and drain electrode on the active layer and a first data metal layer and a third data metal layer on the semiconductor island Forming a data line formed of the first, second, and third data metal layers; A liquid crystal display device manufacturing method including forming a pixel electrode in contact with the drain electrode is provided.

Hereinafter, with reference to the accompanying drawings will be described in detail the configuration of the present invention.

5 is a plan view corresponding to one pixel unit according to the present invention, in which the gate wiring 50 and the gate electrode 52 connected thereto are formed in the horizontal direction, and the data wiring is formed in the vertical direction.

The storage electrode 54 is positioned on the gate wiring 50, and a storage capacitor 53 is formed along with the pixel electrode 65 in contact with the storage electrode.

In addition, a source electrode 62 connected to the data line 60 and overlapping the gate electrode 52 is formed, spaced apart at a predetermined distance from a position corresponding to the source electrode 62, and the gate electrode ( A drain electrode 64 overlapping with 52 is formed.

The drain electrode 64 is electrically connected to the pixel electrode 56.

The data line 60 has a three-layer structure. That is, the data line 60 is composed of the first metal layer 57, the second metal layer 59 formed smaller than the width of the first metal layer, and the third metal layer 58 covering the second metal layer. .

The data line 60 according to the present invention is formed in a three-layer structure as described above. The following description will be briefly described with reference to FIG. 6F.

The data line 60 includes a first data metal layer 57 having a high melting point, a second data metal layer 59 of a low resistance metal formed on the first data metal layer 57, and the second data metal layer 59. And a third data metal layer 58 formed thereon.

Hereinafter, a manufacturing process of the liquid crystal display according to the present invention will be described with reference to FIGS. 6A to 6F, which are cross-sectional views taken along line VI-VI of FIG. 5.

First, referring to FIG. 6A, a metal material is deposited and patterned on the substrate 1 to form the gate electrode 52.

The insulating layer 80 and the semiconductor layer 82 are deposited and patterned over the entire surface of the gate electrode 52 and the substrate exposed by the gate electrode 52 to form the active layer 84 and the semiconductor island 83. To form. The semiconductor island 83 serves to assist data wiring to be generated in a later process (see FIG. 6B).

At this time, although not shown in the figure, amorphous silicon containing impurities are further deposited on the semiconductor layer 82 and the semiconductor island 83, which may be used for ohmic contact with source and drain electrodes to be produced in a later process. Ohmic contact).

FIG. 6C illustrates forming a metal on which source and drain electrodes and data wirings are formed. The first metal layer 86 covers the active layer 84, the semiconductor island 83, and the exposed insulating layer 80. And continuously depositing a second metal layer, and patterning the second metal layer to form a second data metal layer 59.

In this case, the first metal layer 86 is formed of a high melting point metal having ohmic contact properties with the semiconductor island 83, and the second metal layer is formed of a non-identical material with the first metal layer 86. As the second metal layer, a metal having an etch ratio greater than that of the first metal layer 86 should be used. This is because when the second metal layer is etched to form the second data metal layer 59, when the first metal layer 86 is etched, ohmic contact characteristics are degraded due to contamination of impurities, thereby deteriorating the electrical characteristics of the thin film transistor. Because it becomes.

The first metal layer 86 is a metal having a high melting point such as chromium (Cr) or titanium (Ti), and the second metal layer is aluminum (Al), aluminum-neodium (AlNd), or aluminum-tantalum (AlTa). Low-resistance metals such as

Thereafter, as illustrated in FIG. 6D, a third metal layer 90 is deposited over the entire upper surface of the second data metal layer 59 and the exposed first metal layer. The third metal layer 90 uses substantially the same metal as the first metal layer 86.

As shown in FIG. 6E, the first metal layer 86 and the third metal layer 90 are simultaneously patterned to form the first data metal layer 57, the third data metal layer 58, the source electrode 92, Drain electrodes 94 are formed, respectively.

At this time, the source and drain electrodes 92 and 94 are composed of two metal layers composed of the first metal layer 86 and the third metal layer 90.

After the formation of the source and drain electrodes 92 and 94, the protective layer 95 is deposited over the entire surface of the substrate, and patterned to form a contact hole 96 in a portion of the drain electrode 94.

Thereafter, the pixel electrode 98 in contact with the drain electrode 94 is formed (see FIG. 6F).

In this case, the contact method of the drain electrode 94 and the pixel electrode 98 is a method of forming a pixel electrode directly on the drain electrode, a protective film having a contact hole on the drain electrode, and forming the contact There is a method of forming a pixel electrode contacting the drain electrode through a hole, and in the preferred embodiment of the present invention, the pixel electrode 98 is formed by a contact method through the contact hole 96.

The pixel electrode 98 is preferably made of ITO having excellent light transmittance.

FIG. 7 is an enlarged cross-sectional view of a portion D of FIG. 6F and illustrates a data wiring portion.

That is, the semiconductor island 83 is formed on the insulating film 80 formed on the substrate 1, and the first data metal layer 57 is formed to cover the semiconductor island 83. The second data metal layer 59 is formed to have a width smaller than that of the first data metal layer 57, and the third data metal layer 58 is formed to cover the second data metal layer 59.

The above-described structure of the data line 60 prevents the disconnection of the data line, which may occur when the device is formed, by using a high melting point of chromium (Cr) or titanium (Ti) as a metal material used as the first and third data metal layers. can do.

In addition, the aluminum-based alloy used as the second data metal layer has an advantage of lowering the resistance of the data line.

When manufacturing a liquid crystal display according to the embodiment of the present invention described above has the following features.

First, since the data line has a three-layer structure, the resistance of the data line is lowered, thereby preventing signal delay in the liquid crystal display, thereby preventing image degradation due to cross-talk.

Second, by forming the data wiring in a three-layer structure, there is an advantage in that defective pixels due to disconnection of the wiring can be reduced when the data wiring is formed.

Claims (10)

A substrate; A gate electrode formed on the substrate, an insulating film formed on the gate electrode, an active layer formed on the insulating film, a source electrode formed on the active layer, and a position corresponding to the source electrode around the active layer A thin film transistor comprising a drain electrode formed on the thin film transistor; A first metal layer connected to the source electrode of the thin film transistor, a second metal layer having a width smaller than that of the first metal layer on the first metal layer, the second metal layer and substantially the same metal as the first metal layer; A data wiring comprising a third metal layer of the same width; A pixel electrode in contact with the drain electrode Liquid crystal display comprising a. The method according to claim 1, And the first and third metal layers are high melting point metals exhibiting ohmic properties. The method according to claim 2, The high melting point metal is a liquid crystal display device selected from the group consisting of chromium (Cr) and titanium (Ti). The method according to claim 1, The second metal layer is a material selected from the group consisting of low resistance aluminum (Al), aluminum-neodium (AlNd), and aluminum-tantalum (AlTa). The method according to claim 1, And a semiconductor island formed under the first metal layer and made of the same material as the active layer of the thin film transistor. The method according to claim 1, The first metal layer is a liquid crystal display device having a larger etching ratio than the second metal layer. Providing a substrate; Forming a gate electrode on the substrate; Depositing and selectively etching an insulating film, amorphous silicon, and amorphous silicon containing impurities on the gate electrode and the exposed substrate to form an active layer and a semiconductor island; Continuously depositing a first metal layer and a second metal layer over the active layer, the semiconductor island and the entire surface of the substrate, and patterning the second metal layer over the semiconductor island to form a second data metal; Depositing and simultaneously patterning a third metal layer on the second data metal and the exposed first metal layer to form a source and drain electrode over the active layer and a first greater than the width of the second data metal layer over the semiconductor island Forming a data metal layer and a third data metal layer to form a data line consisting of the first, second, and third data metal layers; Forming a pixel electrode in contact with the drain electrode Liquid crystal display manufacturing method comprising a. The method according to claim 5, And the third metal layer and the first metal layer are materials selected from a group consisting of high melting point chromium (Cr) and titanium (Ti). The method according to claim 5, The second metal layer is a material selected from the group consisting of low resistance aluminum (Al), aluminum-neodium (AlNd), aluminum-tantalum (AlTa). The method according to claim 5, And forming a passivation layer over the entire surface of the substrate on which the data line is formed after the data line is formed and patterning a portion of the drain electrode to expose the protective layer.