KR20010059979A - A method for forming a storage node of semiconductor device - Google Patents

Abstract

PURPOSE: A method for manufacturing a storage electrode of a semiconductor device is provided to increase the capacitance of a capacitor by using an inner wall and on outer wall of the storage electrode as an effective area. CONSTITUTION: An interlayer dielectric(13) having a storage electrode contact plug(21) is formed on an upper portion of a semiconductor substrate(11). An insulating layer is formed on an entire surface of the structure. A photosensitive film pattern is formed on an upper portion of the insulating layer. Then, the insulating layer is etched so as to form an insulating layer pattern(23b) on the upper portion of the interlayer dielectric(13). After removing the photosensitive film pattern, a sacrificial insulating layer spacer is formed at a sidewall of the insulating layer pattern(23b). A storage electrode(29) connected to the storage electrode contract plug(21) is formed by etching a conductive layer formed on the entire surface of the structure. The storage electrode(29) is formed by removing the sacrificial insulating layer spacer.

Description

A method for forming a storage node of semiconductor device

The present invention relates to a method of forming a storage electrode of a semiconductor device, and more particularly, to a method of forming a storage electrode of a semiconductor device which prevents a short circuit between the storage electrodes by isolating the storage electrode and the storage electrode through an insulating film between the storage electrodes.

Recently, due to the trend toward higher integration of semiconductor devices, it is difficult to form capacitors with sufficient capacitance due to a decrease in cell size. In particular, a DRAM device including one MOS transistor and a capacitor has a word in a vertical and horizontal direction on a semiconductor substrate. Lines and bit lines are orthogonally arranged, a capacitor is formed over two gates, and a contact hole is formed in the center of the capacitor.

In this case, the capacitor mainly uses an oxide film, a nitride film, or an O.O. (oxide-nitride-oxide) film as a dielectric, using polycrystalline silicon as a conductor, and a capacitance of a capacitor that occupies a large area in a chip. While reducing the area, reducing the area becomes an important factor in the high integration of the DRAM device.

Therefore, C = (ε0 × εr × A) / T (where ε0 is the permittivity of vaccum, εr is the dielectric constant of the dielectric film, A is the surface area of the capacitor, and T is the thickness of the dielectric film). In order to increase the capacitance (C) of the displayed capacitor, there is a method of using a material having a high dielectric constant as the dielectric, forming a thin dielectric film, or increasing the surface area of the capacitor.

However, these methods all have their problems.

In other words, dielectric materials having high dielectric constants, such as Ta ₂ O ₅ , TiO ₂ or SrTiO ₃ , have been studied, but reliability and thin film characteristics such as junction breakdown voltage of these materials have not been confirmed with certainty. Therefore, it is difficult to apply to a real device, and reducing the thickness of the dielectric film seriously affects the reliability of the capacitor because the dielectric film is destroyed during operation of the device.

Furthermore, in order to increase the surface area of the storage electrode of the capacitor, a polysilicon layer is formed in a multi-layer and then formed into a pin structure through which they are connected to each other, or a cylindrical storage electrode is formed on the contact. Other methods may be used.

As described above, in the method of forming a storage electrode of a semiconductor device according to the related art, when the semiconductor device is highly integrated, in order to increase the surface area of the storage electrode, the storage electrode is formed high, or a meta-stable polysilicon (MPS) film is grown. The storage electrode may fall off or cause a bridge by foreign matters generated during the cleaning process, thereby deteriorating the electrical characteristics and reliability of the device.

The present invention is to solve the above problems of the prior art, by interposing an insulating film between the storage electrode and the storage electrode to prevent the short-circuit of the storage electrode by the particles generated during the process to improve the characteristics and reliability of the device It is an object of the present invention to provide a method for forming a storage electrode of a semiconductor device.

1 to 4 are cross-sectional views illustrating a method of forming a storage electrode of a semiconductor device according to the present invention.

<Description of the symbols for the main parts of the drawings>

11: semiconductor substrate 13: first interlayer insulating film

15: bit line 17: mask insulating film pattern

18 insulating film spacer 19 second interlayer insulating film

21: storage electrode contact plug 23a: insulating film

23b: insulating film pattern 25: photosensitive film pattern

27: sacrificial insulating film spacer 29: storage electrode

In order to achieve the above object, the storage electrode forming method of the semiconductor device according to the present invention,

Forming an interlayer insulating film having a storage electrode contact plug on the semiconductor substrate having a predetermined lower structure formed thereon;

Forming an insulating film over the entire surface;

Forming a photoresist pattern on the insulating layer, the photoresist pattern being exposed to a storage electrode;

Etching the insulating film using the photoresist pattern as an etch mask to form a rod-shaped insulating film pattern on the interlayer insulating film;

Removing the photoresist pattern;

Forming a sacrificial insulating film spacer having a difference in etching selectivity from the insulating film pattern on sidewalls of the insulating film pattern;

Forming a storage electrode conductive layer on the entire surface, and then etching the storage electrode conductive layer by a chemical mechanical polishing process to form a storage electrode connected to the storage electrode contact plug;

And removing the sacrificial insulating layer spacer by a wet etching method to form a storage electrode separated by the insulating layer pattern.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

1 to 4 are cross-sectional views illustrating a method of forming a storage electrode of a semiconductor device according to the present invention.

First, a MOS field effect transistor (not shown) is formed on the semiconductor substrate 11, and a first interlayer insulating film 13 is formed on the entire surface.

Next, a bit line 15 is formed on the semiconductor substrate 11 to be connected to a portion of the semiconductor substrate 11 to be a bit line contact. In this case, a mask insulating layer pattern 17 is stacked on the bit line 15, and an insulating layer spacer 18 is disposed on the sidewall of the bit line 15.

Next, a second interlayer insulating film 19 is formed over the entire surface, and a storage electrode contact plug 21 is formed in the semiconductor substrate 11 to be connected to a portion intended as a storage electrode contact.

Next, an insulating film 23a is formed on the entire surface to have a predetermined thickness. In this case, the insulating film 23a is formed by the height of the storage electrode to be formed using the nitride film. (See Fig. 1)

Next, a photosensitive film pattern 25 is formed on the insulating film 23a to expose a portion intended as a storage electrode.

Then, the insulating film pattern 23b is etched using the photoresist pattern 25 as an etch mask to expose the storage electrode contact plug 21 on the first interlayer insulating film 19. Form. (See Fig. 2)

Next, the photoresist layer pattern 25 is removed, and a sacrificial insulating layer (not shown) having an etching selectivity difference with the insulating layer 23a is formed on the entire surface. In this case, the sacrificial insulating film is formed to a thickness of 100 ~ 1000Å by using an oxide film.

Next, the sacrificial insulating layer is etched entirely to form a sacrificial insulating spacer 27 on the sidewall of the insulating layer pattern 23b. (See Fig. 3)

Next, a predetermined thickness is formed on the entire surface of the storage electrode conductive layer, and the upper portion of the storage electrode is removed by chemical mechanical polishing (CMP). The electrode 29 is formed.

Next, the sacrificial insulating layer spacer 27 is removed by a wet etching process to form the storage electrode 29 isolated by the insulating layer pattern 23b.

Since the storage electrode 29 formed by the above process can be used as an effective area of the storage electrode both inside and outside, the capacitance can be increased. (See Fig. 4)

As described above, in the method of forming the storage electrode of the semiconductor device according to the present invention, an interlayer insulating film having a storage electrode contact plug is formed on a semiconductor substrate having a predetermined substructure, and the storage electrode is formed on the interlayer insulating film. After forming a rod-shaped insulating film pattern that exposes a predetermined portion, a sacrificial insulating film spacer is formed on the sidewalls of the insulating film pattern, a conductive layer for a storage electrode having a predetermined thickness is formed on the entire surface, and then subjected to a CMP process. After the upper part of the conductive layer is separated to form a storage electrode, the sacrificial insulating layer spacer is removed to prevent a short circuit between the storage electrode and the storage electrode by interposing an insulating layer between the storage electrodes, and to effectively protect both the inner and outer walls of the storage electrode. It can be used as an area to increase the capacitance of the capacitor and enable high integration of semiconductor devices. It has the advantage.

Claims (3)

Forming an interlayer insulating film having a storage electrode contact plug on the semiconductor substrate having a predetermined lower structure formed thereon; Forming an insulating film over the entire surface; Forming a photoresist pattern on the insulating layer, the photoresist pattern being exposed to a storage electrode; Etching the insulating film using the photoresist pattern as an etch mask to form a rod-shaped insulating film pattern on the interlayer insulating film; Removing the photoresist pattern; Forming a sacrificial insulating film spacer having a difference in etching selectivity from the insulating film pattern on sidewalls of the insulating film pattern; Forming a storage electrode conductive layer on the entire surface, and then etching the storage electrode conductive layer by a chemical mechanical polishing process to form a storage electrode connected to the storage electrode contact plug; And removing the sacrificial insulating spacers by a wet etching method to form a storage electrode separated by the insulating layer pattern. The method of claim 1, The insulating layer pattern is formed of a nitride film, the storage electrode forming method of a semiconductor device. The method of claim 1, The sacrificial insulating layer spacer is formed of an oxide film, the storage electrode forming method of a semiconductor device.