KR20010001346A - LCD device and the same method - Google Patents

Abstract

PURPOSE: An LCD(Liquid Crystal Display) and a production method thereof are provided to reduce a line resistance of a data bus line and to enlarge a capacity of an auxiliary capacity electrode. CONSTITUTION: A gate bus line(120) and a common electrode for an auxiliary capacity electrode(150) are formed with a first metal layer. An interlayer insulating film is formed. A semiconductor layer(180) is patterned. A gate electrode(120a), a data bus line(130) and a second auxiliary capacity electrode(170) are formed on a spread gate insulating film with a second metal layer. An ion is doped and activated on a semiconductor layer with the gate electrode. A pixel electrode(140) is formed on first/second protecting films. The pixel electrode(140) and a semiconductor layer(180b), the data bus line(130) and a semiconductor layer(180a) and the gate electrode(120a) and the gate bus line(120) are connected through contact holes(109a,109b,109c). The first auxiliary capacity electrode(160) is overlapped between the common electrode(150) and the interlayer insulating film by locating the semiconductor layer(180) thereon.

Description

Liquid crystal display and its manufacturing method {LCD device and the same method}

The present invention relates to a pixel of a liquid crystal display and a manufacturing method thereof.

In particular, the present invention relates to a pixel array having a buried bus coplanar (BBC) structure, in which a first bus film is formed of a gate bus line and a common electrode line for a storage capacitor, and the gate electrode is a data bus of a second metal film. The lines are formed at the same time as the lines are formed, and then connected to the pixel electrodes through the contact holes.

By constructing the pixel array as described above, the thickness of the data bus line can be increased, and a low electrode voltage is provided by providing a structure capable of sufficiently doping ions to the P-Si layer forming the first and second storage capacitor electrodes. In addition, it is possible to secure sufficient capacity, and to prevent the capacity decrease due to the increase of the thickness of the second insulating layer when forming the second storage capacitor electrode, it can be usefully applied to the reduction of the resistance of the data bus line.

Prior to the detailed description of the present invention, a structure, a manufacturing method, and the like of a conventional liquid crystal display will be described with reference to FIGS. 1, 2A, 2E, 3, and 4.

In the conventional liquid crystal display device, as can be seen in the plan view of FIG. 1, the pixel electrode 40 is formed in a region where the gate bus lines 20 and 20 and the data bus lines 30 and 30 cross each other. The pixel electrode 40 is in contact with a thin film transistor (TFT) composed of a gate electrode 20a, a source electrode 30a, a drain electrode 40a, and a semiconductor layer 80 to control the application of current.

Meanwhile, the first storage capacitor electrode 60 and the second storage capacitor electrode 70 are formed to compensate for the leakage of the current applied to the pixel electrode 40. The first storage capacitor electrode 60 is formed by overlapping the storage capacitor common electrode 50 intersecting the pixel electrode region with an insulating film. The second storage capacitor electrode 70 includes the pixel electrode 40 and the gate bus line 20 interposing the insulating film. It is formed by overlapping.

The pixel of the conventional liquid crystal display device configured as described above may be more easily understood by the manufacturing process diagram and the cross-sectional structure.

That is, as shown in FIG. 2A, a pattern of the data bus line 30 made of the first metal film is formed on the transparent substrate.

Subsequently, as shown in FIG. 2B, an interlayer insulating film 35 made of an inorganic insulating film or an organic insulating film such as SiNx, SiOx or the like is formed to cover the data bus line 30, and the semiconductor layer 80 made of a p-Si layer on the interlayer insulating film 35 has a predetermined pattern shape. Is formed.

Subsequently, a gate insulating film 25 made of an inorganic insulating film is formed on the substrate on which the semiconductor layer 80 is formed, as shown in FIGS. 2C, 3, and 4, and the gate electrode 20a, the gate bus line 20, and the storage capacitor common electrode 50 are formed of the second metal. It is formed by the patterning of the film. Doping n + or p + ions in the semiconductor layer using the patterned second metal layer as a mask while the second metal layer is patterned, and then activating the same using a laser or the like so that a part of the semiconductor layer 80 becomes a source / drain electrode layer. do.

After the activation process of the semiconductor layer is finished, as shown in FIG. 2D, the first passivation layer 65 and the second passivation layer 75 made of an inorganic insulation layer or an organic insulation layer are stacked to cover the gate insulation layer and the like, and a part of the data bus line 30 is exposed. Contact holes 9a and contact holes 9b and 9c exposing portions of the semiconductor layer doped with ions are formed.

After forming the contact holes 9a, 9b, and 9c as described above, an indium tin oxide (ITO) film is formed thereon, and the ITO film is formed in a predetermined pattern to form the pixel electrode 40 in contact with the ion-doped semiconductor layer. do. The source electrode 30a is formed by contacting the data bus line 30 and the ion-doped semiconductor layer through the contact hole 9a and the contact hole 9b during the formation of the pixel electrode. On the other hand, the drain electrode 40a is formed by making direct contact with the pixel electrode 40 by forming the contact hole 9c.

As shown in the structures of FIGS. 1 and 4, the first storage capacitor electrode 60 has an end portion of the pixel electrode 40 overlapping the gate bus line 20, and an inorganic insulating layer or an organic insulating layer therebetween. The second protective film 75 is interposed. As shown in the structures of FIGS. 1 and 3, the second storage capacitor electrode 70 includes a gate insulating film 25 formed of an inorganic insulating film or an organic insulating film between the storage capacitor common electrode 50 overlapping the semiconductor layer 80. Is interposed.

By the way, in the pixel array of the liquid crystal display device manufactured and configured as described above, since the data bus line 30 is formed first, the thickness of the wiring cannot be increased since the disconnection of other wirings may be caused in the process of forming the TFT. The capacitance of the first storage capacitor electrode 60 and the second storage capacitor electrode 70 cannot be efficiently formed. That is, since ion doping is blocked by the common electrode 50 for the storage capacitor in the process of doping ions in the semiconductor layer 80 forming the first storage capacitor electrode, the conductivity of the semiconductor layer portion forming the first storage capacitor electrode is lowered.

In addition, when the thickness of the protective layer is increased in the second storage capacitor electrode unit, there is a limit in increasing the storage capacitor electrode.

Therefore, if the pixel array is constructed by the conventional structure as described above, the resistance value of the data bus line cannot be reduced, and in particular, the capacitances of the first and second storage capacitor electrodes cannot be efficiently configured without lowering the aperture ratio.

In order to solve the above-mentioned problems, the present invention first constitutes a common electrode for a gate bus line and a storage capacitor as a first metal film, forms an interlayer insulating film, and then patterns the semiconductor layer and applies the gate insulating film, and the gate The gate electrode and the data bus line are formed of the second metal film on the insulating film. In addition, the second storage capacitor electrode part is a second metal film constituting the data bus line and the gate electrode, and forms a metal pattern in an island shape on the gate bus line, and the metal film is a pixel electrode via the first protective film and the second protective film. It overlaps with an end of and is made to contact a pixel electrode through a contact hole.

Meanwhile, a contact hole formed through the second passivation layer and the first passivation layer so that a part of the data bus line is exposed, and the second passivation layer, the first passivation layer and the gate insulating layer are exposed so that one end of the semiconductor layer doped with ions is exposed. One end of the semiconductor layer doped with ions is connected to the data bus line through the contact hole formed therethrough, and the other end of the semiconductor layer doped with ions passes through the second passivation layer, the first passivation layer, and the gate insulating layer. The contact with the pixel electrode is made through another contact hole.

In addition, the gate bus line formed of the first metal film and the gate electrode formed of the second metal film are connected to the ITO film through separate contact holes.

By constructing the pixel array of the liquid crystal display device of the present invention as described above, when the semiconductor layer is doped with the gate electrode as a mask, the semiconductor layer is shielded only by the gate electrode, and the first storage capacitor electrode is formed. The semiconductor layer located in the region is not shielded by the first metal film, the second metal film, or the like. Therefore, the semiconductor layer overlapped with the first storage capacitor electrode portion is sufficiently doped with ions, thereby significantly increasing the conductivity, and the electrode capacity can be increased even when a low voltage is applied to the storage capacitor electrode. In addition, since the second metal capacitor and the ITO layer are connected to the contact hole, the second storage capacitor electrode can be kept constant without decreasing the storage capacitance even if the thickness of the second protective film is increased.

In addition, since the data bus line is formed on the upper layer, the thickness of the data bus line can be formed thick, thereby reducing the line resistance of the data bus line.

Accordingly, an object of the present invention is to provide a pixel array structure of a liquid crystal display device which reduces the line resistance of the data bus line and increases the capacitance of the storage capacitor electrode without lowering the aperture ratio.

1 is a plan view showing one pixel electrode of a conventional liquid crystal display device;

2A to 2E are cross-sectional views of the manufacturing process taken along the line A-A 'of FIG.

3 is a cross-sectional view taken along the line BB ′ of FIG. 1;

4 is a cross-sectional view taken along the line CC ′ of FIG. 1;

5 is a plan view showing one pixel electrode of the liquid crystal display of the present invention;

6A to 6E are cross-sectional views of the manufacturing process taken along the line A-A 'of FIG.

FIG. 7 is a cross-sectional view taken along the line BB ′ of FIG. 5;

8 is a cross-sectional view taken along the line CC ′ of FIG. 5;

FIG. 9 is a cross-sectional view taken along the line D-D ′ of FIG. 5.

* Description of the symbols for the main parts of the drawings *

10, 110-Transparent substrate 20, 120-Gate bus line

25, 125-Gate insulating film 30,130-Data bus line

35, 135-Interlayer insulating film 40,140-Pixel electrode

50,150-Common electrode for storage capacitor 60, 160-First storage capacitor electrode

65, 165-First passivation layer 70, 170-Second storage capacitor electrode

75, 175-Second passivation layer 80, 180-Semiconductor layer

240a, 240b-ITO conductive film

A semiconductor layer is formed by doping and activating ions in a first region and a second region using at least a gate electrode as a mask, a data bus line in contact with an ion doping portion in a first region of the semiconductor layer, and A liquid crystal display device having a pixel electrode in contact with an ion doping portion in a second region of a semiconductor layer,

A gate bus line is formed under the interlayer insulating film at least under the semiconductor layer, and the gate electrode and the data bus line are formed over at least a gate insulating film over the semiconductor layer, and the gate electrode and data bus line are formed. The pixel electrode is formed on the passivation layer covering the substrate, and the ion doping portions of the data bus line and the first region of the semiconductor layer are connected to each other by a material forming the pixel electrode through first and second contact holes. And an ion doping portion of the second region of the semiconductor layer is in contact with the pixel electrode through a third contact hole, and the gate electrode and the gate bus line form the pixel electrode through fourth and fifth contact holes. It characterized in that configured to be connected to each other by.

In particular, a first storage capacitor common electrode is formed together with the gate bus line, and the first storage capacitor common electrode and the second region of the semiconductor layer overlap at least through the interlayer insulating film.

The second storage capacitor metal layer is formed in an island shape with the data bus line and the gate electrode interposed between the gate insulating film and the interlayer insulating film so that the second storage capacitor metal film overlaps the gate bus line. The pixel layer overlaps with an end portion of the pixel electrode through a protective film, and is connected to an end portion of the pixel electrode through a sixth contact hole.

A method of manufacturing a liquid crystal display device according to the present invention includes forming a gate bus line with a first metal film on a transparent substrate, forming an interlayer insulating film on a substrate on which the gate bus line is formed, and forming a semiconductor layer on the interlayer insulating film. Forming a gate insulating film on the substrate on which the semiconductor layer is formed; forming a data bus line and a gate electrode on the gate insulating film using a second metal film; at least the gate electrode as a mask; Doping and activating ions in a region and a second region, forming a protective film covering the data bus line and the gate electrode, a first contact hole exposing a portion of the data bus line, and ions of the semiconductor layer A second contact hole exposing a portion of the doped first region and a portion of the second region doped with ions of the semiconductor layer Simultaneously forming a third contact hole exposed, a fourth contact hole exposing a portion of the gate electrode, and a fifth contact hole exposing a portion of the gate bus line;

Forming a transparent conductive film on the substrate on which each contact hole is formed, a conductive film connecting the first contact hole and the second contact hole by patterning the transparent conductive film, a pixel electrode in contact with the third contact hole, and And forming a conductive film to which the fourth contact hole and the fifth contact hole are connected.

In addition, when the gate bus line is formed of the first metal layer, a common electrode for a first storage capacitor is simultaneously formed, and the first storage capacitor common wiring is doped with ions in the semiconductor layer through the interlayer insulating layer. And overlap the end portions of the second regions.

In addition, when the data bus line and the gate electrode are formed of the second metal film, a second storage capacitor metal film is simultaneously formed, and the second storage capacitor metal film overlaps the gate bus line. It is formed to have an island shape through an interlayer insulating film, and overlaps an end portion of the pixel electrode through the protective film, and is connected to an end portion of the pixel electrode through a sixth contact hole.

Hereinafter, a manufacturing method, a structure action, and the like of the liquid crystal display device of the present invention will be described in detail with reference to FIGS. 5, 6A to 6E, 7, 8, and 9.

6A to 6E are cross-sectional views of the manufacturing process taken along line AA ′ of FIG. 5, FIG. 7 is a cross-sectional view taken along line BB ′ of FIG. 5, and FIG. 8 is taken along line CC ′ of FIG. 5. FIG. 9 is a cross-sectional view showing a cut along the line DD ′ of FIG. 5.

First, as can be seen in the plan view of FIG. 5, the pixel electrode 140 is formed in a region where the gate bus lines 120 and 120 and the data bus lines 130 and 130 cross each other. The pixel electrode 140 is in contact with the semiconductor layer of the second region through the contact hole 109c among the semiconductor layers of the first region 180a and the second region 180b which are divided on both sides of the gate electrode 120a. The data bus line 130 and the semiconductor layer 180a of the first region are connected to each other by a conductive film 240a made of a material constituting the pixel electrode through the contact holes 109a and 109b.

The gate electrode 120a and the gate bus line 120 are connected to each other by a conductive film 240b made of a material constituting the pixel electrode through the contact holes 109d and 109e.

The first storage capacitor electrode 160 is formed by overlapping an end portion of the semiconductor layer 180b of the second region with the first storage capacitor common electrode 150. The second storage capacitor electrode 170 includes an end portion of the pixel electrode 140 and the second storage capacitor electrode 140. It is comprised by overlapping of the metal film 120b for capacitance.

In the manufacturing method of the liquid crystal display device configured as described above, a pattern of a gate bus line 120 made of a first metal film and a first auxiliary capacitance common electrode 150 is first formed on a transparent substrate 110, and SiNx, SiOx, etc. are formed on the substrate. An interlayer insulating film 135 made of an inorganic insulating film and an organic insulating film is deposited (FIGS. 6A, 8, and 9).

Subsequently, a semiconductor layer 80 made of a p-Si (polypolycrystalline-Si) layer is formed on the interlayer insulating film 135 in a predetermined pattern shape (Fig. 6B).

Subsequently, a gate insulating film 125 made of an inorganic insulating film is formed on the substrate on which the semiconductor layer 80 is formed, and the gate electrode 120a, the data bus line 130 and the second storage capacitor metal film 120b are formed in a predetermined pattern on the second metal film. do. The second storage capacitor metal film 120b overlaps the gate bus line 120 via the gate insulating film 125 and the interlayer insulating film 135, and a pattern is formed to have an island shape in the vicinity of the gate bus line. Using a second metal film such as the gate electrode 120a as a mask, n + or p + ions are doped into the semiconductor layer and activated at a predetermined temperature so that a part of the semiconductor layer becomes a source / drain electrode layer. In the semiconductor layer 180 formed to be positioned in the pixel electrode 140 region, ions are doped in all regions of the semiconductor layer except for portions shielded by the gate electrode. In other words, the doping layer is also formed in the region of the semiconductor layer 180b that overlaps the first storage capacitor common electrode 150 and the interlayer insulating layer 135, thereby increasing the conductivity and increasing the storage capacitance of the first storage capacitor electrode even under low applied voltage conditions. Can be. In addition, since the second metal film and the ITO film are connected to the contact hole in order to form the second storage capacitor electrode, a constant storage capacity can be made regardless of the increase in the thickness of the second protective film.

Further, since the data bus line is formed on the upper layer than the semiconductor layer, even if the thickness is made thick, the disconnection of the wiring associated with the TFT element due to the step of the data bus line does not occur. Therefore, in order to reduce the resistance of the data bus line, it is possible to secure a margin for increasing the thickness of the data bus line (FIGS. 6C and 7).

Subsequently, the first protective film 165 made of the inorganic insulating film or the organic insulating film and the second protective film 175 are stacked to cover the gate insulating film or the like. The first protective film and the second protective film serve as a protective film for protecting the TFT and the like (FIG. 6D).

Subsequently, the first hole doped with ions through the contact hole 109a through which the portion of the data bus line 130 is exposed through the first passivation layer 165 and the second passivation layer 175, and the first passivation layer 165, the second passivation layer 175, and the gate insulating layer 125. Contact holes 109b and 109c exposing a portion of the semiconductor layer 180a in the region and a portion of the semiconductor layer 180b in the second region doped with ions are formed, and at the same time, the first passivation layer 165, the second passivation layer 175, the gate insulating layer 125, and the interlayer are formed. A contact hole 109e through which the portion of the gate electrode 120 is exposed through the insulating layer 135 and a part of the gate electrode 120a and a portion of the second storage capacitor metal layer 120b which are respectively exposed through the contact hole 109e, the first passivation layer 165, and the second passivation layer 175; Holes 109d and 109f are formed, respectively. After forming each of the contact holes, an ITO film is deposited thereon, the ITO film is formed in a predetermined pattern, and the pixel electrode 140 is formed through the contact hole 109c formed in the semiconductor layer 180 (180b) doped with ions in the second region. And the end of the pixel electrode 140 is in contact with the second storage capacitor metal film 120b through the contact hole 109f. In the process of forming the pixel electrode, the contact hole 109a is formed in the ITO conductive film 240a and the data bus line 130 and the semiconductor layer 180 (180a) doped with ions in the first region are formed to contact each other through the contact hole 109b. The gate electrode 120a and the gate bus line 120 come into contact with the ITO conductive film 240b through the contact hole 109d and the contact hole 109e (FIGS. 5 and 6E).

In the detailed description of the present invention, a structure in which the first storage capacitor electrode 160 and the second storage capacitor electrode 170 are configured at the same time is used. However, the structure is not limited thereto, and the first storage capacitor electrode and the second storage capacitor electrode are required. It can be optionally configured according to.

The first storage capacitor electrode 160 of the liquid crystal display device of the present invention is configured so that the semiconductor layer 180 is positioned on the upper layer so as to overlap the first storage capacitor common electrode 150 and the interlayer insulating layer 135 so that the semiconductor layer 180 is sufficiently overlapped with the semiconductor layer of the overlapping portion. Ions can be doped, thereby increasing the storage capacitance of the storage capacitor electrode even at a low storage capacitor voltage under the condition that the aperture ratio does not decrease as compared with the conventional art.

In addition, since the second metal film and the ITO film are connected to the contact hole to form the second storage capacitor electrode, the reduction of the storage capacitance can be prevented even if the thickness of the second protective film is increased.

In addition, since the data bus line 130 is formed above the gate bus line 120 and the semiconductor layer 180, the thickness of the data bus line can be increased to reduce the resistance of the data bus line.

Claims (8)

A semiconductor layer formed by doping and activating ions in a first region and a second region using at least a gate electrode as a mask, a data bus line in contact with an ion doping portion in a first region of the semiconductor layer, and A liquid crystal display device having a pixel electrode in contact with an ion doping portion of a second region, A gate bus line is formed under at least an interlayer insulating film under the semiconductor layer, and the gate electrode and the data bus line are formed over at least a gate insulating film over the semiconductor layer, and the gate electrode and data The pixel electrode is formed on a passivation layer including a bus line, and an ion doping portion of the data bus line and the first region of the semiconductor layer is formed of a material forming the pixel electrode through a first contact hole and a second contact hole. The ion doping portions of the second region of the semiconductor layer are in contact with the pixel electrode through a third contact hole, and the gate electrode and the gate bus line are connected to each other through the fourth contact hole and the fifth contact hole. And a liquid crystal display device connected to each other by a material forming the pixel electrode. The method of claim 1, A first storage capacitor common electrode is formed together with the gate bus line, and the first storage capacitor common electrode and the second region of the semiconductor layer are configured to overlap at least through the interlayer insulating layer. LCD display device. The method of claim 1, A second storage capacitor metal film is formed together with the data bus line and the gate electrode, and the second storage capacitor metal film is formed in an island shape so as to overlap the gate bus line through the gate insulating film and the interlayer insulating film. And an overlapping end portion of the pixel electrode via the passivation layer, the end portion of the pixel electrode being connected to each other through a sixth contact hole. The method according to any one of claims 1 to 3, And the passivation layer is formed by stacking a first insulating layer and a second insulating layer. Forming a gate bus line with a first metal film on the transparent substrate; Forming an interlayer insulating film on the substrate on which the gate bus line is formed; Forming a semiconductor layer on the interlayer insulating film, Forming a gate insulating film on the substrate on which the semiconductor layer is formed; Forming a data bus line and a gate electrode on the gate insulating layer using a second metal layer; Doping and activating ions in the first region and the second region of the semiconductor layer using at least the gate electrode as a mask, Forming a protective film covering the data bus line and the gate electrode; A first contact hole exposing a portion of the data bus line, a second contact hole exposing a portion of the first region doped with ions of the semiconductor layer, and a part of a second region doped with ions of the semiconductor layer exposed Simultaneously forming a third contact hole, a fourth contact hole through which a portion of the gate electrode is exposed, and a fifth contact hole through which a portion of the gate bus line is exposed; Forming a transparent conductive film on the substrate on which each of the contact holes is formed; The transparent conductive layer is patterned to form a conductive layer connecting the first contact hole and the second contact hole, a pixel electrode contacting the third contact hole, and a conductive layer connecting the fourth contact hole and the fifth contact hole. A manufacturing method of a liquid crystal display device comprising the step of performing. The method of claim 5, When the gate bus line is formed of the first metal layer, a first storage capacitor common electrode is formed at the same time, and the first storage capacitor common electrode is formed of doped ions of the semiconductor layer through the interlayer insulating layer. A method for manufacturing a liquid crystal display device, characterized in that it is formed so as to overlap the end of the two areas. The method of claim 5, When forming the data bus line and the gate electrode as the second metal film, a second storage capacitor metal film is simultaneously formed, wherein the second storage capacitor metal film overlaps the gate bus line. And forming an island through an insulating film, overlapping an end portion of the pixel electrode via the protective layer, and an end portion of the pixel electrode connected to each other through a sixth contact hole. Manufacturing method. The method according to any one of claims 5 to 7, And the protective film is formed by stacking a first insulating film and a second insulating film.