KR20000047183A - Lock detect apparatus for phase lock loop and method therefor - Google Patents

Abstract

PURPOSE: A lock detect apparatus for a phase lock loop and method therefor are provided to prevent efficiency deterioration due to erroneous lock detect of a phase lock loop by determining whether lock of a phase lock loop is detected under unstable condition and setting a point of time when lock of the phase lock loop is continuously detected as a lock condition of the phase lock loop. CONSTITUTION: Method for detecting a lock signal of a phase lock loop comprises the steps of: detecting lock condition based on output level of a phase lock loop (20); storing information of the condition according to the result of lock detect; counting a crossing cycle of the un-lock and the lock condition; and setting a lock condition of the phase lock loop when calculation in lock condition before and calculation in lock condition at present are identical after confirming a calculation by means of the lock detect means during the lock storage.

Description

Phase locked loop lock detection method and apparatus

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a satellite communication system. In particular, in detecting a lock of a phase lock loop to convert an input frequency to a specific level, the phase locked loop lock can be prevented from being misdetected. The present invention relates to a phase locked loop lock detection method and apparatus therefor.

In general, when converting an arbitrary frequency into a specific frequency level, in order to output the output frequency level at the correct frequency level constantly, a method of obtaining the desired output frequency by estimating the phase of the input frequency is used. As a device for correcting the input frequency, a phase lock loop is used.

In addition, the phase-locked loop corrects an input conversion frequency through a predetermined variable, and continuously performs frequency operation of the phase-locked loop until the frequency of the output terminal reaches a predetermined output level.

At this time, when the frequency level output through the phase locked loop is equal to the preset reference frequency level, a lock state is detected to maintain the operating conditions of the current state of the phase locked loop with respect to the input frequency. By setting the phase locked loop to the locked state, the operating conditions of the phase locked loop are maintained.

However, in detecting the lock signal of the phase locked loop, when the locked state of the unstable phase locked loop continues, that is, the locked state and the unlocked state are repeatedly performed. If the operation condition of the phase locked loop is maintained based on one lock detection, the output frequency level of the phase locked loop will not be kept constant when it is in an unlocked state. This is a factor that degrades the performance of the frequency converter.

Accordingly, the present invention has been made in view of the above circumstances, and it is confirmed that the lock detection of the phase locked loop is a detection of an unstable state, and the phase locked loop is continuously detected when the phase locked loop lock is detected. To set the locked state to prevent the problem that the performance of the frequency converter is degraded due to the detection of phase locked loop misdetection, and to provide a method and a device for detecting phase locked loop lock. The purpose is.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing an internal configuration of a phase locked loop lock detecting apparatus according to an embodiment of the present invention.

2 is a view for explaining the operation of the apparatus shown in FIG.

*** Explanation of symbols for the main parts of the drawing ***

10: frequency converter, 20: phase lock loop,

30: lock detection unit, 40: lock state storage unit,

50: lock detection counter, 60: lock detection control unit.

The phase locked loop lock detection method according to the first aspect of the present invention for achieving the above object is a phase locked loop lock signal for maintaining the operating state of the phase locked loop based on detection of a lock signal of the phase locked loop. A detection method comprising: a lock detection step of determining a lock state based on an output level of the phase-locked loop, a lock state information storage step of storing state information according to whether a lock state is detected in the lock detection step, and the lock A lock detection coefficient step of counting the crossing periods of the lock state and the unlock state detected in the detection step; and checking the count value of the lock detection coefficient means when the lock is detected in the lock state information storage step; And a lock setting step of setting a phase locked loop to a locked state when the count value in the previous lock detection state and the count value in the current lock detection state are the same. The.

In addition, the phase locked loop lock detection device according to the second aspect of the present invention for achieving the above object is a phase locked loop lock detection device for maintaining the operating state of the phase locked loop based on the detection of the locked state of the phase locked loop. A lock detection means for returning the output of the phase locked loop to an input and comparing the output level of the phase locked loop with a set level to generate status information on whether the lock is in a locked state; Lock state information storage means for storing lock detection state information, a lock detection counter for counting a cycle of crossing a lock state and an unlock state based on the lock detection state applied from the lock detection means, a current lock detection time point The control number that sets the state of the phase locked loop to the locked state when the count value of the lock detection counter is equal to the count value of the lock detection counter at the previous lock detection time. Characterized in that comprises a stage.

That is, according to the above, the phase locked loop is prevented from determining that the phase locked loop is in the locked state in an unstable state in which the phase locked loop repeats the locked state and the unlocked state. It is possible to prevent the performance of the frequency converter from being degraded due to the erroneous detection of the locked state.

Next, an embodiment according to the present invention will be described with reference to the accompanying drawings.

1 is a block diagram showing an internal configuration of a phase locked loop lock detection apparatus according to an embodiment of the present invention.

In FIG. 1, reference numeral 10 denotes a frequency converter 10 for converting an input frequency level into a specific frequency level, and 20 denotes a predetermined variable such that a frequency level applied from the frequency converter 10 becomes a set reference level. As a phase locked loop for correcting the output frequency level, the output frequency correction operation is performed by detecting a phase of an input frequency.

In the drawing, reference numeral 30 denotes a lock detection unit for checking whether a frequency level output from the phase locked loop 20 becomes a reference level and setting a lock thereto, and outputting from the phase locked loop 20. When the frequency level is equal to or greater than the reference level, the phase lock loop 20 is locked to maintain the current operating state of the phase lock loop 10 with respect to the frequency signal applied from the frequency converter 10. Do it.

In addition, when the lock detector 30 determines that the output frequency level of the phase-locked loop 20 is locked, that is, when the output frequency level is higher than or equal to a predetermined level, the state information will be described later. In addition to storing in the lock state storage unit 40, a predetermined lock detection signal is applied to increase the coefficient of the lock detection counter 50 by "1".

On the other hand, reference numeral 40 is a lock state storage unit for storing the lock detection state information applied from the lock detection unit 30, 50 is a lock detection state applied from the lock detection unit 30 A lock detection counter that performs a counting operation on the basis of the counting operation, which causes the lock state of the lock detection unit 30 to count the period at which the lock state crosses the lock state and the unlock state. do.

In addition, reference numeral 60 denotes a lock detection control unit for retrieving the lock state of the lock state storage unit 40 at regular intervals and determining whether the lock is normally detected. When the state of the unit 40 is in the lock detection state, the count value of the lock detection counter 50 at that time is checked, and the count value of the current lock state is compared with the count value of the previous lock state. If the count value in the current lock state and the previous lock state are the same, it is determined that the lock is normally detected, and a predetermined lock setting signal is applied to the lock detection unit 30. Done.

Next, the operation of the apparatus according to the present invention will be described with reference to FIG.

In FIG. 2, (A) shows the count value of the lock detection counter 50, (B) shows the lock state of the lock detection unit 30, and (C) shows the unlock of the lock detection unit 30. (Un Lock) state is shown, (D) shows the lock state detection cycle of the lock detection control part 60. As shown in FIG.

That is, the lock detection unit 30 continuously checks whether the output frequency level of the phase locked loop 20 is greater than or equal to the reference level. When the output frequency level is greater than or equal to the reference level, it indicates that the lock state B is locked. When the output frequency level of the phase locked loop 20 is equal to or less than the reference level, the signal is outputted, indicating that the signal is in the unlocked state (C).

Therefore, when the output level state of the phase fixing loop 20 is unstable, the state information signals of Figs. 4B and 4C are repeatedly repeated.

Meanwhile, the lock detection counter 50 counts the number of cycles in which the locked state B and the unlocked state C intersect, and the output level state of the phase locked loop 20 is unstable. In this case, the count value of the lock detection counter 50 is increased to correspond to the repetition cycle of the locked / unlocked state.

In addition, the lock detection control unit 60 checks the lock state (B or C) at intervals of a predetermined period (D), so that the count value of the lock detection counter 50 is currently locked in the previous lock state. When the lock state is equal to the count value of the lock detection counter 50, the current state is determined to be a normal lock state.

For example, in the drawing, when the lock detection control unit 60 detects the lock state of the phase locked loop 20 at the first detection point X, the detection state is the lock state B. As shown in FIG. The count value of the current lock detection counter 50 is stored in a predetermined memory (not shown). Thereafter, the lock detection control unit 60 detects a lock state of the phase locked loop 20 again at the second detection time point (X + 1), and if the detection state is a lock state (B). The count value of the lock detection counter 50 at the present time is checked. When the count value of the lock detection counter 50 confirmed at the present detection point (second detection point) and the previous, that is, the count value at the first detection point X are not the same, the phase lock loop 20 locks. It is judged that it is not (Lock) state.

Subsequently, the lock detection control unit 60 continuously checks the lock detection state of the lock state storage unit 30 at a predetermined period. The lock detection control unit 60 performs a phase locked loop at the Nth detection time point XN. As a result of detecting the lock state of 20), if the detection state is the lock state B, the count value of the lock detection counter 50 at the previous detection time XN-1 and the current detection time ( The count value of the lock detection counter 50 in XN) is compared. At this time, when the count value of the lock detection counter 50 in the current lock state and the count value of the lock detection counter 50 in the previous lock state are the same, the phase lock loop 20 is normally locked. It is determined that the state.

Subsequently, the lock detection control unit 60 transmits a predetermined lock setting signal to the lock detection unit 30, and the lock signal detection unit 30 locks the phase-locked loop 20 based on this. Lock) state.

That is, according to the above, when the lock state of the phase locked loop is detected at a fixed period, and the count value at the lock detection time is compared, and the count value at the previous lock detection point is different from the count value at the current lock detection point, If it is determined that the phase lock loop is not a normal lock state, and the count value at the previous lock detection point and the count value at the current lock detection point are the same, it is determined that the phase lock loop is a normal lock state.

Therefore, by preventing the phase locked loop from being set to the locked state in an unstable state in which the phase locked loop repeats the locked state and the unlocked state, the performance of the frequency conversion device caused by the false detection of the phase locked loop state This deterioration can be prevented.

On the other hand, the present invention is not limited to the above embodiment can be variously modified in the field of detecting the lock of the phase-locked loop (Lock).

As described above, according to the present invention, the phase locked loop is prevented from determining that the phase locked loop is locked in an unstable state in which the locked loop and the unlocked state are repeated. The performance of the converter can be prevented from being degraded.

Claims (4)

A phase locked loop lock signal detection method for maintaining an operating state of a phase locked loop based on detection of a lock signal of a phase locked loop, A lock detection step of determining a lock state based on the output level of the phase locked loop; A lock state information storing step of storing state information depending on whether a lock state is detected in the lock detection step; A lock detection coefficient step of counting a crossing period between a locked state and an unlocked state detected in the lock detection step; In the lock state information storing step, the count value of the lock detection coefficient means when the lock is detected is checked, and if the count value in the previous lock detection state and the count value in the current lock detection state are the same, the phase locked loop is locked. And a lock setting step for setting the phase locked loop lock detection method. The method of claim 1, The phase lock loop detection method of claim 1, wherein the operation of checking whether the lock is set is performed based on a predetermined period. A phase locked loop lock detecting device for maintaining an operating state of a phase locked loop based on detection of a locked state of a phase locked loop, Lock detection means for returning the output of the phase locked loop to an input and generating state information on whether the locked state is compared by comparing the output level of the phase locked loop with a set level; Lock state information storage means for storing lock detection state information applied from said lock detection means, A lock detection counter that counts a period in which the lock state and the unlock state are crossed based on the lock detection state applied from the lock detection unit; And a control means for setting the state of the phase locked loop to the locked state when the count value of the lock detection counter is equal to the count value of the lock detection counter at the current lock detection point. Detection device. The method of claim 3, And the control means periodically checks the locked state of the phase locked loop.