KR20000045257A - 이동 통신 시스템에서 셀 탐색 방법 - Google Patents
이동 통신 시스템에서 셀 탐색 방법 Download PDFInfo
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- KR20000045257A KR20000045257A KR1019980061815A KR19980061815A KR20000045257A KR 20000045257 A KR20000045257 A KR 20000045257A KR 1019980061815 A KR1019980061815 A KR 1019980061815A KR 19980061815 A KR19980061815 A KR 19980061815A KR 20000045257 A KR20000045257 A KR 20000045257A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7073—Synchronisation aspects
- H04B1/7083—Cell search, e.g. using a three-step approach
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/24—Radio transmission systems, i.e. using radiation field for communication between two or more posts
- H04B7/26—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile
- H04B7/2628—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile using code-division multiple access [CDMA] or spread spectrum multiple access [SSMA]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
- H04J11/0069—Cell search, i.e. determining cell identity [cell-ID]
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Abstract
본 발명은 비동기식 광대역 코드 분할 다중 접속(Code Division Multiple Access : CDMA)방식의 이동 시스템에서 셀 탐색 방법에 관한 것으로서, 셀 탐색의 둘째, 셋째 단계에서 오류가 발생할 경우에는 마이크로 프로세서는 첫째 단계와 둘째 단계에 오류가 발생했음을 알리고, 첫째 단계에서 다시 기지국에서 전송한 신호가 센 기지국의 슬롯의 시작점을 찾기 시작하고 둘째 단계는 첫째 단계에서 찾은 새로운 정보가 올 때까지 첫째 단계로부터 받은 슬롯의 시작점중에서 다음으로 에너지가 큰 시작점에서 기지국 그룹과 프레임 동기를 찾아 셋째 단계로 알려준다. 이런 방식으로 계산량이 많고 계산 시간이 비교적 오래 걸리는 첫째 단계를 줄임으로써 전체 기지국 탐색 시간을 줄일 수 있다.
Description
본 발명은 이동 통신 시스템에서 셀 탐색 방법에 관한 것으로서, 특히 비동기식 광대역(Wide Band) 코드 분할 다중 접속(Code Division Multiple Access : CDMA)방식의 이동 통신 시스템에서 단말기에 전원을 인가한 후 기지국에서 제공되는 신호로부터 셀을 탐색하는 방식을 개선하여 빠른 시간 내에 셀을 탐색하기에 적당하도록 한 이동 통신 시스템에서 셀 탐색 장치 및 방법에 관한 것이다.
비동기식 광대역 코드 분할 다중 접속 방식의 이동 통신 시스템에서, 기지국에서 제공되는 신호로부터셀 탐색 방법은 크게 3단계로 이루어진다.
첫째 단계(ST1)는 도1에 도시된 바와 같이 기지국에서 제공되는 동기 채널신호(SCH1)를 검출하여 1 프레임(frame) 당 16개의 슬롯(slot) 중 임의의 한 슬롯의 시작점을 알아내는 단계이다.
둘째 단계(ST2)는 첫째 단계에서 알아낸 슬롯의 시작점을 기준으로 하여 기지국에서 제공되는 동기 채널신호(SCH2)를 검출하여 보내어진 동기 채널신호(SCH2)가 어느 기지국 그룹에 속하고 프레임의 시작 부분은 어디인지를 알아내는 단계이다.
셋째 단계(ST3)는 둘째 단계에서 알려진 기지국 그룹과 프레임 시작 부분에 관한 정보를 이용하여 공통 제어 물리채널(Common Control Physical Channel : CCPCH1) 신호를 검출하여 둘째 단계에서 밝혀진 기지국 그룹 속에 있는 총 16개의 기지국 중에서 어느 기지국인지를 알아내는 단계이다. 이때, 만일 셋째 단계에서 기지국에서 제공된 셀을 못 찾았을 때는 첫째 단계로 돌아가 앞에서 설명한 모든 단계를 반복하여 실행한다.
도 2는 위에서 설명한 셀 탐색을 실행하는 단말기의 수신단의 블록 구성도이다.
도 2를 참조하여 첫째 단계를 설명하면, 기지국에서 송신된 채널 동기신호(SCH1)는 곱셈기(10,14)에 각각 입력되어 싸인 및 코사인 반송파가 곱해진다. 각 곱셈기(10,14)에서 출력되는 I 및 Q 채널신호는 펄스 성형 필터(11,15)를 각각 통과한 후 직교골드코드 Cp에 매치된 정합 여파기(Matched Filter)(12,16)를 통과하여 필터링된다. 이어, 각 정합 여파기(Matched Filter)(12,16)에서 출력되는 I, Q 채널신호는 제곱기(13,17)에 각각 입력되어 각각의 결과를 제곱한 후 덧셈기(18)를 통하여 더해진다. 즉, 미리 지정된 수의 슬롯에 걸쳐 이상에서 설명한 과정을 반복하고 그 결과를 덧셈기(18)에 저장된 값에 더한다.
이어, 덧셈기(18)에서 출력되는 동기신호에 대한 상관값은 누산기(19)를 통해 미리 정해진 기준 슬롯동안 그 결과를 각각의 칩지연 별로 따로 누적시킨다. 즉, 누산기(19)는 입력신호의 칩지연별로 각각 계산된 각 슬롯마다의 결과를 한 슬롯 간격으로 더해서 저장해 주는 역할을 한다.
이어, 누산기(19)의 출력신호는 비교기(20)로 입력되어 칩지연별로 각각 계산된 상관값을 차례대로 비교하여 가장 큰 상관값을 나타내는 위치 정보(기준시점으로부터의 칩지연)를 알아낸다. 즉, 비교기(20)는 누산기(19)의 출력값들 중에서 특정 임계값을 넘는 것들을 찾아 그 중에서 최대값을 갖는 수신 신호의 지연을 찾아내어, 이 지연값을 바로 슬롯의 시작점으로 판단한다. 이때, 특정 임계값을 넘는 칩 지연이 없으면 마이크로 프로세서(미도시)는 다시 100으로 표시되는 첫째 단계를 반복시키도록 제어한다.
200으로 표시되는 둘째 단계에서는 첫째 단계에서 비교기(20)가 특정 임계값을 넘는 칩 지연이 발생한 경우, 슬롯의 시작점에 관한 위치 정보를 상관부(21)에 알려주게 된다. 그러면 첫째 단계에서 수신되어 펄스 성형 필터(11,15)를 통과한 신호에 각 슬롯마다 17개의 상관기(각각 C1에서 C17까지의 직교골드코드)를 첫째 단계에서 알려준 슬롯의 시작점에서부터 적용시킨 다음 I와 Q 채널을 제곱기(22,23)를 통하여 각각 제곱하여 더한 값을 기억장치인 메모리(25)에 저장한다. 그리고 이러한 과정을 16개의 슬롯, 즉 한 프레임에 걸쳐 반복한다.
이어, 비교기(26)는 메모리(25)에 저장된 값들 중에서 코드 그룹 테이블과 비교하여 수신 신호의 코드 그룹과 프레임의 시작점을 알아낸다. 그리고 이러한 정보를 셋째 단계의 채널 코드 저장부(31)와 상관부(34)로 알려준다. 이때, 만일, 비교기(26)가 특정 임계값을 넘는 코드 그룹을 알아내지 못하면, 마이크로 프로세서는 기지국에서 제공되는 동기 채널신호로부터 첫째 단계를 반복하도록 제어한다.
300으로 표시되는 셋째 단계는 기지국에서 수신되어 펄스 성형 필터(11,15)를 통과한 신호에 둘째 단계에서 알려준 프레임의 시작점에 채널 코드 저장부(31)에서 제공되는 채널 구분 코드를 I와 Q 채널에 곱셈기(32,33)를 통하여 각각 곱한다. 이어, 둘째 단계에서 알아낸 코드 그룹에 속하는 16개의 상관기(각각의 상관기는 초기값이 서로 다른 골드코드를 사용한다)로 이루어진 상관부(34)를 심볼단위로 적용시켜 상관한다. 이어, 상관부(24)에서 출력되는 신호를 제곱기(35,36)를 통하여 각각 제곱하고, 제곱기(35,36)에서 각각 출력되는 I와 Q 채널을 덧셈기(37)를 이용하여 더한 후 저장한다.
이러한 과정을 미리 정해진 수의 심볼 동안 반복한 다음 그 결과를 누산기(38)에 더한 후 비교기(39)를 이용하여 더해진 값들 중에서 특정 임계값을 넘는 것들을 찾아 그 중에서 최대값을 갖는 상관기(즉, 앞의 16개의 서로 다른 골드코드 중의 하나)를 알아내어 기지국에서 전송한 셀을 탐색하게 된다. 그러나, 이때에도 만일, 특정 임계값을 넘는 코드 그룹을 알아내지 못하면, 마이크로 프로세서는 다시 기지국에서 전송되는 동기 채널신호를 이용하여 첫째 단계를 반복하도록 제어한다.
그러나, 이와 같은 종래기술은 마지막 셋째 단계에서 기지국에서 전송한 셀을 찾지 못했을 때는 첫째 단계로 돌아가 다시 첫째 단계에서 셋째 단계를 반복하여 실행한다. 이러한 종래의 기술은 기지국에서 전송한 셀을 탐색하는데 대부분의 계산량과 시간이 걸리는 첫째 단계부터 다시 실행된다. 따라서, 셀 탐색동작시 마지막 셋째 단계에서 셀을 탐색하지 못할 경우 기지국에서 전송한 셀의 탐색 시간이 상당히 지연되어 전체 셀 탐색 동작의 효율성이 낮아진다.
본 발명의 목적은 이상에서 언급한 종래 기술의 문제점을 감안하여 안출한 것으로서, 비동기식 광대역 코드 분할 다중 접속(Code Division Multiple Access : CDMA)방식의 이동 시스템에서 기지국에서 단말기로 동기 채널신호를 전송한 경우, 첫째 단계에서 슬롯의 시작점을 알아낼 때, 하나가 아닌 다수개를 알아내어 둘째 또는 셋째 단계의 실행시 오류가 발생될 경우 첫째 단계를 실행하지 않고 첫째 단계에서 알아낸 다른 슬롯의 시작점을 이용하여 둘째 단계를 반복하여 수행하도록 제어하거나, 첫째 단계를 반복하여 수행되도록 제어하고 이와 동시에 첫째 단계에서 알아낸 다른 슬롯의 시작점을 이용하여 둘째 단계를 반복하여 수행하도록 제어하는 이동 통신 시스템 셀 탐색 방법을 제공하기 위한 것이다.
이상과 같은 목적을 달성하기 위한 본 발명의 일 특징에 따르면, 이동 통신 시스템 셀 탐색 방법이 기지국에서 제공되는 동기 채널신호를 검출하여 한 프레임당 구성되는 다수개의 슬롯 중 미리 설정된 우선 순위를 갖는 다수개의 슬롯의 시작점을 알아내는 첫째 단계와, 상기 첫째 단계에서 알아낸 다수개의 슬롯의 시작점중 가장 우선 순위가 높은 슬롯의 시작점을 기준으로 하여 기지국에서 제공되는 동기 채널신호를 검출하여 상기 동기 채널신호가 어느 기지국 그룹에 속하고 프레임의 시작 부분은 어디인지를 알아내는 둘째 단계와, 상기 둘째 단계에서 알려진 기지국 그룹과 프레임 시작 부분에 관한 정보를 이용하여 공통 제어 물리채널신호를 검출하여 상기 둘째 단계에서 알아낸 기지국 그룹 속에 있는 다수개의 기지국 중에서 가장 신호의 세기가 강한 기지국과 동기를 맞추는 셋째 단계와, 상기 둘째 단계에서 상기 동기 채널신호가 어느 기지국 그룹에 속하고 프레임의 시작 부분은 어디인지를 알아내지 못한 경우 또는 셋째 단계에서 상기 기지국에서 제공된 셀을 알아내지 못한 경우에는 상기 첫째 단계에서 알아낸 다수개의 슬롯의 시작점중 두 번째 우선 순위가 높은 슬롯의 시작점을 기준으로 하여 상기 둘째 단계를 반복하여 실행하는 단계로 이루어진다.
도 1은 종래의 셀 탐색 과정을 나타낸 흐름도.
도 2는 종래 및 본 발명에 따른 셀 탐색기의 블록 구성도.
도 3은 본 발명의 일 실시 예에 따른 셀 탐색 과정을 나타낸 흐름도.
*도면의 주요 부분에 대한 부호의 설명*
10, 14, 32, 33, 39, 40, 44, 45 : 곱셈기
11, 15 : 펄스 성형 필터 12, 16 : 정합 여파기
13, 17, 22, 23, 35, 36 : 제곱기
18, 24, 37 : 덧셈기 19, 38 : 누산기
20, 26, 39 : 비교기 21, 34 : 상관부
25 : 메모리 31, 43 : 채널 코드 저장부
42 : PN 코드 발생기 45 : QPSK 복조기
46 : 버퍼
이하 본 발명의 바람직한 일 실시 예에 따른 구성 및 작용을 첨부된 도면을 참조하여 설명한다.
도 3은 본 발명의 일 실시 예에 따른 셀 탐색과정을 나타낸 흐름도이다.
도 3을 참조하면, 본 발명은 기지국에서 제공되는 동기 채널신호를 검출하여 한 프레임당 구성되는 다수개의 슬롯 중 미리 설정된 우선 순위를 갖는 다수개의 슬롯의 시작점을 알아내는 첫째 단계(ST1)와, 첫째 단계(ST1)에서 알아낸 다수개의 슬롯의 시작점중 가장 우선 순위가 높은 슬롯의 시작점을 기준으로 하여 기지국에서 제공되는 동기 채널신호를 검출하여 상기 동기 채널신호가 어느 기지국 그룹에 속하고 프레임의 시작 부분은 어디인지를 알아내는 둘째 단계(ST2)와, 둘째 단계(ST2)에서 알려진 기지국 그룹과 프레임 시작 부분에 관한 정보를 이용하여 공통 제어 물리채널신호를 검출하여 둘째 단계(ST2)에서 알아낸 기지국 그룹 속에 있는 다수개의 기지국 중에서 가장 신호의 세기가 강한 기지국과 동기를 맞추는 셋째 단계(ST3)와, 둘째 단계(ST2)에서 상기 동기 채널신호가 어느 기지국 그룹에 속하고 프레임의 시작 부분은 어디인지를 알아내지 못한 경우 또는 셋째 단계에서 상기 기지국에서 제공된 셀을 알아내지 못한 경우에는 첫째 단계(ST1)에서 알아낸 다수개의 슬롯의 시작점중 두 번째 우선 순위가 높은 슬롯의 시작점을 기준으로 하여 둘째 단계(ST2)를 반복하여 실행하도록 제어하는 넷째 단계로 이루어진다.
여기서, 넷째 단계는 첫째 단계(ST1)에서 알아낸 다수개의 슬롯의 시작점중 두 번째 우선 순위가 높은 슬롯의 시작점을 기준으로 하여 둘째 단계(ST2)를 반복하여 실행하도록 제어하면서, 동시에 첫째 단계(ST1)를 반복하여 실행하도록 제어할 수도 있다.
도 2는 본 발명에 따른 기지국에서 전송한 셀 탐색을 실행하는 단말기의 수신단의 블록 구성도이다.
도 2를 참조하여 첫째 단계를 설명하면, 기지국에서 송신된 채널 동기신호(SCH1)는 곱셈기(10,14)에 각각 입력되어 싸인 및 코사인 반송파가 곱해진다. 각 곱셈기(10,14)에서 출력되는 I 및 Q 채널신호는 펄스 성형 필터(11,15)를 각각 통과한 후 직교골드코드 Cp에 매치된 정합 여파기(Matched Filter)(12,16)를 통과하여 필터링된다. 이어, 각 정합 여파기(Matched Filter)(12,16)에서 출력되는 I, Q 채널신호는 제곱기(13,17)에 각각 입력되어 각각의 결과를 제곱한 후 덧셈기(18)를 통하여 더해진다. 즉, 미리 지정된 수의 슬롯에 걸쳐 이상에서 설명한 과정을 반복하고 그 결과를 덧셈기(18)에 저장된 값에 더한다.
이어, 덧셈기(18)에서 출력되는 동기신호에 대한 상관값은 누산기(19)를 통해 미리 정해진 기준 슬롯동안 그 결과를 칩별로 각각 누적시킨다. 즉, 누산기(19)는 입력신호의 칩별로 각각 계산된 각 슬롯마다의 결과를 한 슬롯 간격으로 더해서 저장해 주는 역할을 한다.
이어, 누산기(19)의 출력신호는 비교기(20)로 입력되어 칩별로 각각 게산된 상관값을 차례대로 비교하여 설정된 우선 순위를 갖는 상관값을 나타내는 위치 정보(기준 시점으로부터의 칩지연)를 다수개 알아낸다. 즉, 비교기(20)는 누산기(19)의 출력값들 중에서 특정 임계값을 넘는 것들을 다수개 찾아 그 중에서 최대값을 갖는 수신 신호의 지연을 찾아내어, 이 지연값을 바로 슬롯의 시작점으로 판단한다. 이때, 특정 임계값을 넘는 칩 지연이 없으면 마이크로 프로세서(미도시)는 다시 100으로 표시되는 첫째 단계를 반복시키도록 제어한다.
여기서, 종래의 기슬과 대비해 볼 때 본 발명의 특징은 비교기(20)가 누산기(19)의 출력값들 중에서 특정 임계값을 넘는 것들을 다수개 찾아내고, 마이크로 프로세서는 다수개의 결과값을 설정된 우선 순위로 관리한다는 것이다.
200으로 표시되는 둘째 단계에서는 첫째 단계에서 비교기(20)가 특정 임계값을 넘는 칩 지연이 발생한 경우, 슬롯의 시작점에 관한 위치 정보를 상관부(21)에 알려주게 된다. 그러면 첫째 단계에서 수신되어 펄스 성형 필터(11,15)를 통과한 신호에 각 슬롯마다 17개의 상관기(각각 C1에서 C17까지의 직교골드코드)를 첫째 단계에서 알려준 슬롯의 시작점에서부터 적용시킨 다음 I와 Q 채널을 제곱기(22,23)를 통하여 각각 제곱하여 더한 값을 기억장치인 메모리(25)에 저장한다. 그리고 이러한 과정을 16개의 슬롯, 즉 한 프레임에 걸쳐 반복한다.
이어, 비교기(26)는 메모리(25)에 저장된 값들 중에서 특정 임계값을 넘는 것들을 찾아내어, 찾아낸 임계값중에서 코드 그룹 테이블과 비교하여 수신 신호의 코드 그룹과 프레임의 시작점을 알아낸다. 그리고 이러한 정보를 셋째 단계의 채널 코드 저장부(31)로 알려준다. 이때, 만일, 비교기(26)가 특정 임계값을 넘는 코드 그룹을 알아내지 못하면, 마이크로 프로세서는 기지국에서 제공되는 동기 채널신호로부터 첫째 단계를 반복하도록 제어한다. 또한, 선택적으로 기지국에서 제공되는 동기 채널신호로부터 첫째 단계를 반복하도록 제어하면서도 이와 동시에 첫째 단계에서 알아낸 2번째 우선 순위를 갖는 슬롯 시작점을 이용하여 둘째 단계를 반복하여 실행하도록 제어한다.
300으로 표시되는 셋째 단계는 기지국에서 수신되어 펄스 성형 필터(11,15)를 통과한 신호에 둘째 단계에서 알려준 프레임의 시작점에 채널 코드 저장부(31)에서 제공되는 채널 구분 코드를 I와 Q 채널에 곱셈기(32,33)를 통하여 각각 곱한다. 이어, 둘째 단계에서 알아낸 코드 그룹에 속하는 16개의 상관기(각각의 상관기는 초기값이 서로 다른 골드코드를 사용한다)로 이루어진 상관부(34)를 심볼단위로 적용시켜 상관한다. 이어, 상관부(24)에서 출력되는 신호를 제곱기(35,36)를 통하여 각각 제곱하고, 제곱기(35,36)에서 각각 출력되는 I와 Q 채널을 덧셈기(37)를 이용하여 더한 후 저장한다.
이러한 과정을 미리 정해진 수의 심볼 동안 반복한 다음 그 결과를 누산기(38)에 더한 후 비교기(39)를 이용하여 더해진 값들 중에서 특정 임계값을 넘는 것들을 찾아 그 중에서 최대값을 갖는 상관기(즉, 앞의 16개의 서로 다른 골드코드 중의 하나)를 알아내어 기지국에서 전송한 셀을 탐색하게 된다. 그러나, 이때 셋째 단계에 오류가 발생되면, 마이크로 프로세서는 기지국에서 제공되는 동기 채널신호로부터 첫째 단계를 반복하도록 제어한다. 또한, 선택적으로 기지국에서 제공되는 동기 채널신호로부터 첫째 단계를 반복하도록 제어하면서도 이와 동시에 첫째 단계에서 알아낸 2번째 우선 순위를 갖는 슬롯 시작점을 이용하여 둘째 단계를 반복하여 실행하도록 제어한다.
이상의 본 발명을 요약하면, 첫째 단계에서 여러 개의 슬롯 시작점을 둘째 단계에 알려주고, 둘째 단계에서는 첫째 단계에서 알려준 슬롯 시작점중에서 가장 에너지가 큰 시작점에서 기지국 그룹과 프레임 동기를 찾아 셋째 단계로 알려준다. 따라서, 둘째 단계에서 실패했을 경우에는 마이크로 프로세서는 다시 첫째 단계를 반복함과 동시에 이전에 첫째 단계에서 알려준 여러 개의 슬롯 시작점중에서 에너지가 다음으로 큰 시작점에 대해서 둘째 단계를 반복하도록 제어한다. 셋째 단계에서는 둘째 단계에서 알려준 정보를 바탕으로 기지국을 찾게 된다. 그러나, 기지국을 찾지 못했을 때는 마이크로 프로세서는 첫째 단계와 둘째 단계에 오류가 발생했음을 인식하고, 첫째 단계에서 다시 기지국에서 전송한 신호가 센 기지국의 슬롯의 시작점을 찾기 시작하고 둘째 단계는 첫째 단계에서 찾은 새로운 정보가 올 때까지 첫째 단계로부터 받은 슬롯의 시작점중에서 다음으로 에너지가 큰 시작점에서 기지국 그룹과 프레임 동기를 찾아 셋째 단계로 알려준다. 이런 방식으로 계산량이 많고 계산 시간이 비교적 오래 걸리는 첫째 단계를 줄임으로써 전체 기지국 탐색 시간을 줄일 수 있다.
이상의 설명에서와 같은 본 발명에 따르면, 비동기식 광대역 코드 분할 다중 접속(Code Division Multiple Access : CDMA)방식의 이동 통신 시스템에서 기지국에서 단말기로 동기 채널신호를 전송한 경우, 첫째 단계에서 슬롯의 시작점을 알아내는 상관값을 미리 설정된 다수개를 출력한다. 따라서, 셀을 탐색하는 셋째 단계에서 기지국에서 전송한 셀을 찾지 못하면 셀을 탐색하는데 대부분의 계산 시간이 걸리는 첫째 단계부터 다시 실행하며, 동시에 첫 번째 단계에서알아낸 슬롯의 시작점들 중에서 그 다음으로 에너지가 큰 슬롯의 시작점을 이용하여 두 번째 단계를 실행하도록 제어한다.
이에 따라, 동기식에 비해 기지국에서 전송한 셀을 탐색하는데 어려운 비동기식 광대역 코드 분할 다중 접속방식의 이동 시스템에서 전체 셀 탐색 시간을 줄임으로써 단말기가 전원을 켠 후 빠른 시간 안에 통화가 가능토록 해 준다. 또한, 단말기의 위치가 핸드오프를 실행해야 될 장소에 있더라도 핸드오프도 신속히 할 수 있어 통화 중 끊김 현상을 줄일 수 있다. 그리고 부가적으로 단말기의 전력사용을 줄일 수 있다.
Claims (2)
- 기지국에서 제공되는 동기 채널신호를 검출하여 한 프레임당 구성되는 다수개의 슬롯 중 미리 설정된 우선 순위를 갖는 다수개의 슬롯의 시작점을 알아내는 첫째 단계와,상기 첫째 단계에서 알아낸 다수개의 슬롯의 시작점중 가장 우선 순위가 높은 슬롯의 시작점을 기준으로 하여 기지국에서 제공되는 동기 채널신호를 검출하여 상기 동기 채널신호가 어느 기지국 그룹에 속하고 프레임의 시작 부분은 어디인지를 알아내는 둘째 단계와,상기 둘째 단계에서 알려진 기지국 그룹과 프레임 시작 부분에 관한 정보를 이용하여 공통 제어 물리채널신호를 검출하여 상기 둘째 단계에서 알아낸 기지국 그룹 속에 있는 다수개의 기지국 중에서 가장 신호의 세기가 강한 기지국과 동기를 맞추는 셋째 단계와,상기 둘째 단계에서 상기 동기 채널신호가 어느 기지국 그룹에 속하고 프레임의 시작 부분은 어디인지를 알아내지 못한 경우 또는 셋째 단계에서 상기 기지국에서 제공된 셀을 알아내지 못한 경우에는 상기 첫째 단계에서 알아낸 다수개의 슬롯의 시작점중 두 번째 우선 순위가 높은 슬롯의 시작점을 기준으로 하여 상기 둘째 단계를 반복하여 실행하는 단계로 이루어진 것을 특징으로 하는 이동 통신 시스템 셀 탐색 방법.
- 기지국에서 제공되는 동기 채널신호를 검출하여 한 프레임당 구성되는 다수개의 슬롯 중 미리 설정된 우선 순위를 갖는 다수개의 슬롯의 시작점을 알아내는 첫째 단계와,상기 첫째 단계에서 알아낸 다수개의 슬롯의 시작점중 가장 우선 순위가 높은 슬롯의 시작점을 기준으로 하여 기지국에서 제공되는 동기 채널신호를 검출하여 상기 동기 채널신호가 어느 기지국 그룹에 속하고 프레임의 시작 부분은 어디인지를 알아내는 둘째 단계와,상기 둘째 단계에서 알려진 기지국 그룹과 프레임 시작 부분에 관한 정보를 이용하여 공통 제어 물리채널신호를 검출하여 상기 둘째 단계에서 알아낸 기지국 그룹 속에 있는 다수개의 기지국 중에서 가장 신호의 세기가 강한 기지국과 동기를 맞추는 셋째 단계와,상기 둘째 단계에서 상기 동기 채널신호가 어느 기지국 그룹에 속하고 프레임의 시작 부분은 어디인지를 알아내지 못한 경우 또는 셋째 단계에서 상기 기지국에서 제공된 셀을 알아내지 못한 경우에는 상기 첫째 단계에서 알아낸 다수개의 슬롯의 시작점중 두 번째 우선 순위가 높은 슬롯의 시작점을 기준으로 하여 상기 둘째 단계를 반복하여 실행하도록 제어하고, 이와 동시에 상기 첫째 단계를 반복하여 실행하도록 제어하는 단계로 이루어진 것을 특징으로 하는 이동 통신 시스템 셀 탐색 방법.
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