KR20000044201A - Manufacturing method of thin-film type optical path adjustor - Google Patents

Abstract

PURPOSE: A manufacturing method of thin-film type optical path adjustor is provided to remove stress generated during forming a mirror, thereby enhancing the horizontal level of the mirror. CONSTITUTION: A manufacturing method of thin-film type optical path adjustor comprises steps of: providing an active matrix containing a metal layer having a drain pad extended from a drain of a MOS transistor; forming a first layer, a bottom electrode layer, a second layer and a top electrode layer on the active matrix and then sequentially patterning them to form an actuator containing first, second top electrodes, first, second deformation layers and bottom electrode; patterning the first layer to form a supporter; forming a sacrifice layer on the supporter and the actuator and then coating photoresist on the sacrifice layer; performing UV-curing against the photoresist; forming and patterning a hard mask on the photoresist and then patterning the sacrifice layer to form a post hole; forming a stress control layer in the post hole; and forming a mirror on the stress control layer.

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method for manufacturing a thin film type optical path control device using thin-film micromirror array-actuated (TMA), and more particularly, to a thin film type optical path control device capable of increasing the light efficiency of incident light by improving the flatness of a mirror. It relates to a manufacturing method.

Optical path control devices or spatial light modulators for projecting optical energy onto the screen can be applied to a variety of applications such as optical communications, image processing and information display devices. Typically, image processing apparatuses using such an optical modulator are classified into a direct view type image display device and a projection type image display device according to a method of displaying optical energy on a screen.

An example of a direct-view image display device is a CRT (Cathode Ray Tube). The CRT device is called a CRT, which has excellent image quality but increases in weight and volume as the screen is enlarged, leading to an increase in manufacturing cost. There is. Examples of the projection image display apparatus include a liquid crystal display (LCD), a deformable mirror device (DMD), and an actuator mirror array (AMA). Such projection image display devices can be further divided into two groups according to their optical characteristics. That is, devices such as LCDs can be classified as transmit light modulators, while DMD and AMA can be classified as reflected light modulators.

Transmission optical modulators, such as LCDs, have a very simple optical structure, which makes them thinner, lighter in weight, and smaller in volume. However, due to the polarity of the light, the light efficiency is low, there is a problem inherent in the liquid crystal material, for example, there is a disadvantage that the response speed is slow and the inside is easy to overheat. In addition, the maximum light efficiency of existing transmission light modulators is limited in the range of 1-2% and requires dark room conditions to provide acceptable display quality. Therefore, optical modulators such as DMD and AMA have been developed to solve the above problems.

Although DMD shows a relatively good light efficiency of about 5%, the hinge structure employed in the DMD not only causes serious fatigue problems, but also requires a very complicated and expensive driving circuit. AMA reflects the light incident from the light source at a predetermined angle, and each mirror installed therein adjusts the luminous flux so that the reflected light is projected on the screen through an opening such as a slit or pinhole to form an image. Device. Therefore, its structure and operation principle are simple, and high light efficiency (more than 10% light efficiency) can be obtained compared to LCD or DMD. In addition, the contrast of the image projected on the screen is improved to obtain a brighter and clearer image.

These AMA devices are largely divided into bulk type and thin film type. The bulk optical path control device is disclosed in US Pat. No. 5,085,497 to Gregory Um et al. The bulk optical path adjusting device is made by thinly cutting a multilayer ceramic to mount a ceramic wafer having a metal electrode formed therein in an active matrix in which a transistor is embedded, and then processing by using a sawing method and installing a mirror on the top. However, the bulk optical path control device requires very high precision in design and manufacturing, and has a disadvantage in that the response of the strained layer is slow.

Accordingly, a thin-film micromirror array-actuated (TMA) that can be manufactured using a semiconductor manufacturing process has been developed. Such a thin film type optical path control device is disclosed in Korean Patent Application No. 98-41672 (name of the invention: a method of manufacturing a thin film type optical path control device) filed by the applicant of the Korean Patent Office on October 2, 1998.

FIG. 1 shows a perspective view of a thin film type optical path adjusting device described in the above prior application, and FIG. 2 shows a cross-sectional view of the device of FIG. 1 taken along line A ₁ -A ₂ .

1 and 2, the thin film type optical path adjusting device includes an active matrix 16, a support element 18, an actuator 31, and a mirror 41.

Referring to FIG. 2, the active matrix 16 includes a substrate 1 in which M × N (M and N are natural numbers) P-MOS transistors 5 and drains 2 of the P-MOS transistors 5. And the first metal layer 8 formed on the substrate 1, the first protective layer 9, and the second metal layer 10 sequentially formed on the first metal layer 8, extending from the source 3. , A second protective layer 12 and an etch stop layer 13.

Referring to FIG. 1, the support element 18 comprises a support line 20, a support layer 19, a first anchor 21 and second anchors 22a, 22b. The support line 20 and the support layer 19 are horizontally formed on the etch stop layer 13 via the first air gap 15, and the common electrode line 32 is formed on the support line 20. The support layer 19 is integrally formed along the direction orthogonal to the support line 20 in the shape of a rectangular ring on the same plane. A first anchor 21 is integrally formed with the two arms and attached to the etch stop layer 13 at a lower portion between the two arms horizontally extending in a direction orthogonal to the support line 20 of the support layer 19. Two second anchors 22a and 22b are formed integrally with the two arms and attached to the etch stop layer 13, respectively, on the outer lower portion of the two arms. The support layer 19 is supported by the first anchor 21 at the center portion and supported by the second anchors 22a and 22b at both sides. The first anchor 21 is formed at a portion of the etch stop layer 13 where the drain pad of the first metal layer 8 is positioned. A via hole 38 is formed from the central portion of the first anchor 21 to the drain pad of the first metal layer 8.

The actuator 31 includes a lower electrode 24, a first strained layer 26, a second strained layer 27, a first upper electrode 29, and a second upper electrode 30. The lower electrode 24 has a mirror-shaped 'c' shape spaced apart from the support line 20 by a predetermined distance, and is stepped toward the first anchor 21 at both sides of one side of the lower electrode 24. The protrusions are formed corresponding to each other. The protrusions of the lower electrode 24 extend to the periphery of the via hole 38 formed in the first anchor 21, respectively. The via contact 39 is formed from the drain pad of the first metal layer 8 to the protrusions of the lower electrode 24 through the via hole 38 to electrically connect the drain pad and the lower electrode 24. The two arms of the lower electrode 24 each have a shape of a rectangular plate, and the first and second deformable layers 26 and 27 each have a shape of a rectangular plate having a smaller area than the two arms of the lower electrode 24. And formed on top of two arms of the lower electrode 24, and the first and second upper electrodes 29 and 30 have a shape of a rectangular flat plate having a smaller area than the first and second deformable layers 26 and 27, respectively. And are formed on top of the first and second strained layers 26, 27.

The first insulating layer 34 is formed from one side of the first upper electrode 29 to a part of the supporting layer 19, and the first insulating layer 34 and the supporting layer 19 from one side of the first upper electrode 29. The first upper electrode connecting member 36 is formed up to the common electrode line 32 through a portion of the upper electrode connecting member 36.

A mirror 41 is formed at a portion of the mirror-shaped 'c'-shaped lower electrode 24 in which the first and second upper electrodes 29 and 30 are not formed, that is, parallel to the support line 20. A supporting post 40 is formed. The mirror 41 and the hard mask 45 at the bottom thereof are supported by the post 40 in the center portion, and both sides thereof are formed horizontally on the actuator 31 via the second air gap 43. The mirror 41 reflects light incident from a light source (not shown) at a predetermined angle.

Hereinafter, a method of manufacturing the above-described thin film type optical path control apparatus will be described with reference to the drawings.

3A to 3C are diagrams for describing a method of manufacturing the apparatus shown in FIGS. 1 and 2.

Referring to FIG. 3A, a device isolation layer 6 is formed on a substrate 1, which is an n-type doped silicon wafer, by using a silicon partial oxidation method (LOCOS) to distinguish an active region from a field region. Subsequently, after the gate 4 made of a conductive material such as polysilicon is formed on the active region, the substrate 1 is formed by forming a p ⁺ source 3 and a drain 2 using an ion implantation process. M-N (M, where N is an integer) P-MOS transistors 5 are formed on the substrate.

After the insulating film 7 made of oxide is formed on the substrate 2 on which the P-MOS transistor 5 is formed, each of the upper portions of the source 3 and the drain 2 is exposed by using a photolithography method. Form a hole (not shown). Subsequently, after depositing the first metal layer 8 made of titanium, titanium nitride, tungsten, nitride, or the like on the resultant, the first metal layer 8 is patterned by photolithography. The patterned first metal layer 8 includes a drain pad extending from the drain 2 of the P-MOS transistor 5 to the first anchor 21.

On top of the substrate 1 on which the first metal layer 8 and the transistor 5 are formed, there is a first protective layer 9 which prevents damage to the substrate 1 containing the transistor 5 during the subsequent process. Is formed. The first protective layer 9 is formed of a silicate glass (PSG) to have a thickness of 8000 kPa by chemical vapor deposition (CVD).

Since the light incident from the light source is incident on the upper portion of the first protective layer 9 as well as the mirror 41, but not at the portion covered by the mirror 41, a photocurrent flows through the active matrix 16. The second metal layer 10 is formed to prevent the malfunction. The second metal layer 10 is composed of a titanium layer and a titanium nitride layer. The titanium layer is formed to a thickness of 300 kW using a sputtering method, and the titanium nitride layer is formed to have a thickness of 1200 kW using a physical vapor deposition (PVD) method on the titanium layer. Subsequently, a portion of the second metal layer 10 in which the via hole 38 is to be formed in a subsequent process, that is, a portion in which the drain pad of the first metal layer 8 is formed is etched to be etched into the second metal layer 30. (Not shown).

On top of the second metal layer 10 a second protective layer 12 is laminated which prevents damage to the substrate 1 and the resulting products formed on the substrate 1 during subsequent processing. The second protective layer 12 is formed of a silicate glass (PSG) to have a thickness of 2000 kPa by chemical vapor deposition.

An etch stop layer 13 is stacked on top of the second passivation layer 12 to prevent the second passivation layer 12 and the results on the active matrix 16 from being etched due to a subsequent etching process. The etch stop layer 13 is made of low temperature oxide (LTO) such as silicon oxide (SiO ₂ ) or phosphorus pentoxide (P ₂ O ₅ ). The etch stop layer 13 is formed to have a thickness of 0.2 to 0.8 μm at a temperature of 350 to 450 ° C. by low pressure chemical vapor deposition (LPCVD). Accordingly, the substrate 1 having the transistor 5 embedded therein, the first metal layer 8, the first protective layer 9, the second metal layer 10, the second protective layer 12, and the etch stop layer 13 may be removed. The active matrix 16 is completed.

The first sacrificial layer 14 is stacked on the etch stop layer 13. The first sacrificial layer 14 is formed of polysilicon so as to have a thickness of 2.0 to 3.0 μm by low pressure chemical vapor deposition (LPCVD) at a temperature of 500 ° C. or less. Subsequently, the surface of the first sacrificial layer 14 is polished using a chemical mechanical polishing (CMP) method to planarize the surface of the first sacrificial layer so as to have a thickness of 1.1 mu m. Subsequently, after applying and patterning a first photoresist (not shown) on top of the first sacrificial layer 14, the first photoresist is used as a mask to form a lower portion of the first sacrificial layer 14. The first anchor 21 and the second supporting the support layer 19 formed later by etching a portion where the hole of the second metal layer 10 and portions adjacent to both sides are etched to expose a portion of the etch stop layer 13. Make the position where anchors 22a and 22b are to be formed. Accordingly, the etch stop layer 13 is exposed in the shape of three squares spaced apart by a predetermined distance. Then, the first photoresist is removed.

The first layer 17 is stacked on the upper portion of the etch stop layer 13 and the first sacrificial layer 14 exposed in the shape of a rectangle as described above. The first layer 17 is formed to have a thickness of 0.1 to 1.0 μm of a hard material such as nitride or metal by low pressure chemical vapor deposition (LPCVD). The lower electrode layer 23 is stacked on top of the first layer 17. The lower electrode layer 23 is formed of a metal such as platinum (Pt), tantalum (Ta), or platinum-tantalum (Pt-Ta) to have a thickness of 0.1 to 1.0 μm using a sputtering method or a chemical vapor deposition method. A second layer 25 made of a piezoelectric material is stacked on the lower electrode layer 23. The second layer 25 is formed to have a thickness of 0.4 μm by sputtering PZT prepared by the sol-gel method. Subsequently, the piezoelectric material constituting the second layer 25 is subjected to heat treatment by a rapid heat treatment (RTA) method to cause phase shift. The upper electrode layer 28 is stacked on top of the second layer 25. The upper electrode layer 28 is formed of a metal such as platinum, tantalum, silver (Ag), or platinum-tantalum to have a thickness of 0.1 to 1.0 µm using a sputtering method or a chemical vapor deposition method.

Referring to FIG. 3B, after applying and patterning a second photoresist (not shown) on the upper electrode layer 28, the upper electrode layer 28 has a rectangular plate shape using the upper electrode layer 28 as a mask. After patterning the first and second upper electrodes 29 and 30 side by side separated by a predetermined distance, the second photoresist is removed.

Subsequently, the second layer 25 is patterned in the same manner as the patterning of the upper electrode layer 28 to form a rectangular flat plate, and the first and second deformed layers formed side by side with a predetermined distance apart from each other. To form (26, 27). In this case, as shown in FIG. 1, the first and second deformable layers 26 and 27 are patterned to have a rectangular flat plate having a slightly larger area than the first and second upper electrodes 29 and 30, respectively. . Subsequently, the lower electrode layer 23 is patterned in the same manner as the patterning of the upper electrode layer 28 to have a mirror-shaped 'c' shape for the support line 20 formed later, and the first anchor 21 is To form a lower electrode 24 having protrusions formed stepwise. In this case, the two arms of the lower electrode 24 have a rectangular planar shape with a larger area than the first and second deforming layers 26 and 27, respectively. In addition, when the lower electrode layer 23 is patterned, the common electrode line 32 is formed simultaneously with the lower electrode 24 in a direction perpendicular to the lower electrode 24 on one side of the first layer 17. The common electrode line 32 is formed to be spaced apart from the lower electrode 24 by a predetermined distance on the support line 20 formed later.

Subsequently, the first layer 17 is patterned to form a support element 18 comprising a support layer 19, a support line 20, a first anchor 21 and second anchors 22a, 22b. . At this time, both sides of the portion of the first layer 17 contacting the etch stop layer 13 exposed in the shape of the three quadrangles are second anchors 22a and 22b, and the center portion of the first anchor 21 ) Each of the first anchor 21 and the second anchors 22a and 22b has a rectangular box shape, and a hole of the second metal layer 10 and holes of the first metal layer 8 are disposed below the first anchor 21. A drain pad is formed.

Subsequently, a third photoresist (not shown) is applied and patterned on top of the support element 18 and the actuator 31 to form the first and second upper portions from the common electrode line 32 formed on the support line 19. A portion of the electrodes 29 and 30 are exposed. At this time, even the protrusion of the lower electrode 24 is exposed together from the first anchor 21. Subsequently, the first strained layer 26 and the lower electrode 24 are removed from a part of the first upper electrode 29 by depositing and patterning amorphous silicon or silicon oxide or phosphorus pentoxide, which is a low temperature oxide, on the exposed portion. The first insulating layer 34 is formed up to a part of the support layer 19, and at the same time, the support layer 19 is formed through the second strained layer 27 and the lower electrode 24 from a part of the second upper electrode 30. The second insulating layer 35 is formed to a part. The first and second insulating layers 34 and 35 are formed to have a thickness of 0.2 to 0.4 탆, respectively, using low pressure chemical vapor deposition (LPCVD).

The first anchor 21, the etch stop layer 13, and the second anchor 21 are formed from a central portion of the first anchor 21, which is a portion where the hole of the second metal layer 10 and the drain pad of the first metal layer 8 are formed below. After the protective layer 12 and the first protective layer 9 are etched to form the via hole 38 to the drain pad, the via contact 39 is formed from the drain pad to the protrusion of the lower electrode 24 through the via hole 38. ). At the same time, the first upper electrode connecting member 36 is formed from the first upper electrode 29 to the common electrode line 32 through a part of the first insulating layer 34 and the supporting layer 19, and the second upper electrode. The second upper electrode connecting member 37 is formed from the 30 through the second insulating layer 35 and the support layer 19 to the common electrode line 32.

After the via contact 39 and the first and second upper electrode connecting members 36 and 37 are deposited with platinum, tantalum or platinum-tantalum having a thickness of 0.1 to 0.2 μm by sputtering or chemical vapor deposition, The deposited metal is formed by patterning. The first and second upper electrode connecting members 36 and 37 connect the first and second upper electrodes 29 and 30 to the common electrode line 32, respectively, and the lower electrode 24 connects the via contact 39. It is connected to the drain pad through.

Referring to FIG. 3C, a second sacrificial layer 42 is formed by spin coating an acfloflo on the actuator 31 and the support element 18, and forming a second sacrificial layer 42 on the second sacrificial layer 42. 4 After the photoresist 44 is applied, a hard mask 45 is formed on the upper portion thereof to have a thickness of about 3000 mm by using a sputtering method, and the hard mask 45 is formed by a conventional photolithography method. After patterning the 45, the fourth photoresist 44 and the second sacrificial layer 42 are patterned along the hard mask 45 pattern to support the line 20 of the lower electrode 24 having a mirror image. And a portion of the portion formed in parallel with each other (ie, the portion where the first and second upper electrodes 29 and 30 are not formed) are exposed to form a post hole.

Next, a metal such as aluminum (Al) having excellent reflectivity is deposited on the post hole and the hard mask 45 by sputtering or chemical vapor deposition, and the deposited metal is patterned to form a rectangular flat plate. Mirror 41 having a and a post 40 for supporting the mirror 41 is formed at the same time. After the second sacrificial layer 42 and the fourth photoresist are removed by plasma ashing, the first sacrificial layer 14 is removed using xenon fluoride (XeF ₂ ) or bromine fluoride (BrF ₂ ). And washing and drying treatments to complete the TMA element as shown in FIG.

However, in the above-described manufacturing method of the thin film type optical path control device, the second sacrificial layer and the photoresist are formed on the actuator and the support element, and the hard mask and the mirror are formed on the second sacrificial layer and the photoresist. During the removal of the resist, an internal stress caused by shrinkage of the second sacrificial layer and the photoresist causes a problem that the edge portion of the mirror formed thereon bends upward. As described above, a mirror curved at its periphery is difficult to constantly reflect light, and as a result, light efficiency is greatly lowered, resulting in a deterioration in image quality of an image projected on a screen.

Accordingly, it is an object of the present invention to provide a thin film type optical path control apparatus and a method for manufacturing the same, which can improve the horizontality of a mirror by releasing stress generated during mirror formation.

1 is a perspective view of a thin film type optical path adjusting device described in the applicant's prior application.

FIG. 2 is a cross-sectional view of the apparatus shown in FIG. _{1 taken along} lines A ₁ -A ₂ .

3A to 3C are manufacturing process diagrams of the apparatus shown in FIG.

Figure 4 is a perspective view of a thin film type optical path control apparatus according to the present invention.

FIG. 5 is a cross-sectional view of the apparatus shown in FIG. _{4 taken along} line B ₁ -B ₂ .

6A to 6F are manufacturing process diagrams of the apparatus shown in FIG.

<Explanation of symbols for main parts of the drawings>

100: active matrix 101: substrate

120: transistor 135: first metal layer

140: first protective layer 145: second metal layer

150: second protective layer 155: etch stop layer

160: first sacrificial layer 170: support layer

171: first anchor 172a, 172b: second anchor

174: support line 175: support element

180: lower electrode 190, 191: first and second strained layers

200, 201: first and second upper electrodes 210: actuators

220, 221: first and second insulating layers

230 and 231: first and second upper electrode connecting members

250: Post 260: Mirror

270: Beer Hall 280: Beer Contact

300: second sacrificial layer 310: second air gap

320: fourth photoresist 330: hard mask

340: stress control layer

In order to achieve the above object of the present invention, the present invention provides a method of manufacturing a thin film type optical path control device comprising the step of providing an active matrix, forming an actuator, forming a support element, and forming a mirror To provide. The active matrix includes a MOS transistor, and a first metal layer having a drain pad extending from the drain of the transistor is formed. The actuator and the support element may form a first sacrificial layer on the active matrix and pattern the pattern, and then form a first layer, a lower electrode layer, a second layer, and an upper electrode layer thereon, and then sequentially from the upper electrode layer. It is formed by patterning. The actuator includes first and second upper electrodes, first and second deformable layers, and a lower electrode, wherein the support element includes a support line, a support layer integrally formed with the support line, and the support line among the support layers. First anchors and second anchors respectively contacting the active matrix below the adjacent portion. The forming of the mirror may include forming a second sacrificial layer on the support means and the actuator, applying a photoresist on the second sacrificial layer, and then applying a temperature of about 170 to 190 ° C. to the photoresist. UV-curing, forming a hard mask on top of the photoresist, patterning the hard mask, and using the patterned hard mask to form part of the photoresist and second sacrificial layer. After etching to form a post hole, it is performed by forming a stress control layer and a mirror on top of the hard mask.

According to the present invention, after the photoresist is applied on the second sacrificial layer, ultraviolet curing is performed on a hot plate at about 170 to 190 ° C., and a hard mask and a stress control layer are formed thereon. And form a mirror. Accordingly, the polymers in the photoresist are crosslinked to increase resistance, thereby minimizing the stress applied to the mirror due to the contraction of the second sacrificial layer upon removal of the second sacrificial layer, thereby providing a flat mirror free from warpage. Can be formed.

Hereinafter, a thin film type optical path adjusting device according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

Figure 4 shows a perspective view of the thin film type optical path control apparatus according to the present invention, Figure 5 shows a cross-sectional view of the device of Figure 4 cut line B ₁ -B ₂ .

4 to 5, the thin film type optical path control apparatus according to the present invention includes an active matrix 100, a support element 175 formed on the top of the active matrix 100, and an actuator formed on the support element 175. 210 and a mirror 260 formed on the actuator 210.

The active matrix 100 includes a substrate 101 having M × N (M, N is an integer) P-MOS transistors 120, a drain 105 and a source 110 of the P-MOS transistors 120. Extending from the first metal layer 135 formed on the substrate 101, the first protective layer 140 formed on the first metal layer 135, and the second metal layer formed on the first protective layer 140. 145, a second passivation layer 150 formed on the second metal layer 145, and an etch stop layer 155 formed on the second passivation layer 150.

Referring to FIG. 4, the support element 175 includes a support line 174, a support layer 170, a first anchor 171, and second anchors 172a and 172b. The support line 174 and the support layer 170 are horizontally formed on the etch stop layer 155 via the first air gap 165. A common electrode line 240 is formed on a portion of the support line 174, and the support line 174 serves to support the common electrode line 240.

The support layer 170 has a rectangular annular shape, preferably a rectangular annular shape, and is integrally formed with the support line 174 along a direction orthogonal to the support line 174 in the same plane. The first anchor 171 is formed integrally with the two arms in the lower portion between the two arms horizontally extending in the direction orthogonal to the support line 174 of the support layer 170 having a rectangular ring shape to prevent the etching layer 155, and two second anchors 172a and 172b are formed integrally with the two arms at an outer lower portion of the two arms and attached to the etch stop layer 155. The first anchor 171 and the second anchors 172a and 172b each have the shape of a rectangular box.

The support layer 170 is centrally supported by the first anchor 171 and both sides are supported by the second anchors 172a and 172b, so that the cross-sections of the support layer 170 and the anchors 171, 172a and 172b As shown in FIG. 5, it has a 'T' shape.

The first anchor 171 is formed on a portion in which the drain pad of the first metal layer 135 is formed below the etch stop layer 155. In the central portion of the first anchor 171, the first metal layer may be formed through the etch stop layer 155, the second passivation layer 150, the holes (not shown) of the second metal layer 145, and the first passivation layer 140. The via hole 270 is formed to the drain pad of the 135, and the via contact 280 is formed inside the via hole 270.

The actuator 210 has a mirror-shaped 'c' shape with respect to the support line 174 and is formed on the support layer 170. The actuator 210 includes a lower electrode 180, a first strained layer 190, a second strained layer 191, a first upper electrode 200, and a second upper electrode 201. The lower electrode 180 has a mirror-shaped 'c' shape spaced apart from the support line 174 by a predetermined distance, and protruding portions are stepped toward the first anchor 171 on one side of the lower electrode 180. Are formed corresponding to each other. The protrusions of the lower electrode 180 extend to the periphery of the via hole 270 formed in the first anchor 171, respectively.

The via contact 280 is formed from the drain pad to the protrusion of the lower electrode 180 through the via hole 280 to electrically connect the drain pad and the lower electrode 180.

The two arms of the lower electrode 180 each have a shape of a rectangular plate, and the first and second deformable layers 190 and 191 each have a shape of a rectangular plate having a smaller area than the two arms of the lower electrode 180. And formed on top of two arms of the lower electrode 180. In addition, the first and second upper electrodes 200 and 201 have a shape of a rectangular plate having a smaller area than that of the first and second strained layers 190 and 191, respectively, and the first and second strained layers 190 and 191. It is formed at the top of the.

The first insulating layer 220 is formed from one side of the first upper electrode 200 to a part of the support layer 170 through the first strained layer 190 and the lower electrode 180, and the first upper electrode 200. The first upper electrode connecting member 230 is formed from one side of the first insulating layer 220 and the support layer 170 to the common electrode line 240. The first upper electrode connecting member 230 connects the first upper electrode 200 and the common electrode line 240 to each other, and the first insulating layer 220 may include the first upper electrode 200 and the lower electrode 180. They are connected to each other to prevent electrical shorts.

In addition, a second insulating layer 221 is formed from one side of the second upper electrode 201 to a part of the support layer 170 through the second deformable layer 191 and the lower electrode 180. The second upper electrode connecting member 231 is formed from one side of the second upper electrode 201 to the common electrode line 240 through a portion of the second insulating layer 221 and the support layer 170. The second insulating layer 221 and the second upper electrode connecting member 231 are formed to be parallel to the first insulating layer 220 and the first upper electrode connecting member 230, respectively. The second upper electrode connecting member 231 connects the second upper electrode 201 and the common electrode line 240 to each other, and the second insulating layer 221 is formed by the second upper electrode 201 and the lower electrode 180. They are connected to each other to prevent electrical shorts.

Post 250 for supporting the mirror in the portion of the lower '180' of the mirror-shaped '180' is not formed in the first and upper electrodes 200, 201, that is parallel to the support line 174 Is formed. The mirror 260 and the stress control layer 340 thereunder are centrally supported by the post 250, and both sides thereof are horizontally formed on the actuator 210 via the second air gap 310. A hard mask 330 is formed below the stress control layer 340 to accurately pattern the post 250. The mirror 260 serves to reflect light incident from a light source (not shown) at a predetermined angle.

Hereinafter, a method of manufacturing a thin film type optical path control device according to the present invention will be described in detail with reference to the accompanying drawings.

6A to 6F are diagrams for describing a method of manufacturing the apparatus shown in FIG. 5. 6A to 6F, the same reference numerals are used for the same members as in FIG.

Referring to FIG. 6A, a device isolation layer 125 is formed on a substrate 101, which is a wafer made of silicon doped with n-type, by using silicon partial oxidation (LOCOS) to distinguish between an active region and a field region. Subsequently, after forming the gate 115 made of a conductive material such as polycrystalline silicon doped with impurities on the active region, the p ⁺ source 110 and the drain 105 are formed by using an ion implantation process. M × N (M, N is an integer) P-MOS transistors 120 are formed on the substrate 101.

After forming the insulating film 130 made of oxide on the top of the resultant P-MOS transistor 120 is formed, by using a photolithography method on the insulating film 130, the top of one side of the source 110 and drain 105, respectively A hole (not shown) is formed to expose. Subsequently, the first metal layer 135 made of titanium, titanium nitride, tungsten, nitride, or the like is deposited on the insulating layer 130 on which the holes are formed, and then the first metal layer 135 is patterned by photolithography. The patterned first metal layer 135 includes a drain pad extending from the drain 105 of the P-MOS transistor 120 to the bottom of the first anchor 171 formed later.

The first passivation layer 140 is stacked on the substrate 101 on which the first metal layer 135 and the transistor 120 are formed. The first protective layer 140 is formed of a silicate glass (PSG) to have a thickness of about 8000 kPa using a chemical vapor deposition (CVD) method. The first protective layer 140 prevents the substrate 101 having the P-MOS transistor 120 from being damaged due to a subsequent process.

The second metal layer 145 is formed on the first protective layer 140. The second metal layer 145 forms a titanium layer having a thickness of about 300 mm by using a sputtering method of titanium, and then forms a titanium nitride layer on the titanium layer using a physical vapor deposition (PVD) method. It is completed by. Since the light incident from the light source is incident not only to the mirror 260 but also to a portion other than the portion covered by the mirror 260, the second metal layer 145 causes a photocurrent to flow in the active matrix 100, causing the device to malfunction. To prevent them. Subsequently, a portion of the second metal layer 145 in which the via hole 270 is to be formed in a subsequent process, that is, a portion in which the drain pad of the first metal layer 135 is formed is etched to form a hole in the second metal layer 145. (Not shown) to form wool.

The second passivation layer 150 is stacked on the second metal layer 145. The second protective layer 150 is formed of a silicate glass (PSG) to have a thickness of about 2000 kPa using a chemical vapor deposition method. The second protective layer 150 prevents the substrate 101 and the resulting products formed on the substrate 101 from being damaged during subsequent processing.

An etch stop layer 155 is stacked on the second passivation layer 150. The etch stop layer 155 prevents the resultant on the second passivation layer 150 and the substrate 101 from being etched due to the subsequent etching process. The etch stop layer 155 is made of low temperature oxide (LTO) such as silicon oxide (SiO ₂ ) or phosphorus pentoxide (P ₂ O ₅ ). The etch stop layer 155 is formed to have a thickness of about 0.2 to 0.8 μm at a temperature of about 350 to 450 ° C. using a low pressure chemical vapor deposition (LPCVD) method. Accordingly, an active layer including a substrate 101 having a transistor embedded therein, a first metal layer 135, a first passivation layer 140, a second metal layer 145, a second passivation layer 150, and an etch stop layer 155. The matrix 100 is completed.

The first sacrificial layer 160 is stacked on the etch stop layer 155. The first sacrificial layer 160 serves to facilitate stacking of the thin films constituting the actuator 210. The first sacrificial layer 160 is formed to have a thickness of about 2.0 to 3.0㎛ polysilicon using a low pressure chemical vapor deposition (LPCVD) method at a temperature of 500 ℃ or less. Subsequently, the surface of the first sacrificial layer 160 is polished using a chemical mechanical polishing (CMP) method to planarize the surface of the first sacrificial layer 160 to have a thickness of about 1.1 μm.

6B is a plan view illustrating a state in which the first sacrificial layer 160 is patterned. Referring to FIG. 7B, after applying and patterning a first photoresist (not shown) on the first sacrificial layer 160, the first sacrificial layer 160 is formed using the first photoresist as a mask. The lower portion of the second metal layer 145 (not shown) formed in the lower portion and the portions adjacent to both sides by etching to expose a portion of the etch stop layer 155, thereby supporting the support layer 170 formed later The position where the first anchor 171 and the second anchors 172a and 172b are to be formed is made. Thus, the etch stop layer 155 is exposed in the shape of three squares spaced apart by a predetermined distance. Subsequently, the first photoresist is removed.

Referring to FIG. 6C, the first layer 169 is stacked on the upper portion of the etch stop layer 155 and the first sacrificial layer 160 exposed in the shape of a rectangle as described above. The first layer 169 is formed to have a thickness of about 0.1 to 1.0 μm using a low pressure chemical vapor deposition (LPCVD) method of a hard material such as nitride or metal. First layer 169 is later patterned with support element 175 including support layer 170, support line 174 and anchors 171, 172a, 172b.

The lower electrode layer 179 is stacked on top of the first layer 179. The lower electrode layer 179 has a thickness of about 0.1 to 1.0 μm using a sputtering method or a chemical vapor deposition method on a metal having electrical conductivity such as platinum (Pt), tantalum (Ta), or platinum-tantalum (Pt-Ta). Form to have. The lower electrode layer 179 is later applied with a first signal (image signal) from the outside and patterned into a lower electrode 180 having a mirror-shaped 'c' shape.

A second layer 189 made of a piezoelectric material such as PZT or PLZT is stacked on the lower electrode layer 179. Preferably, the second layer 189 is formed to have a thickness of about 0.4 μm by spin coating PZT prepared by the sol-gel method. Subsequently, the piezoelectric material constituting the second layer 189 is subjected to heat treatment by a rapid heat treatment (RTA) method to perform phase change. The second layer 189 may be formed by the first strained layer 190 and the second upper electrode 210 and the lower portion which are deformed by a first electric field generated between the first upper electrode 200 and the lower electrode 180. It is patterned into a second strained layer 191 causing strain by a second electric field generated between the electrodes 180.

The upper electrode layer 199 is stacked on top of the second layer 189. The upper electrode layer 199 is formed to have a thickness of about 0.1 μm to 1.0 μm using a sputtering method or a chemical vapor deposition method of a metal having electrical conductivity such as platinum, tantalum, silver, or platinum-tantalum. The upper electrode layer 199 is later patterned with the first and second upper electrodes 200 and 201 to which second signals (bias signals) are respectively applied and spaced apart by a predetermined distance.

Referring to FIG. 6D, after applying and patterning a second photoresist (not shown) on the upper electrode layer 199, each of the upper electrode layers 199 may be squared using the second photoresist as a mask. The first upper electrode 200 and the second upper electrode 201 have a shape of a flat plate, preferably a rectangular flat plate, and are separated from each other by a predetermined distance and formed side by side. The second signal is applied to the first and second upper electrodes 200 and 201 through the common electrode line 240 formed later from the outside, respectively. Subsequently, the second photoresist is removed.

Subsequently, the second deformable layer 190 is patterned in the same manner as the method of patterning the upper electrode layer 199, each having a rectangular shape, and separated from each other by a predetermined distance and formed in parallel with each other. The second strained layer 191 is formed. In this case, as shown in FIG. 4, the first and second deformable layers 190 and 191 are patterned to have a rectangular flat plate shape slightly wider than the first and second upper electrodes 200 and 201, respectively.

Subsequently, the lower electrode layer 179 is patterned in the same manner as the patterning of the upper electrode layer 199 to have a mirror-shaped 'C' shape for the support line 174 formed later, and the first anchor 171 may be formed. Towards the lower electrode 180 having a protrusion formed in a stepped shape is formed. In this case, the two arms of the lower electrode 180 have the shape of a rectangular flat plate having a larger area than the first and second deforming layers 190 and 191, respectively.

In addition, when the lower electrode layer 179 is patterned, the common electrode line 240 is formed simultaneously with the lower electrode 180 in a direction perpendicular to the lower electrode 180 on one side of the first layer 169. The common electrode line 240 is formed to be spaced apart from the lower electrode 180 by a predetermined distance on the support line 174 formed later. Thus, the actuator 210 including the first and second upper electrodes 200 and 201, the first and second strained layers 190 and 191, and the lower electrode 180 is completed.

Subsequently, the first layer 169 is patterned to form a support element 175 comprising a support layer 170, a support line 174, a first anchor 171 and second anchors 172a and 172b. . At this time, both sides of the portion of the first layer 169 that contacts the etch stop layer 155 exposed in the shape of the three quadrangles become second anchors 172a and 172b, and the center portion of the first anchor 171 ) Each of the first anchor 171 and the second anchors 172a and 172b has a rectangular box shape, and a hole (not shown) and a first hole of the second metal layer 145 are disposed below the first anchor 171. The drain pad of the metal layer 135 is formed.

The first and second upper electrodes 200 and 201 are formed parallel to each other on top of two arms horizontally extending in a direction orthogonal to the support line 174 of the support layer 170, respectively. Accordingly, the first anchor 171 is formed below the lower electrode 180, and the second anchors 172a and 172b are formed below the outer electrode 180, respectively.

Subsequently, a third photoresist (not shown) is applied and patterned on top of the support element 175 including the support layer 170 and the support line 174 and on the actuator 210 to pattern the support line 174. A portion of the first and second upper electrodes 200 and 201 are exposed from the common electrode line 240 formed on the second electrode. At this time, the protrusions of the lower electrode 180 are also exposed together from the first anchor 171.

Subsequently, by depositing and patterning amorphous silicon or silicon oxide (SiO ₂ ) or phosphorus pentoxide (P ₂ O ₅ ), which is a low temperature oxide, on the exposed portion, a first part of the first upper electrode 200 may be formed. The first insulating layer 220 is formed to a part of the support layer 170 through the first strained layer 190 and the lower electrode 180, and at the same time, the second strained layer 191 is removed from a part of the second upper electrode 201. And a second insulating layer 221 to a part of the support layer 170 through the lower electrode 180. The first and second insulating layers 220 and 221 are formed to have a thickness of about 0.2 to 0.4 µm, and preferably about 0.3 µm, respectively, using low pressure chemical vapor deposition (LPCVD).

The first anchor 171 and the etch stop layer 155 are formed from the center of the first anchor 171, which is a portion where the hole of the second metal layer 145 and the drain pad 132 of the first metal layer 135 are formed. After the second protective layer 150 and the first protective layer 140 are etched to form the via hole 270 to the drain pad, the via to the protrusions of the lower electrode 180 through the via hole 270. Contact 280 is formed. At the same time, the first upper electrode connecting member 230 and the second upper electrode 201 extend from the first upper electrode 200 to the common electrode line 240 through a part of the first insulating layer 220 and the support layer 170. The second upper electrode connecting member 231 is formed from the second insulating layer 221 and the support layer 170 to the common electrode line 240.

The via contact 280 and the first and second upper electrode connecting members 230 and 231 are each deposited with platinum or platinum-tantalum to have a thickness of about 0.1 to 0.2 μm using a sputtering method or a chemical vapor deposition method. Then, the deposited metal is formed by patterning. The first and second upper electrode connecting members 230 and 231 connect the first and second upper electrodes 200 and 201 and the common electrode line 240, respectively, and the lower electrode 180 connects the via contact 280. It is connected to the drain pad through.

Referring to FIG. 6E, the second sacrificial layer 300 is formed on the actuator 210 and the support element 175 by using acuflo. This acuflow is applied on top of the actuator 210 and support element 175 using a spin coating method and subsequently removed using an ashing method.

Subsequently, after the fourth photoresist 310 is applied on the second sacrificial layer 300, a hot plate having a temperature of about 170 to 190 ° C., preferably about 180 ° C. Ultraviolet curing is performed on the fourth photoresist 310. When UV curing is performed on the fourth photoresist 310 as described above, the polymers in the fourth photoresist 310 are cross-linked while the solvent existing in the fourth photoresist 310 is removed. linking to increase resistance, and as a result, the second sacrificial layer 300 shrinks during the removal process of the second sacrificial layer 300 and the fourth photoresist 310. Since the strain applied to the stress can be minimized, the periphery of the mirror 260 can be prevented from bending upward.

Referring to FIG. 6F, a hard mask 330 is formed on the fourth photoresist 310. The hard mask 330 is formed to have a thickness of about 4000 to 6000 kPa, preferably about 5000 kPa using a sputtering method or a low pressure chemical vapor deposition method.

Subsequently, the hard mask 330 is patterned by a conventional photolithography method, and then the fourth photoresist 310 and the second sacrificial layer 300 are patterned along the hard mask 330 pattern to form a mirror image. By exposing a portion of the lower electrode 180 of the child that is not adjacent to the support line 174 and formed in parallel (ie, a portion where the first and second upper electrodes 200 and 201 are not formed thereon). Form a post hole.

Then, aluminum (Al) is deposited on the upper part of the post hole and the hard mask 330 by a sputtering method, and a stress control layer 340 having a thickness of about 4000 to 6000 mV, preferably a thickness of 5000 mV. ). The stress control layer 340 serves to relieve stress that occurs in the mirror 260 during the metal deposition process performed to form the mirror 260.

Subsequently, a metal such as aluminum (Al) having a reflective property is deposited on the stress control layer 340 to a thickness of about 0.1 to 1.0 μm using a sputtering method or a chemical vapor deposition method, and the deposited metal is patterned. As a result, a mirror 260 having a rectangular flat plate shape and a post 250 supporting the mirror 260 are simultaneously formed.

After the fourth photoresist 310 and the second sacrificial layer 300 are removed by plasma ashing, the first sacrificial layer 160 may be xenon fluoride (XeF ₂ ) or bromine fluoride (BrF). ₂ ), and the cleaning and drying treatments are performed to complete the TMA device as shown in FIG. As described above, when the fourth photoresist 310 and the second sacrificial layer 300 are removed, the second air gap 310 is formed at the positions of the second sacrificial layer 300 and the fourth photoresist 320. When the first sacrificial layer 160 is removed, the first air gap 165 is formed at the position of the first sacrificial layer 160.

According to the thin film type optical path control apparatus and the manufacturing method thereof according to the present invention, after the photoresist is formed on the second sacrificial layer, UV curing is applied to the photoresist on a hot plate having a temperature of about 170 to 190 ° C. Conduct. Therefore, since the solvent in the fourth photoresist is removed and the polymers in the fourth photoresist are crosslinked to increase resistance, the second sacrificial layer and the second sacrificial layer during the removal process of the second and fourth photoresist are performed later. Since the deflection stress applied to the mirror can be minimized due to the contraction, the peripheral portion of the mirror can be prevented from bending upward, thereby forming a flat mirror without bending. Accordingly, the light efficiency of the light incident on the mirror can be improved, and the image quality of the image projected on the screen can be improved.

As described above, although described with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified without departing from the spirit and scope of the invention described in the claims below. And can be changed.

Claims (2)

Providing an active matrix comprising a first metal layer having a MOS transistor embedded therein and having a drain pad extending from the drain of the transistor; After the first layer, the lower electrode layer, the second layer and the upper electrode layer are formed on the active matrix, the upper electrode layer, the second layer and the lower electrode layer are sequentially patterned to form the lower electrode, the first and the second modifications. Forming an actuator comprising a layer and first and second upper electrodes; Patterning the first layer to form support means; Forming a sacrificial layer on the support means and the actuator, and then applying a photoresist on the sacrificial layer; Performing UV-curing on the photoresist; Forming a hard mask on the photoresist, patterning the hard mask, and then patterning the sacrificial layer using the patterned hard mask to expose a portion of the lower electrode to form a post hole; Forming a stress control layer on the hard mask and the post hole; And Method of manufacturing a thin film type optical path control device comprising the step of forming a mirror on top of the stress control layer. The method of claim 1, wherein the ultraviolet curing of the photoresist is performed by irradiating the photoresist with ultraviolet rays on a hot plate at about 170 ° C. to 190 ° C. Way.