KR20000025635A - Method for isolating semiconductor device - Google Patents

Abstract

PURPOSE: A method for isolating a semiconductor device is provided which enables all devices on a wafer to have a uniform characteristics by obtaining a uniform pattern regardless of the subtle thickness change of a bottom substrate arisen from the light absorption characteristics. CONSTITUTION: A method for isolating a semiconductor device includes the steps of: forming a pad oxide(11), a pad nitride(12) and an amorphous silicon film(13) in sequence on a silicon substrate; forming a photoresist pattern(14) on the amorphous silicon substrate; and defining an isolation region of the silicon substrate by using the photoresist pattern as a mask to etch the pad oxide, the pad nitride and the amorphous silicon film. The method uses the amorphous silicon film as a light absorbing film. By the method, all devices fabricated on the wafer have a uniform characteristics.

Description

Separation Method of Semiconductor Device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for separating semiconductor devices, and more particularly to a device separation method using amorphous silicon as a light absorption film.

In the semiconductor manufacturing process, as the demand for high integration increases, the minimum line width gradually decreases, and accordingly, the exposure wavelength used in the exposure process also becomes shorter, so that a KrF excimer laser having a 248 nm wavelength to form a minimum line width of 0.2 μm is used. ) Is used as the light source.

Currently, in device isolation technology using LOCOS (Local Oxidation of Silicon) or STI (Shallow Trench Isolation) process, the part where active device is to be formed uses a stack structure of pad nitride film / oxide film to prevent thermal oxidation. Doing. The device isolation process is the first step on a silicon wafer without a pattern, and a dozens of pad oxide films are deposited to control the stress between the silicon and nitride films, and several hundreds or more of nitride films are deposited by CVD. The thicknesses of the deposited nitride film and the oxide film have a thickness difference of several tens to several hundred micrometers in the wafer. In an exposure process using a short wavelength of 248 nm or less, such a thickness difference causes a difference in intensity of reflected light reflected back to the photosensitive film. This causes a pattern size change. In this case, active device regions of different sizes are formed on the wafer due to the difference in the thickness of the nitride film and the oxide film, so that the reliability of the device is lowered. It is necessary. Silicon oxynitride film is a material that can control the exposure light in the semiconductor process. The refractive index and the absorbance at 248 nm vary depending on the composition of the polycrystalline silicon in the range of 1.7 to 2.1 and 0.1 to 1.5, respectively. It is also used as a reflection blocking film on metallic wiring materials. In addition, the silicon oxynitride film is used as a light absorption film for forming a uniform photoresist pattern in the device isolation process to reduce the change in reflectance to some extent, but in this case, the thickness should be at least 300 GPa and 1000 GPa. In addition, after the isolation pattern formation and dry etching, the process of compensating and removing dozens of silicon wall and bottom surface damaged by exposure to dry etching is performed and the device isolation oxide is filled by thermal oxide process or oxide deposition using high density plasma CVD. do. Since the composition of the oxynitride film is changed and the physical properties are modified through the high temperature thermal process, it is difficult to remove the silicon oxynitride film remaining on the nitride film by dry or wet etching using BOE or phosphoric acid before removing the pad nitride film. As it is not easy, it interferes with effective device separation.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and by using trench isolation using amorphous silicon as a light absorption film, a uniform pattern is obtained regardless of the minute thickness change of the lower substrate by the high light absorption characteristic of amorphous silicon. It is an object of the present invention to provide a method of separating a semiconductor device such that all devices on the wafer can have uniform characteristics.

1 is a graph showing a change in reflectivity of the photoresist film due to the thickness change of the lower silicon nitride film;

2A to 2I are process flowcharts showing a method of separating a semiconductor device according to the present invention.

* Description of the symbols for the main parts of the drawings *

1.Pad oxide 2.Pad nitride

3.Amorphous silicon film 4.Photosensitive film

5. Mask 6. Oxidized amorphous silicon film

7.Sacrifice oxide 8.Oxide

The semiconductor device separation method of the present invention for achieving the above object comprises the steps of sequentially forming a pad oxide film, a pad nitride film and an amorphous silicon film on a silicon substrate; Forming a predetermined photoresist pattern on the amorphous silicon film and etching the pad oxide film, the pad nitride film, and the amorphous silicon film by using the photoresist pattern as a mask to define a device isolation region of a silicon substrate.

In the present invention, in the STI device separation process, the light absorption film is formed of amorphous silicon having a high absorption coefficient for exposure light, thereby exhibiting a constant reflectance irrespective of the change in the thickness of the lower silicon nitride film, thereby making the pattern formation uniform, and providing an existing light absorption rate. In the case where the silicon oxynitride film having a (K) of 0.5 to 1.0 is used as the light absorption thin film, a photoresist pattern having a uniform size can be formed with a thin thickness of 50 to 300 kW, unlike the case where the thickness is 300 to 1000 mW or more. FIG. 1 shows the reflectance of the exposure light that is reflected back to the photosensitive film depending on the thickness of the pad nitride film when the light absorbing film (amorphous silicon, oxynitride film) is used or not. Two curves are shown between the pad nitride film and the photoresist film when the silicon oxynitride film is used and when the amorphous silicon is used. A small reflectance change according to the thickness of the nitride film forms a uniform pattern.

When the pad nitride film / oxide film is dry-etched using this photoresist pattern and then the photoresist film is removed and the silicon trench is etched while the amorphous silicon layer is exposed, the amorphous silicon and the crystalline silicon substrate have the same silicon properties. While the silicon substrate is etched, it is possible to completely remove the amorphous silicon layer present on the nitride film. In addition, even though the photoresist film remains during the silicon trench etching, even though an amorphous silicon layer remains on the nitride film after the silicon trench pattern etching, the silicon wall and the floor which were damaged during the dry etching by the high temperature (≥1000 ° C) thermal oxidation process The surface is compensated for and removed, wherein the amorphous silicon film used as the light absorption film is also oxidized. Since the thermal oxidation rate of amorphous silicon is similar to or slightly faster than the oxidation rate of crystalline silicon, the remaining physical properties of the thin amorphous silicon layer of 300 Å or less are sufficiently converted to an oxide film, which is then followed by APCVD or High Density Plasma CVD. The oxidized amorphous layer, similar to the deposited oxide layer, is completely removed during BOE or HF treatment, eliminating obstacles in the wet etching of the pad nitride layer. When the amorphous silicon layer is used as the light absorption film in the device isolation process, there is no inflow of impurities causing malfunction in the MOS transistor since it is a single silicon film, and unlike the case where the conventional silicon oxynitride film is used as the light absorption film, The removal of the light absorbing film is unnecessary because the silicon trench is removed in the etching process or converted into an oxide film in the high temperature thermal oxidation process.

A method of isolating a semiconductor device of 256 M DRAM or more according to an embodiment of the present invention by an STI process will be described next with reference to FIGS. 2A to 2F.

First, as shown in FIG. 2A, a pad oxide film 1 of 100 kPa or less is formed on the silicon substrate 10 to minimize stress between silicon and a nitride film, and a pad nitride film 2 of 1000 kPa or more is deposited thereon. In general, the pad oxide film is formed by a thermal oxidation process, and the pad nitride film is formed by a CVD process. An amorphous silicon film 3 having a thin thickness of 250 mW or less is deposited on the pad nitride film 2 with the light absorption film 3 having a high light absorption coefficient K. The deposition of amorphous silicon proceeds by chemical vapor deposition (CVD) or plasma-enhanced CVD (PECVD). In the case of depositing the amorphous silicon layer by CVD, it is considered to be as thin as possible in consideration of being oxidized in the subsequent thermal oxidation process, and in the case of PECVD, when considering the role of hard mask instead of photoresist in the trench dry etching process The deposition thickness is about 50 to 500 kPa in which exposure light cannot penetrate the lower nitride film. This embodiment describes a method of depositing amorphous silicon by PECVD. Inert gas such as S2SO4 or inert gas such as Ar (or He, H2, etc.) or hydrogen plasma to remove impurities present on the lower layer surface and increase adhesion to the lower layer before depositing the amorphous silicon thin film 3. The in-situ surface treatment process is performed using. At this time, the gas flow rate is 10-30000sccm, the processing temperature is in the range of room temperature ~ 600 ℃, the pressure of the reaction chamber is 0.01-10Torr, the power consumption is 0-10000W. In the case of using the same chamber as in amorphous silicon deposition, the process is performed at the same temperature as the amorphous silicon deposition temperature.

In case of amorphous silicon deposition, SiH4 or Si2H6 is used as the silicon source gas, and in order to improve the thickness uniformity or to reduce the deposition rate, dilute Ar gas, He gas, and hydrogen gas, and the high frequency power is 0-10000w, The deposition input is in the range of 0.01 to 10 Torr and the substrate temperature is in the range of room temperature to 600 ° C. The plasma generation frequency is 13.56 MHz. The amorphous condition of the silicon depends on the deposition conditions, and thus the refractive index at the exposure wavelength (the example of the present invention is 248 nm) is changed.

Next, as shown in FIG. 2B, the DUV photosensitive film 4 is applied onto the amorphous silicon layer 3, and then a DUV (Deep Ultraviolet) (248 nm) exposure process using the mask 5 is performed to separate the devices as shown in FIG. 2C. The photosensitive film pattern 4 is formed. In the exposure process, since the DUV photoresist film has a certain degree of light absorption, the thinner the photoresist film thickness, the smaller the line width pattern of 0.2 µm or less. Therefore, it is preferable to form the photosensitive film below 5000 kPa.

Subsequently, as shown in FIG. 2D, the thin amorphous silicon layer 3 on the pad nitride layer 2 is used as the mask by using the photoresist pattern 4 as a mask such as a reactive plasma dry etching gas (Cl 2 + Ar) or Ar (He). The pad nitride film 2 and the pad oxide film 1 are then selectively removed by a physical dry etching method using a non-reactive plasma using an inert gas.

Next, as shown in FIG. 2E, the silicon substrate is etched with Cl 2 or Cl 2 + Ar, which is a silicon dry etching gas, in order to form a trench of 2000 μm or more in the silicon substrate 10. When the silicon trench is etched, the photoresist pattern 4 may be used as an etch barrier, and after removing the photoresist pattern to remove both the amorphous silicon layer used as the light absorption film during the trench etching, the amorphous silicon layer is used as the etch barrier. Trench etching may be performed.

Subsequently, as shown in FIG. 2F, a sacrificial oxide film 7 containing O 2 or O 2 + H 2 O as a reaction gas was used to compensate for the single crystal silicon wall and the bottom surface damaged by the ions activated during the trench etching. The process of forming and removing two or more times is carried out. This thermal oxidation process removes defects on the surface of the silicon single crystal as described above, but rounds off the corners of the silicon etched surface, which is applied to the angular portion of the trench when electricity is applied to the finished MOS device. This is an essential process in the STI process because it can alleviate the problem of concentrated field. When the amorphous silicon layer used as the light absorption film remains after the trench etching of the silicon substrate, the amorphous silicon layer is oxidized during the thermal oxidation process and is modified into the silicon oxide film 6. Therefore, it has physical and chemical properties such as silicon oxide film by high density plasma CVD to be deposited in a subsequent process for trench filling and is easily removed during BOE process or CMP process. As such, in order for the amorphous silicon layer remaining in the thermal oxidation process for the trench surface compensation to be completely transformed into an oxide film, it is important to form a thinner deposition thickness of the amorphous silicon than the thickness of the trench silicon is oxidized.

Next, as shown in FIG. 2G, an oxide film by O3-TEOS USG (Undoped Slica Glass) or high density plasma CVD is formed on the entire surface of the substrate to fill the formed silicon trench without voids.

Subsequently, as illustrated in FIG. 2H, the silicon oxide film 8 deposited on the pad nitride film 2 is removed by polishing by a CMP process until the nitride film 2 is exposed. The oxidized amorphous silicon layer 6 can be polished at a similar speed as the silicon oxide film 8 deposited with a high density plasma. After the CMP process is finished, if the oxide film 6 remains on the nitride film 2 as shown in FIG. 2I due to the CMP polishing non-uniformity, the oxide film remaining by wet etching up to the pad nitride film 2 can be removed.

In the case of using the silicon oxynitride film, which is widely known as a thin film for reflection blocking, in the STI process instead of the amorphous silicon of the present invention, since the silicon oxynitride film has an intermediate characteristic of an oxide film, a nitride film, and an amorphous silicon, the trench is formed as a trench When the N is filled, two layers of an oxide film and an oxynitride film are left on the pad nitride film 2 as shown in FIG. 2G. Thus, the nitride film can be removed from phosphoric acid only after the wet etching of the oxide film such as BOE is performed. However, the etch selectivity between the oxide film and the oxynitride film in the BOE and the etch selectivity between the oxynitride film and the pad nitride film in phosphoric acid are ambiguous, which makes it difficult to set the respective wet etching times.

However, in the case of the amorphous silicon proposed by the present invention as the light absorbing film during the STI device separation process, a thin film of the light absorbing film was inserted between the DUV photosensitive film and the pad nitride film. The aspect ratio of the silicon trench with the line width can be reduced, and the device can be stably separated without the additional process of removing the light absorbing thin film by precise control of each process between the pad nitride film removal process after the pattern exposure process. .

The present invention can be applied to a device isolation process using LOCOS. In this case, a pad oxide film, a pad nitride film, and an amorphous silicon layer are sequentially formed on a silicon substrate, and then a photoresist pattern for patterning device isolation regions is formed thereon, and the amorphous silicon layer and the pad nitride film are formed using the photoresist pattern as a mask. The device oxide is defined by etching the pad oxide film. Subsequently, after removing the photoresist pattern and the amorphous silicon layer, a field oxidation process is performed to form an element isolation film. At this time, the field oxidation process is performed without removing the amorphous silicon layer so that the amorphous silicon layer is also oxidized during the field oxidation process, and then the oxidized amorphous silicon present on the pad nitride layer is removed with an oxide etching solution such as BOE or HF. You may.

In the present invention, amorphous silicon is used as the light absorption film on the pad nitride film. Accordingly, the high light absorption characteristic of the amorphous silicon allows a uniform pattern to be obtained regardless of the small thickness variation of the lower substrate with a thin thickness of 250 Å or less, so that all devices fabricated on the wafer can have uniform characteristics. In addition, since the amorphous silicon light absorbing film inserted for the exposure process is thin, it is removed during the trench etching, or oxidized itself during the oxidation process to compensate for the damaged silicon wall and the bottom surface during the etching process, thereby performing subsequent high density plasma CVD. It has the same physical and chemical properties as the silicon oxide film deposited using it, so it is easily removed during the BOE process or the CMP process, so no separate removal process is required.

Claims (24)

Sequentially forming a pad oxide film, a pad nitride film, and an amorphous silicon film on a silicon substrate; Forming a predetermined photoresist pattern on the amorphous silicon film; And Etching the pad oxide layer, the pad nitride layer, and the amorphous silicon layer using the photoresist pattern as a mask to define an isolation region of a silicon substrate Separation method of a semiconductor device comprising a. The method of claim 1, A method of separating a semiconductor device, wherein the amorphous silicon layer is formed to a thickness of about 50 to 300 Å. The method of claim 1, Separation method of the semiconductor device formed by depositing the amorphous silicon layer by CVD or PECVD. The method of claim 1, Separating the amorphous silicon layer is formed by using SiH4 or Si2H6 as a vapor deposition gas. The method of claim 4, wherein And diluting a predetermined amount of H 2 or an inert gas in SiH 4 or Si 2 H 6, which is a deposition gas, when forming the amorphous silicon layer, thereby controlling the crystallinity of amorphous silicon while increasing deposition uniformity or decreasing deposition rate. The method of claim 3, When depositing by the PECVD method, the amorphous silicon layer is formed in a temperature range of room temperature to 600 ℃. The method of claim 1, And treating the surface of the pad nitride layer using an inert gas or hydrogen plasma to remove impurities on the surface of the pad nitride layer before forming an amorphous silicon layer on the pad nitride layer. The method of claim 7, wherein The pad nitride film surface treatment is a semiconductor device separation method that proceeds in the range of room temperature to 600 ℃. The method of claim 1, And wet-cleaning the pad nitride film surface by using H2SO4 to remove impurities on the pad nitride film surface before forming an amorphous silicon film on the pad nitride film. The method of claim 1, After the step of defining the device isolation region of the silicon substrate by etching the pad oxide film, the pad nitride film and the amorphous silicon film using the photoresist pattern as a mask Etching the silicon substrate corresponding to the device isolation region to form a trench; Repeating the formation and removal of the thermal oxide layer at least twice to compensate for the trench side and bottom surfaces damaged during the trench etching; Forming an oxide film on the entire surface of the substrate; And Etching back the oxide layer until the pad nitride layer is exposed; Separation method of a semiconductor device further comprising. The method of claim 10, And separating the thermally oxidized film to about 150 microns thick. The method of claim 10, A method of separating a semiconductor device, wherein the etch back of the oxide film is performed using a CMP process. The method of claim 10, And separating the semiconductor device by using the remaining photoresist pattern as an etch barrier when the silicon substrate is etched. The method of claim 10, And removing the photoresist pattern during the silicon substrate etching, and then etching the substrate to remove the remaining amorphous silicon layer during the substrate etching. The method of claim 10, The method of claim 1, wherein the remaining amorphous silicon layer is also oxidized in the thermal oxide film forming process. The method of claim 15, And removing the oxide amorphous silicon layer by wet etching after the oxide etch back process. The method of claim 10, And forming the amorphous silicon layer thinner than the thermal oxide film formed on the inner surface portion of the trench. The method of claim 10, And removing the amorphous silicon layer on the pad nitride film completely during the etch back process of the oxide film. The method of claim 1, After the step of defining the device isolation region of the silicon substrate by etching the pad oxide film, the pad nitride film and the amorphous silicon film using the photoresist pattern as a mask Removing the photoresist pattern; Forming a field oxide film in the device isolation region through a LOCOS process. The method of claim 19, And removing the amorphous silicon layer remaining below the photoresist pattern, thereby forming a field oxide film. The method of claim 19, And the remaining amorphous silicon layer is also oxidized in the field oxide film forming process. The method of claim 21, And removing the oxidized amorphous silicon by wet etching after the field oxide film is formed. The method of claim 1, And the amorphous silicon layer is formed as a light absorbing layer for absorbing light during an exposure process for forming the photosensitive film pattern. The method of claim 1, Separating method of forming a semiconductor device to form a photosensitive film for the DUV.