CN110456451B - Preparation method of area thick film silicon nitride - Google Patents
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- CN110456451B CN110456451B CN201910750245.9A CN201910750245A CN110456451B CN 110456451 B CN110456451 B CN 110456451B CN 201910750245 A CN201910750245 A CN 201910750245A CN 110456451 B CN110456451 B CN 110456451B
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- 229910052581 Si3N4 Inorganic materials 0.000 title claims abstract description 30
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 title claims abstract description 30
- 238000002360 preparation method Methods 0.000 title claims abstract description 8
- 239000010410 layer Substances 0.000 claims abstract description 109
- 239000012792 core layer Substances 0.000 claims abstract description 94
- 238000005253 cladding Methods 0.000 claims abstract description 59
- 239000000463 material Substances 0.000 claims abstract description 37
- 238000000151 deposition Methods 0.000 claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 238000005530 etching Methods 0.000 claims abstract description 15
- 239000004065 semiconductor Substances 0.000 claims abstract description 13
- 238000000034 method Methods 0.000 claims description 41
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 24
- 239000000377 silicon dioxide Substances 0.000 claims description 11
- 239000007787 solid Substances 0.000 claims description 11
- 238000005229 chemical vapour deposition Methods 0.000 claims description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 7
- 229910052710 silicon Inorganic materials 0.000 claims description 7
- 239000010703 silicon Substances 0.000 claims description 7
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 6
- 238000001312 dry etching Methods 0.000 claims description 5
- 230000003647 oxidation Effects 0.000 claims description 4
- 238000007254 oxidation reaction Methods 0.000 claims description 4
- 238000001259 photo etching Methods 0.000 claims description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 229920005591 polysilicon Polymers 0.000 claims description 2
- 230000010354 integration Effects 0.000 abstract description 6
- 230000009286 beneficial effect Effects 0.000 abstract description 5
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 11
- 239000011162 core material Substances 0.000 description 7
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 6
- 235000012239 silicon dioxide Nutrition 0.000 description 6
- 230000008021 deposition Effects 0.000 description 5
- 238000005240 physical vapour deposition Methods 0.000 description 5
- 238000001039 wet etching Methods 0.000 description 5
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 4
- 238000005498 polishing Methods 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 4
- 238000005137 deposition process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/132—Integrated optical circuits characterised by the manufacturing method by deposition of thin films
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Optical Integrated Circuits (AREA)
Abstract
The invention provides a preparation method of area thick film silicon nitride, which comprises the following steps: sequentially forming a lower cladding and a sacrificial layer on the semiconductor substrate, wherein the height of the sacrificial layer is the same as the thickness of a preset waveguide device area; forming a plurality of core region grooves by taking the upper surface of the lower cladding layer as a stop layer; depositing a core layer material in the grooves of the plurality of core layer regions and on the sacrificial layer to form a first core layer, wherein the thickness of the first core layer is smaller than that of a preset waveguide device region; removing the redundant first core layer by taking the upper surface of the sacrificial layer as a stop layer; repeating the steps until the thickness of the formed core layer reaches the thickness of the preset waveguide device area; removing the sacrificial layer to form a plurality of core layer regions by taking the upper surface of the lower cladding layer as a stop layer, and etching the core layer regions to form a preset waveguide device structure; an upper cladding layer is formed on the predetermined waveguide structure and the lower cladding layer. The scheme solves the problem of high stress caused by too thick film, is beneficial to realizing high integration of the chip, and simultaneously solves the problem that direct grooving is not beneficial to preparing a high-integration waveguide device.
Description
Technical Field
The invention relates to the technical field of integrated optics, in particular to a preparation method of area thick film silicon nitride.
Background
At present, the methods for growing and preparing silicon nitride films mainly include LPCVD (low pressure chemical vapor deposition), PECVD (plasma chemical vapor deposition), and the like. Thicker film deposition can be realized by adopting PECVD, but the film has more impurities and poor compactness, and the waveguide prepared by the film has high transmission loss. The silicon nitride film deposited by LPCVD has good quality and low waveguide loss, but has the problem of high stress, and particularly, after the thickness of the film is more than 300 nanometers, the large-area growth is difficult to realize, a large number of cracks appear on the film, and the preparation of a high-performance device cannot be realized. In the existing production process, a dry etching process is usually adopted to open a groove in a silicon dioxide wrapping layer, and then a silicon nitride is filled in the groove to obtain a thick film silicon nitride optical waveguide, but when a silicon nitride device and a chip with high integration level are prepared, a plurality of silicon dioxide grooves with different widths and high densities are needed, which can cause the nonuniformity of CMP (chemical mechanical polishing), increase the difficulty of design and process, and simultaneously, direct opening of the groove can cause the problems of poor steepness, high roughness and the like of the side wall of the waveguide and the device.
Disclosure of Invention
In order to overcome the technical problem of high stress of a silicon nitride deposited thick film in the prior art and a plurality of process problems caused by groove digging, a preparation method of the regional thick film silicon nitride is further provided, so that different design requirements are met.
The invention provides a preparation method of area thick film silicon nitride, which comprises the following steps:
s1, sequentially forming a lower cladding layer and a sacrificial layer on the semiconductor substrate along the thickness direction of the semiconductor substrate, wherein the height of the sacrificial layer is the same as the thickness of the preset waveguide device region;
s2, taking the upper surface of the lower cladding as a stop layer, photoetching and etching the sacrificial layer, and forming a plurality of core layer region grooves in the sacrificial layer;
s3, depositing a core layer material in the grooves of the core layer regions and on the sacrificial layer to form a first core layer, wherein the thickness of the first core layer is smaller than that of the preset waveguide device region;
s4, taking the upper surface of the sacrificial layer as a stop layer, and removing the redundant first core layer by adopting a surface planarization process;
s5, repeating S3 and S4 until the thickness of the core layer formed in the grooves of the core layer regions reaches the thickness of the preset waveguide device region;
s6, taking the upper surface of the lower cladding as a stop layer, removing the sacrificial layer and forming a plurality of core layer regions;
s7, respectively etching the core layer regions, and forming a preset waveguide device structure in each core layer region;
and S8, forming an upper cladding layer on the preset waveguide device structure and the lower cladding layer.
Further, the material of the lower cladding is a solid cladding material with a refractive index lower than 1.7 and higher than 1.
Further, the solid cladding material is silica.
Further, the lower cladding layer is prepared using a thermal oxidation and/or chemical vapor deposition process.
Further, the sacrificial layer is formed by amorphous silicon or polysilicon deposition.
Further, the thickness of the waveguide device region is preset to be 350 nm to 1000 nm.
Further, the core layer material is any one of silicon nitride or silicon oxynitride.
Further, the thickness of the first core layer is 50 nm to 300 nm.
Further, when the plurality of core layer regions are etched, a dry etching process is adopted.
Further, in step S8, the upper cladding layer is deposited with a chemical vapor deposition process to form a solid cladding material with a refractive index lower than 1.7 and higher than 1.
Compared with the prior art, the invention has the following beneficial effects:
according to the invention, a plurality of core layer region grooves are formed in the sacrificial layer, namely a plurality of regions capable of preparing the waveguide device are formed, and then the core layer material is deposited layer by layer to reach the thickness of the preset waveguide device region, so that the problem of high stress caused by too thick film in the prior art deposition mode can be solved; in addition, the sacrificial layer is used as an isolation region, the formed multiple core layer regions are respectively etched, and multiple preset waveguide device structures are formed in each core layer region, so that the high integration of a chip is facilitated; in addition, the thickness of the sacrificial layer is easy to adjust through the sacrificial layer prepared by deposition, and the thickness of the finally required preset waveguide device area is determined by controlling the thickness of the sacrificial layer, so that the control on the structure thickness of the preset waveguide device is realized, different design requirements are met, and the method is more convenient and flexible; through removing the sacrificial layer, the mode of etching the sandwich layer region forms final waveguide device structure, compare in the silicon nitride that directly grows among the prior art and obtain, can realize thicker film growth on big wafer, solve the direct grooving simultaneously and be unfavorable for preparing the problem of high integration waveguide device.
Drawings
FIG. 1 is a schematic flow chart of a method for preparing a thick-film silicon nitride in an area according to an embodiment of the present invention;
fig. 2(1) to fig. 2(7) are schematic cross-sectional structures corresponding to the manufacturing process of the method for preparing area thick film silicon nitride according to the embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In this embodiment, as shown in fig. 1, a method for preparing a region thick film silicon nitride includes:
s1, sequentially forming a lower cladding layer and a sacrificial layer on the semiconductor substrate along the thickness direction of the semiconductor substrate, wherein the height of the sacrificial layer is the same as the thickness of the preset waveguide device region;
in addition to the above, in this embodiment, the semiconductor substrate may be a silicon substrate, and in another embodiment, the semiconductor substrate may be a quartz substrate.
Based on the above scheme, further, the lower cladding layer is formed by deposition through a thermal oxidation and/or chemical vapor deposition process, and in other embodiments, the lower cladding layer can also be formed through a physical vapor deposition process. The lower cladding material comprises a solid cladding material having a refractive index lower than 1.7 and higher than 1, preferably silica.
On the basis of the scheme, the sacrificial layer is formed by depositing amorphous silicon or polycrystalline silicon.
On the basis of the scheme, the thickness of the preset waveguide device region is 350-1000 nm, and the height of the sacrificial layer is 350-1000 nm as the height of the sacrificial layer is the same as the thickness of the preset waveguide device region.
S2, taking the upper surface of the lower cladding as a stop layer, photoetching and etching the sacrificial layer, and forming a plurality of core layer region grooves in the sacrificial layer;
s3, depositing a core layer material in the grooves of the core layer regions and on the sacrificial layer to form a first core layer, wherein the thickness of the first core layer is smaller than that of the preset waveguide device region;
in some embodiments, the first core layer is formed by any of a variety of deposition techniques, including Low Pressure Chemical Vapor Deposition (LPCVD), Atmospheric Pressure Chemical Vapor Deposition (APCVD), Plasma Enhanced Chemical Vapor Deposition (PECVD), Physical Vapor Deposition (PVD), sputtering, and other suitable deposition techniques.
On the basis of the above scheme, further, the core layer material includes silicon nitride. In other embodiments, the core material may also be silicon oxynitride.
On the basis of the scheme, the thickness of the first core layer is 50 nm to 300 nm.
S4, taking the upper surface of the sacrificial layer as a stop layer, and removing the redundant first core layer by adopting a surface planarization process;
on the basis of the above scheme, further, the surface planarization process specifically adopts Chemical Mechanical Polishing (CMP).
S5, repeating S3 and S4 until the thickness of the core layer formed in the grooves of the core layer regions reaches the thickness of the preset waveguide device region;
continuously depositing core layer materials in the grooves of the core layer regions and on the sacrificial layer to form a second core layer, removing redundant second core layers by using the upper surface of the sacrificial layer as a stop layer and adopting a surface planarization process, and continuously repeating S3 and S4 until the thickness of the core layer formed in the grooves of the core layer regions reaches the thickness of the preset waveguide device region when the total thickness of the first core layer and the second core layer in the grooves of the core layer regions is less than or equal to the thickness of the preset waveguide device region;
s6, taking the upper surface of the lower cladding as a stop layer, removing the sacrificial layer and forming a plurality of core layer regions;
s7, respectively etching the core layer regions, and forming a preset waveguide device structure in each core layer region;
on the basis of the scheme, a dry etching process is adopted when the plurality of core layer regions are etched.
And S8, forming an upper cladding layer on the preset waveguide device structure and the lower cladding layer.
On the basis of the scheme, the upper cladding in the step is formed by depositing a solid cladding material with the refractive index lower than 1.7 and higher than 1 by adopting a chemical vapor deposition process.
On the basis of the above embodiment, the upper cladding material and the lower cladding material are selected in accordance, and may be selected to be silica. In some embodiments, other solid cladding materials with refractive indices below 1.7 and above 1 may also be used.
The technical solution of this application will be described in detail by examples.
S1, sequentially forming a lower cladding layer and a sacrificial layer on the semiconductor substrate along the thickness direction of the semiconductor substrate, wherein the height of the sacrificial layer is the same as the thickness of the preset waveguide device region;
as shown in fig. 2(1), a thermal oxidation and/or chemical vapor deposition process may be used by those skilled in the art to deposit and form the lower cladding 201, wherein the material of the lower cladding 201 may be a solid cladding material with a refractive index lower than 1.7 and higher than 1, and the material used for the lower cladding 201 in this embodiment is preferably silica; sacrificial layer 202 is formed using a deposition process, which may be, for example, Low Pressure Chemical Vapor Deposition (LPCVD), Atmospheric Pressure Chemical Vapor Deposition (APCVD), Plasma Enhanced Chemical Vapor Deposition (PECVD), Physical Vapor Deposition (PVD), sputtering, and other suitable deposition techniques. The material adopted by the sacrificial layer 202 is preferably amorphous silicon; the material of the semiconductor substrate 200 may be a silicon substrate or a quartz substrate, and the material used for the semiconductor substrate 200 in this embodiment is preferably a silicon substrate.
Wherein the thickness of the waveguide device region is preset to be 350-1000 nm. Specifically, the thickness of the predetermined waveguide device region may be set according to specific needs, and is preferably 400 nm to 900 nm, and most preferably 500 nm to 700 nm. For example, the height may be any one of 350 nm, 400 nm, 500 nm, 700 nm, 900 nm or 1000 nm, the thickness of the predetermined waveguide device region in this embodiment is preferably 400 nm, and since the height of the sacrificial layer 202 is the same as the thickness of the predetermined waveguide device region, the height of the sacrificial layer 202 is 400 nm.
S2, taking the upper surface of the lower cladding as a stop layer, photoetching and etching the sacrificial layer, and forming a plurality of core layer region grooves in the sacrificial layer;
as shown in fig. 2(2), the specific steps of photolithography and etching the sacrificial layer 202 are as follows: the sacrificial layer 202 is sequentially subjected to photoresist coating, exposure, development, etching and dry photoresist removal to form a core layer region groove 203. The etching method for forming the core region trench 203 may specifically be dry etching. A plurality of core region trenches 203 are formed in the sacrificial layer 202.
S3, depositing a core layer material in the grooves of the core layer regions and on the sacrificial layer to form a first core layer, wherein the thickness of the first core layer is smaller than that of the preset waveguide device region;
as shown in fig. 2(3), a core layer material is deposited in the plurality of core layer region trenches 203 and on the sacrificial layer 202, the core layer material includes silicon nitride or silicon oxynitride, in this embodiment, silicon nitride is preferably used as the core layer material, a portion of the core layer material is deposited in the core layer region trenches 203, a portion of the core layer material is deposited on the sacrificial layer 202, and the core layer region trenches 203 are filled with silicon nitride by using a Low Pressure Chemical Vapor Deposition (LPCVD) process to form the first core layer 204, wherein the thickness of the formed first core layer 204 may be 50 nm to 300 nm, the thickness of the first core layer 204 is preferably 80 nm to 200 nm, and the thickness of the first core layer 204 is most preferably 100 nm to 150 nm, in this embodiment, the thickness of the first core layer 204 is 100 nm and is less than 400 nm of the predetermined waveguide device region.
S4, taking the upper surface of the sacrificial layer as a stop layer, and removing the redundant first core layer by adopting a surface planarization process;
as shown in fig. 2(4), the excess silicon nitride on the sacrificial layer 202 is removed by a surface planarization process, such as forming a final first core layer 204 in the core region trench 203. In this embodiment, the surface planarization process is specifically a Chemical Mechanical Polishing (CMP) method for planarization.
S5, repeating S3 and S4 until the thickness of the core layer formed in the grooves of the core layer regions reaches the thickness of the preset waveguide device region;
as shown in fig. 2(5), silicon nitride is deposited in the core region trench 203 by a Low Pressure Chemical Vapor Deposition (LPCVD) process several times, and excess silicon nitride is removed by Chemical Mechanical Polishing (CMP) until the thickness of the finally formed core layer 205 reaches 400 nm of the predetermined thickness of the waveguide device region.
S6, taking the upper surface of the lower cladding as a stop layer, removing the sacrificial layer and forming a plurality of core layer regions;
as shown in fig. 2(6), the excess sacrificial layer 202 is removed by wet etching to form a plurality of core regions 206.
The wet etching process comprises the following steps: the wet etching solution is determined according to the ratio of amorphous silicon in the sacrificial layer 202 and silicon dioxide in the lower cladding layer 201. Specifically, wet etching is performed using a diluted tetramethylammonium hydroxide (TMAH) solution. The etching rate of the selected wet etching solution to the amorphous silicon is greater than that to the silicon dioxide and the silicon nitride, so that the core layer 205 is not removed or only a small amount of the core layer 205 is removed while the residual sacrificial layer 202 is removed.
S7, respectively etching the core layer regions, and forming a preset waveguide device structure in each core layer region;
as shown in fig. 2(6) and fig. 2(7), the plurality of core regions 206 are dry etched to form a plurality of predetermined waveguide device structures 207.
And S8, forming an upper cladding layer on the preset waveguide device structure and the lower cladding layer.
As shown in fig. 2(7), finally, a solid cladding material with a refractive index lower than 1.7 and higher than 1 is deposited on the formed predetermined waveguide device structure 207 to form an upper cladding layer, in this embodiment, silica is specifically adopted, the upper cladding layer is formed by depositing silica on the predetermined waveguide device structure 207, and the upper cladding layer and the lower cladding layer 201 together form a cladding layer structure 208, and the deposition process conditions of the upper cladding layer are the same as the deposition method of the lower cladding layer 201, and are not described herein again.
The scheme provides a novel region dividing method, solves the problem of high stress caused by too thick film, is beneficial to realizing high integration of a chip, can realize thicker film growth on a large wafer, and simultaneously solves the problem that direct grooving is not beneficial to preparing a waveguide device with high integration level.
The above examples are merely illustrative of the preferred embodiments of the present invention and do not limit the spirit and scope of the invention. Various modifications and improvements of the technical solutions of the present invention may be made by those skilled in the art without departing from the design concept of the present invention, and the technical contents of the present invention are all described in the claims.
Claims (10)
1. A preparation method of area thick film silicon nitride is characterized by comprising the following steps:
s1, sequentially forming a lower cladding layer and a sacrificial layer on the semiconductor substrate along the thickness direction of the semiconductor substrate, wherein the height of the sacrificial layer is the same as the thickness of a preset waveguide device region;
s2, with the upper surface of the lower cladding as a stop layer, photoetching and etching the sacrificial layer, and forming a plurality of core layer region grooves in the sacrificial layer;
s3, depositing a core layer material in the grooves of the core layer regions and on the sacrificial layer to form a first core layer, wherein the thickness of the first core layer is smaller than that of the preset waveguide device region; the core layer material is silicon nitride;
s4, taking the upper surface of the sacrificial layer as a stop layer, and removing the redundant first core layer by adopting a surface planarization process;
s5, repeating S3 and S4 until the thickness of the core layer formed in the core layer region grooves reaches the thickness of the preset waveguide device region;
s6, taking the upper surface of the lower cladding as a stop layer, removing the sacrificial layer and forming a plurality of core layer regions;
s7, respectively etching the core layer regions, and forming a preset waveguide device structure in each core layer region;
and S8, forming an upper cladding layer on the preset waveguide device structure and the lower cladding layer.
2. The method of claim 1, wherein the lower cladding material is a solid cladding material with a refractive index of less than 1.7 and greater than 1.
3. The method of claim 2, wherein the solid cladding material is silica.
4. The method of claim 1, wherein the lower cladding layer is formed by thermal oxidation and/or chemical vapor deposition.
5. The method of claim 1, wherein the sacrificial layer is deposited from amorphous silicon or polysilicon.
6. The method of claim 1, wherein the predetermined waveguide device region has a thickness of 350 nm to 1000 nm.
7. The method for preparing area thick film silicon nitride according to claim 1, wherein the core layer material is any one of silicon nitride or silicon oxynitride.
8. The method of claim 1, wherein the first core layer has a thickness of 50 nm to 300 nm.
9. The method for preparing area thick film silicon nitride according to claim 1, wherein a dry etching process is adopted when etching the plurality of core layer areas.
10. The method of claim 1, wherein in step S8, the upper cladding layer is deposited with a solid cladding material having a refractive index lower than 1.7 and higher than 1 by a chemical vapor deposition process.
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| CN113471656B (en) * | 2021-05-31 | 2022-05-06 | 中国科学院微电子研究所 | Waveguide device and preparation method thereof |
| CN115084815A (en) * | 2022-05-22 | 2022-09-20 | 上海图灵智算量子科技有限公司 | Method for preparing T-shaped waveguide |
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| US8809199B2 (en) * | 2011-02-12 | 2014-08-19 | Tokyo Electron Limited | Method of etching features in silicon nitride films |
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