KR20000019886A - Lcd having anti static circuit and display testing method using thereof - Google Patents

Abstract

PURPOSE: An LCD having anti static circuit and display testing method using the circuit is provided to improve an anti static capability of an LCD and a detecting force of a display quality test by forming a path of an electrostatic occurred in a voluntary line. CONSTITUTION: A plurality of gate lines(G1,G2,G3,..,Gn) is horizontally formed on an insulating substrate(100). A plurality of data lines(D1,D2,D3,...,Dm) are vertically formed n the insulating substrate(100). Gate lines(G1,G2,G3,..,Gn) and data lines(D1,D2,D3,...,Dm) are connected to a COG IC(200). Ground lines(450,460,470,480) are crossed over gate lines(G1,G2,G3,..,Gn) and data lines(D1,D2,D3,...,Dm) and pads(410,420,430,440) are connected to the end of ground lines(450,460,470,480). Diodes(d1,d5,d19,d23) are connected from the ground line(450) to data lines(D1,D3) and gate lines(G2,G4) in a forward direction. Diodes(d2,d6,d20,d24) are connected from the ground line(460) to data lines(D1,D3) and gate lines(G2,G4) in a backward direction. Diodes(d3,d7,d17,d21) are connected from the ground line(470) to data lines(D1,D3) and gate lines(G2,G4) in a forward direction.

Description

Liquid crystal display device having static electricity protection circuit and display inspection method using this circuit

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having an electrostatic protection circuit and a method for testing the display quality of the liquid crystal display device.

A liquid crystal display device, which is a kind of flat panel display device, utilizes the characteristics of a liquid crystal whose light transmittance changes according to a voltage, and is widely used because it can be driven at a low voltage and power consumption is small.

Most of the manufacturing process of such a liquid crystal display device is performed on a glass substrate (glass). Because glass substrates are insulators, instantaneous charges cannot be dispersed below the substrate, making them very susceptible to static electricity. Therefore, the insulating film, the element, etc. formed in the glass substrate are likely to be damaged by static electricity, resulting in a defect of the liquid crystal display device.

In order to solve such a problem caused by static electricity, a method of tying all metal wires on a glass substrate by forming a short bar and a method of using an antistatic circuit using a nonlinear element are widely used.

The method of forming the shorting bar has a problem that the metal is exposed to the glass rim after the scribing process, and a thin non-conductive adhesive is applied to the glass rim to solve the problem. However, there remains a problem that this additional process is required and difficult to control the uniformity of the adhesive.

A method of using the antistatic circuit will be described with reference to FIGS. 1 and 2.

1 is a wiring diagram of a conventional liquid crystal display substrate, and shows a shorting bar structure.

As shown in FIG. 1, a plurality of gate lines 20 and data lines 30 are formed on the substrate 10 in the horizontal and vertical directions to prevent static electricity. At one edge of 10) they are all connected by shorting bars 40 and 41. In this case, the shorting bar 40 connecting the data line 30 and the shorting bar 41 connecting the gate line 20 may be connected 42 together. At the end of the shorting bar 40, a test pad 60 for applying a test signal is connected.

During the manufacturing process of the liquid crystal display substrate, the shorting bar 40 is grounded to dissipate static electricity generated in the data line 30 or the gate line 20 through the shorting bar 40, thereby reducing damage caused by static electricity.

The shorting bar 40 may also be used to inspect display defects and the like in the liquid crystal display substrate.

That is, when a predetermined signal is applied to the shorting bars 40 and 41, all the pixels are turned on at the same time. However, the signals are not transmitted to the defective pixel in the data line 30, the gate line 20, or the thin film transistor. The difference in brightness appears in the pixels.

On the other hand, in order to effectively discharge static electricity, an electrostatic protection diode 50 may be additionally connected to one or both ends of the data line 30 or the gate line 20 on each of the wirings 20 and 30.

FIG. 2 is a circuit diagram illustrating the electrostatic protection diode formed in FIG. 1, and the state connected to the ground line of the electrostatic protection diode is shown in detail.

1 and 2, diodes D1 and D2 are connected to the data lines 30 and the gate lines 20 in the forward and reverse directions, and the diodes 50 are connected to the same ground line 51. Is connected to. Therefore, the data shorting bar 40 and the gate shorting bar 41 as well as the diodes D1 and D2 are connected to each other.

In such a liquid crystal display substrate in which an electrostatic protection diode 50 is further formed, when a static electricity occurs in any one data line 30, the diode D1 connected to the data line 30 is turned on while being charged. Moves toward the ground line 51, and the charge moved along the ground line 51 turns on the diode D2 of the adjacent data line 30 to move along the adjacent data line 30. Locally generated charges gradually disappear as they move away in this manner.

Marking inspection on the substrate is done in the same manner as mentioned above.

After completion of the liquid crystal display inspection, the shorting bars 40 and 41 formed at the edge of the substrate 10 are removed by grinding along the cutting line C / L. However, in the case of a chip on glass (COG) method in which an integrated circuit (IC) is formed on the substrate 10, the shorting bars 40 and 41 are formed on the opposite side of the integrated circuit. Process is increased because it is to be removed by cutting rather than grinding.

In addition, the method using the antistatic circuit has a problem that it is impossible to detect when the data line and the data line are short because the same voltage is applied to all data lines.

As such, since the detection power is lowered, the panel is actually driven through a process of detecting defects, and thus, a large amount of time and manpower are put into the process, thereby increasing costs.

The present invention is to solve such a problem, to improve the electrostatic protection ability of the liquid crystal display device, and to increase the detection power of the display quality test.

1 is a substrate of a liquid crystal display device using a conventional shorting bar,

FIG. 2 illustrates the static electricity protection diode of FIG.

3 is a substrate of a liquid crystal display device having an electrostatic protection circuit of the present invention;

4 is a detailed view of an electrostatic protection circuit of the liquid crystal display device of the present invention;

Figure 5 shows the flow path of the static electricity of the static electricity protection circuit of the present invention,

6 is an electrostatic protection circuit of a liquid crystal display device having a different pad forming method according to the present invention;

7 illustrates an input clock pulse for inspection and an output voltage of a pixel of a liquid crystal display.

In order to achieve the above object, the liquid crystal display of the present invention includes a transparent insulating substrate, a plurality of data lines formed vertically on the substrate, a plurality of gate lines formed horizontally on the substrate, one end of the plurality of gate lines, and A plurality of ground lines crossing both ends of the plurality of data lines, the diode connected in a forward direction from the first ground line to the first gate line, the diode connected in a reverse direction from the second ground line to the first gate line, and a third The diode is connected in the forward direction from the ground line to the second gate line, and the diode is connected in the reverse direction from the fourth ground line to the second gate line.

In addition, the diode is connected in the forward direction from the first ground line to the first data line, the diode is connected in the reverse direction from the second ground line to the first data line, and the diode is connected in the forward direction from the third ground line to the second data line. The diode is connected in the reverse direction from the fourth ground line to the second data line.

In the inspection method of the liquid crystal display of the present invention, a signal having a predetermined potential is input to the first and third ground lines, and an inverted signal of the input signal of the first and third ground lines is input to the second and fourth ground lines, thereby providing a first gate. A potential difference is formed between the line and the second gate line, and a potential difference is formed between the first data line and the second data line.

Embodiments of the present invention will be described below with reference to the drawings.

3 shows a liquid crystal display device including the static electricity protection circuit of this embodiment.

4 shows an electrostatic protection circuit 300 connected to four gate lines and four data lines in detail.

As shown in FIG. 3 and FIG. 4, an embodiment of the present invention includes an insulating substrate 100, a COG IC 200, pads 410, 420, 430, 440, ground lines 450, 460, 470, 480, and a plurality of gate lines G1. , G2, G3, ... Gn, a plurality of data lines D1, D2, D3, ... Dm, and the static electricity protection circuit 300.

In the present embodiment, a plurality of gate lines G1, G2, G3, ... Gn are placed horizontally on the insulating substrate 100, and a plurality of data lines D1, D2, D3, ... are perpendicular to the gate line. .Dm) is placed vertically on the insulating substrate, and a plurality of gate lines G1, G2, G3, ... Gn and data lines D1, D2, D3, ... Dm are connected to the COG IC 200. Ground lines 450, 460, 470, and 480 are crossed across the plurality of gate lines G1, G2, G3, ... Gn and the plurality of data lines D1, D2, D3, ... Dn. The pads 410, 420, 430, and 440 are connected to ends of the ground wires.

As shown in FIG. 4, the static electricity protection circuit 500 has diodes d1, d5, d19, and d23 connected in a forward direction from the ground line 450 to the data lines D1 and D3 and the gate lines G2 and G4, respectively. The diodes d2, d6, d20, and d24 are connected in a reverse direction from the ground line 460 to the data lines D1 and D3 and the gate lines G2 and G4. In addition, the diodes d3, d7, d17, and d21 are forwardly connected from the ground line 470 to the data lines D2 and D4 and the gate lines G1 and G3, and the diodes d4, d8, d18, and d22 are connected to each other in the forward direction. The data lines D2 and D4 and the gate lines G1 and G3 are connected in the reverse direction from the ground line 480. The diodes d9 and d10 are connected in series in the forward direction from the ground line 460 to the ground line 450, and the diodes d11 and d12 are connected in series in the reverse direction from the ground line 460 to the ground line 450. The diodes d13 and d14 are connected in series in the forward direction from the ground line 470 to the ground line 480, and the diodes d15 and d16 are connected in series in the reverse direction from the ground line 470 to the ground line 480.

Hereinafter, an operation of the static electricity protection circuit of the liquid crystal display device including the static electricity protection circuit having the above structure will be described with reference to FIG. 5.

The operation of the static electricity protection circuit will be described, for example, when a static electricity is generated in the data line D1. When static electricity is generated in the data line D1, it flows along the path ① of FIG. 5 through the diode d2 of the passage of the current flow connected to the data line D1. Because the diode d1 is connected to the ground line in the reverse direction from the data line, current cannot flow, and the diode d2 is connected to the ground line 460 from the data line D1 in the forward direction, so that the static electricity is discharged to the ground line 450. Because it flows. Here, the ground lines 450, 460, 470, and 480 of the present embodiment are not grounded to the ground.

The static electricity flowing through the path ① cannot flow through the diodes d6, d20, and d24 because the diodes d6, d20, and d24 are connected in a reverse direction with respect to the ground line 460, and are connected in series with the diodes d9 and d10. ) Flows along the path ② because it is connected to the ground in the forward direction.

The static electricity flowing through the path ② flows to the ground line 450 through the path ③ to the diodes d19 and d23 connected in the forward direction, and flows along the path ⑥ through the diodes d1 and d5.

The static electricity flowing through the path ③ flows through the gate lines G2 and G4, and flows along the path ④ through the diodes d20 and d24 connected in a forward direction from the gate lines G2 and G4 to the ground line 460.

The static electricity flowing through the path ④ flows along the path ⑤ through the diodes d9 and d10 connected in a forward direction from the ground line 460 to the ground line 450.

Static electricity flowing along the path ⑤ flows from the ground line 450 to the data line D1 along the path ⑥ through the diode d1 connected in a forward direction from the ground line 450 to the data line D1.

The static electricity generated in the data line D1 returns to the data line D1 through the path described above.

Static electricity has a small amount of charge but a high instantaneous potential, and the electric charge is consumed while flowing through the above path, thereby lowering the potential. Therefore, even if static electricity is generated locally, it is prevented from being introduced into the panel and destroying the device.

Hereinafter, a display quality inspection method of a liquid crystal display using the present embodiment will be described with reference to the drawings. In addition, below, the operation | movement of four pixel is demonstrated and the inspection operation | movement of all the liquid crystal display devices is demonstrated.

The liquid crystal display of the present embodiment is used for display quality inspection. In this case, a predetermined signal is input to the pads 410, 420, 430, and 440 shown in Figs.

Fig. 7 shows the input signal for display quality inspection and the output voltage of the pixel in this embodiment.

As shown in FIG. 7, the same test signal is input to the pads 410 and 420 and the pads 430 and 440, respectively. As shown in FIG. 7, since the same signal is input to the pads 410 and 420, the same signal is simultaneously input to the data lines D1 and D3 and the gate lines G2 and G4, and the pads 430 and 440. Since the same signal is input to the data line, the same signal is input to the data lines D2 and D4 and the gate lines G1 and G3.

As a signal input to the pads 410 and 420, a clock pulse for switching 10V and -10V is applied as shown in FIG. Signals input to the pads 430 and 440 are signals in which the input signals of the pads 410 and 420 are inverted, as shown in FIG. As described above, an inverter may be connected to the pads by inputting signals in which the input signals are inverted to the pads 410 and 420 and the pads 430 and 440, which are illustrated in FIG.

Here, 10V and -10V can be changed according to the Vcom voltage. In this embodiment, it is assumed that Vcom is 0V.

As shown in FIG. 7, the data lines D1 and D3 and the gate lines G2 and G4 are pulse signals of the same type as the signals input to the pads 410 and 420, and the data lines D2 and D4. The signals input to the gate lines G1 and G3 are pulse signals of the same type as the signals input to the pads 430 and 440.

When such a test signal is input to the pad, the output voltages Va, Vb, Vc, and Vd of the pixel are as follows.

The output voltage Va of the pixel a is as follows. When the voltage of the gate G1 of the pixel a is 10V, the voltage of the data D1 of the pixel a is -10V, and the voltage of the data D1 of the pixel a when the voltage of the gate G1 of the pixel a is -10V. This is 10V. Therefore, in the former case, the TFT of the pixel a is turned on but the data input voltage is -10 V. Therefore, as shown in FIG. 7, the voltage Va of the pixel a is maintained at about -10 V. In the latter case, the TFT of the pixel a is turned on. Since the voltage Va of the pixel a is turned off, the charge held in the capacitor Ca of the pixel a is discharged to change to a voltage higher than -10V. As the above operation is repeated, the voltage Va of the pixel a becomes as shown in FIG.

The output voltage Vb of the pixel b is as follows. When the voltage of the gate G2 of the pixel b is 10V, the voltage of the data D1 of the pixel b is 10V. When the voltage of the gate G2 of the pixel b is -10V, the voltage of the data D1 of the pixel b is-. 10V. Therefore, in the former case, since the TFT of the pixel b is turned on and the data input voltage is 10 V, as shown in FIG. 7, the voltage Vb of the pixel b is maintained near 10 V. In the latter case, the TFT of the pixel b is turned off. The voltage Vb of the pixel b changes to a voltage lower than 10V as the charge held in the capacitor Cb of the pixel b is discharged. As the above operation is repeated, the voltage Vb of the pixel b becomes as shown in FIG. 7.

The output voltage Vc of the pixel c is as follows. When the voltage of the gate G1 of the pixel c is 10V, the voltage of the data D2 of the pixel c is 10V. When the voltage of the gate G1 of the pixel c is -10V, the voltage of the data D2 of the pixel c is-. 10V. Therefore, since the TFT of the pixel c is turned on in the former case and the input voltage of the data D2 is 10 V, the voltage Vc of the pixel c is maintained near 10 V as shown in FIG. Since is turned off, the voltage (Vc) of the pixel c is changed to a voltage lower than 10V as the charge held in the capacitor (Cc) of the pixel c is discharged. As the above operation is repeated, the voltage Vc of the pixel c becomes as shown in FIG. 7.

The output voltage Vd of the pixel d is as follows. When the voltage of the gate G2 of the pixel d is 10V, the voltage of the data D2 of the pixel a is -10V, and the voltage of the data D2 of the pixel a when the voltage of the gate G2 of the pixel a is -10V. This is 10V. Therefore, in the former case, the TFT of the pixel d is turned on, but since the input voltage of the data D2 is -10V, the voltage Vd of the pixel d is maintained at around -10V as shown in FIG. Since the TFT of is turned off, the voltage Vd of the pixel d changes to a voltage higher than -10 V as the charge held in the capacitor Cd of the pixel d is discharged. As the above operation is repeated, the voltage Vd of the pixel d becomes as shown in FIG. 7.

If the voltage input to the pad is as shown in Fig. 7, the output voltages Va, Vb, Vc, and Vd of the pixel voltage are as shown in Fig.7. That is, the output voltage Va of the pixel a is kept near -10V, the output voltage Vb of the pixel b continues to be around 10V, and the output voltage Vc of the pixel c is kept near 10V. The output voltage Vd of the pixel d is maintained near -10V. Therefore, the output voltage of the adjacent pixel becomes an inverted value. That is, the pixels a and b, the pixels b and c, and the pixels c and d represent inverted output voltages, respectively.

Therefore, if the adjacent lines between the pixels are normal, the pixels a and c and the pixels b and d show the same color when the Vcom voltage is 0V. However, if the line (data line or gate line) of the adjacent pixel is short, the output voltage of the pixel has a voltage close to 0V, and the output voltage of the pixel has little difference with the Vcom voltage, resulting in white defects. appear.

Therefore, it is easy to know whether the data line and the gate line between the pixels are shorted.

The embodiment of the present invention shows a case of four ground wires. It is not limited to this. In addition, the number of diodes of the present invention can be variously changed.

According to the present invention, it is possible to increase the electrostatic protection capability of the liquid crystal display device and to increase the detection power of the display quality test.

Claims (9)

With a transparent insulating substrate, A plurality of data lines formed vertically on the substrate; A plurality of gate lines horizontally formed on the substrate; A plurality of ground lines crossing one end of the plurality of gate lines and both ends of the plurality of data lines; A first diode connected in a forward direction from the first ground line to the first gate line, A second diode connected in a reverse direction from the second ground line to the first gate line, A third diode connected forward from the third ground line to the second gate line; And a fourth diode connected in a reverse direction from the fourth ground line to the second gate line. In claim 1, A fifth diode connected forward from the first ground line to the first data line; A sixth diode connected in a reverse direction from the second ground line to the first data line; A seventh diode connected forward from the third ground line to the second data line; And an eighth diode connected in a reverse direction from the fourth ground line to the second data line. In claim 1, A ninth diode connected in a forward direction from the first ground line to the second ground line to form a passage of electrostatic flow; And a tenth diode connected in a reverse direction from the first ground line to the second ground line to form a passage of the electrostatic flow. In claim 1, An eleventh diode connected in a forward direction from the third ground line to a fourth ground line to form a passage of static electricity; And a twelfth diode connected in a reverse direction from the third ground line to the fourth ground line to form a passage of the static electricity flow. In claim 4, The 9th, 10th, 11th and 12th diodes are a plurality of diodes connected in series in the same direction. In claim 1, And first, second, third and fourth pads are connected to the first, second, third and fourth ground lines. A transparent insulating substrate, a plurality of data lines formed vertically on the insulating substrate, a plurality of gate lines formed horizontally on the substrate, a plurality of ground lines crossing one end of the plurality of gate lines and both ends of the plurality of data lines, and A first diode connected in a forward direction from the first ground line to the first gate line, a second diode connected in a reverse direction from the second ground line to the first gate line, a third diode connected in a forward direction from the third ground line to the second gate line, and a fourth ground line In the liquid crystal display comprising a fourth diode connected in a reverse direction from the second gate line to Inputting a signal having a constant potential to the first and second ground lines; Simultaneously inputting an inverted signal of an input signal of the first and second ground lines to the third and fourth ground lines to cause a potential difference between the first gate line and a second gate line adjacent to the first gate line; Liquid crystal display inspection method. In claim 7, The liquid crystal display includes a fifth diode connected in a forward direction from a first ground line to a first data line, a sixth diode connected in a reverse direction from a second ground line to a first data line, and a fifth diode connected in a forward direction from a third ground line to a second data line. And a seventh diode and an eighth diode connected in a reverse direction from the fourth ground line to the second data line. And a potential difference is generated between the first data line and a second data line adjacent to the first data line. In claim 7, The signal input to the first and third ground lines is a clock pulse signal having a predetermined magnitude, and the signal input to the second and fourth ground lines is an inverted clock pulse signal of a signal input to the first and third ground lines. Method of inspection of the device.