KR20000011381A - Semiconductor device and method for fabricating the same - Google Patents

Abstract

PURPOSE: A semiconductor production method is provided to improve production shrinkage by improving an adhesive property of a Pt film, preventing a peeling off of a Pt film and restricting the number of particles sticking to the wafer. CONSTITUTION: The semiconductor is produced in the process of: step 1, an element separating film(14) forming on the surface of a silicon substrate by the LOCOS(Local Oxidation of Silicon) method; step 2, forming a transistor having a gate electrode(18) and a source/drain spreading layer(20); and step 3, forming a contact hole(23) in the interlayer insulation film(22) after flattening the surface of the interlayer insulation film by CMP(Chemical Mechanical Polishing) method.

Description

Semiconductor device and manufacturing method therefor {SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME}

The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a capacitor.

Ferro-electric Random Access Memory (FeRAM) is a nonvolatile semiconductor memory using a ferroelectric as a dielectric of a capacitor. FeRAM attracts great attention because of its high speed, low power consumption, and excellent repeatability.

In the process of forming the ferroelectric capacitor, oxygen annealing is performed to increase the crystallinity of the ferroelectric film after forming the electrode. Therefore, it is necessary to use a material for the electrode of the ferroelectric capacitor which is oxidized by oxygen annealing to lower its conductivity or does not deprive oxygen of the ferroelectric film to deteriorate the electrical characteristics of the capacitor. Al, Ti, W, and the like, which are widely used as electrode materials for general semiconductor devices, are not suitable as electrodes of ferroelectric capacitors because they are oxidized by oxygen annealing or take oxygen out of the ferroelectric film.

Therefore, it has been proposed to use Pt, which is a material which does not oxidize even by annealing in an oxygen atmosphere, as an electrode material of a ferroelectric capacitor.

However, in the case where Pt is used as the electrode of the ferroelectric capacitor, when a repetitive electric field is applied to the ferroelectric film, the residual polarization value decreases with the increase in the number of electric field applications, so that good fatigue characteristics are not obtained.

So, as the electrode material obtained in good fatigue characteristics, a metal oxide such as IrO ₂ has been proposed to use as an electrode of the ferroelectric capacitor. Metal oxides such as IrO ₂ are not oxidized by oxygen annealing to lower conductivity or deprive oxygen in the ferroelectric film to deteriorate the electrical characteristics of the capacitor.

However, when the IrO ₂ film is used as the lower electrode of the ferroelectric capacitor, electrical characteristics such as spontaneous polarization and leakage current of the ferroelectric capacitor are deteriorated. This is considered to be because the ferroelectric film having good crystallinity cannot be formed on the lower electrode made of this metal oxide because the metal oxide is inferior in crystallinity to that of ordinary metals. In the case where a metal oxide such as an IrO ₂ film is used as the upper electrode of the ferroelectric capacitor, when the upper electrode is brought into contact with wiring such as Al or TiN, Al or TiN takes oxygen from the upper electrode and oxidizes the contact resistance. This increases.

For this reason, when using a metal oxide as an electrode material, it is preferable to form the metal which does not oxidize even by annealing in oxygen atmosphere on a metal oxide. Therefore, an electrode having a Pt / IrO ₂ structure has been proposed. By using an electrode having a Pt / IrO ₂ structure, a capacitor having good electrical characteristics can be obtained, an increase in contact resistance can be prevented, and further, fatigue characteristics of the ferroelectric film can be improved.

However, since the Pt / IrO ₂ structured electrode has poor adhesion between the interface between the Pt film and the IrO ₂ film, the Pt film may peel off from the IrO ₂ film, which is a detrimental factor in improving the production yield of FeRAM. there was.

An object of the present invention is to provide a semiconductor device using a high adhesion electrode as an electrode of a capacitor and a manufacturing method thereof.

1 is a cross-sectional view showing a semiconductor device according to a first embodiment of the present invention.

Fig. 2 is a process sectional view (1) showing the method for manufacturing a semiconductor device according to the first embodiment of the present invention.

Fig. 3 is a cross sectional view (2) showing a method for manufacturing a semiconductor device according to the first embodiment of the present invention.

Fig. 4 is a cross sectional view (3) showing a method for manufacturing a semiconductor device according to the first embodiment of the present invention.

Fig. 5 is a process sectional view 4 showing the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

Fig. 6 is a cross-sectional view (1) showing a specific example of the electrode structure of the semiconductor device according to the first embodiment of the present invention.

Fig. 7 is a sectional view (2) showing a specific example of the electrode structure of the semiconductor device according to the first embodiment of the present invention.

8 is a sectional view of a semiconductor device according to a second embodiment of the present invention.

Fig. 9 is a cross sectional view (1) showing the method for manufacturing a semiconductor device according to the second embodiment of the present invention.

Fig. 10 is a process sectional view (2) showing the manufacturing method of the semiconductor device according to the second embodiment of the present invention.

11 is a schematic view showing a chamber of the sputter apparatus.

12 is a sectional view of a semiconductor device according to Modification Example 1 of the second embodiment of the present invention.

13 is a cross sectional view showing the manufacturing method of the semiconductor device according to the modification (1) of the second embodiment of the present invention.

14 is a time chart 1 when forming a PtO _X film.

15 is a time chart 2 when forming a PtO _X film.

Fig. 16 is a time chart 3 when forming a PtO _X film.

17 is a graph showing the number of particles when an Ir film or an IrO ₂ film is formed.

18 is a graph showing the number of particles when a Pt film or a PtO _X film is formed.

Fig. 19 is a sectional view of a semiconductor device according to the third embodiment of the present invention.

20 is a cross sectional view (1) illustrating the method of manufacturing the semiconductor device according to the third embodiment of the present invention.

Fig. 21 is a process sectional view (2) showing the manufacturing method of the semiconductor device according to the third embodiment of the present invention.

Fig. 22 is a sectional view of a semiconductor device according to a modification of the third embodiment of the present invention.

Fig. 23 is a sectional view of a semiconductor device according to the fourth embodiment of the present invention.

24 is a cross sectional view (1) showing the method for manufacturing a semiconductor device according to the fourth embodiment of the present invention.

Fig. 25 is a cross sectional view (2) showing a method for manufacturing a semiconductor device according to the fourth embodiment of the present invention.

Fig. 26 is a sectional view of a semiconductor device according to a modification of the fourth embodiment of the present invention.

[Description of the code]

8 … wafer

10... Semiconductor substrate

12... Device area

14. Device separator

16. Sidewall insulation film

18. Gate electrode

20... Source / Drain Diffusion Layer

22. Interlayer insulation film

23. Contact hall

24a, 24b... Conductor Flock

26. Silicon nitride film

28. Silicon oxide

29. SRO membrane

30. IrO ₂ membrane

31. PtO _X Membrane

31a. PtO _X Membrane

32. Ir film

33. PtIrO _X Membrane

33a... PtIrO _X Membrane

34. Pt film

36. Bottom electrode

36a... Bottom electrode

36b... Bottom electrode

36c... Bottom electrode

36d. Bottom electrode

36e... Bottom electrode

36f... Bottom electrode

38. Ferroelectric film

39. SRO membrane

40…. IrO ₂ membrane

41…. PtO _X Membrane

41a. PtO _X Membrane

42. Ir film

43. PtIrO _X Membrane

43a... PtIrO _X Membrane

44. Pt film

46. Upper electrode

46a. Upper electrode

46b... Upper electrode

46c... Upper electrode

46d. Upper electrode

46e... Upper electrode

46f... Upper electrode

48. Capacitor

48a... Capacitor

48b... Capacitor

48c... Capacitor

48d. Capacitor

48e... Capacitor

48f... Capacitor

50... Silicon oxide

52... Contact hall

54. Contact hall

56. Local wiring

58. Interlayer insulation film

60... Contact hall

62. Bit line

64. Barrier plate

66. Chamber

68. target

70... magnet

The object is a first conductive film that is an oxide film of a first metal, a second conductive film that is formed on the first conductive film and is the first metal, and is formed on the second conductive film and is the first metal. It is achieved by the semiconductor device characterized by including the electrode which has a 3rd conductive film containing the 2nd metal different from the other. Thereby, since the adhesiveness of a 3rd conductive film can be improved by having a structure which sandwiched the 2nd conductive film between a 1st conductive film and a 3rd conductive film, peeling of a 3rd conductive film can be prevented.

In the above semiconductor device, it is preferable that the electrode further has a fourth conductive film made of the first metal formed under the first conductive film. Thereby, since the adhesiveness of a 1st conductive film and a base layer can be improved by forming the 4th conductive film with favorable adhesiveness with a base layer under a 1st conductive film, adhesiveness of a base layer and an electrode can be improved.

In addition, the object includes a capacitor having a lower electrode, a dielectric film formed on the lower electrode, and an upper electrode formed on the dielectric film, wherein the lower electrode and / or the upper electrode is an oxide film of a first metal. A third conductive film formed on the first conductive film, the second conductive film formed on the first conductive film, and made of the first metal, and a second metal formed on the second conductive film and different from the first metal; It is achieved by the semiconductor device which has a conductive film. Thereby, since the adhesiveness of a 3rd conductive film can be improved by having a structure which sandwiched the 2nd conductive film between a 1st conductive film and a 3rd conductive film, peeling of a 3rd conductive film can be prevented. Therefore, the semiconductor device which used the high adhesive electrode as the electrode of a capacitor can be provided.

The above object is a first conductive film made of an oxide film containing a first metal, a second conductive film formed on the first conductive film and made of an oxide film containing a second metal different from the first metal; An electrode having a third conductive film formed on the second conductive film and containing the second metal is provided. Thereby, since the 2nd conductive film with a small film stress is formed, the number of particles adhering to a wafer can be suppressed and the manufacturing yield of a semiconductor device can be improved.

In the semiconductor device described above, it is preferable that the composition ratio of oxygen decreases as the second conductive film is separated from the interface with the first conductive film. Thereby, since it can suppress that the composition ratio of oxygen becomes discontinuous between a 2nd conductive film and a 3rd conductive film, the electrode which has favorable adhesiveness can be formed.

In addition, the object includes a capacitor having a lower electrode, a dielectric film formed on the lower electrode, and an upper electrode formed on the dielectric film, wherein the lower electrode and / or the upper electrode comprises an oxide film containing a first metal. And a second conductive film formed on the first conductive film, the second conductive film being an oxide film containing a second metal different from the first metal, and formed on the second conductive film. It is achieved by the semiconductor device characterized by having a 3rd conductive film containing a metal. Thereby, since the 2nd conductive film with a small film stress is formed, the number of particles adhering to a wafer can be suppressed and the manufacturing yield of a semiconductor device can be improved.

The above object is a process of forming a first conductive film made of an oxide film containing a first metal, and an oxide film formed on the first conductive film and containing a second metal different from the first metal. Fabrication of a semiconductor device having a step of forming a second conductive film in which a composition ratio of oxygen decreases as it is separated from an interface with a film, and a step of forming a third conductive film containing the second metal on the second conductive film. As a method, in the step of forming the second conductive film, the second conductive film is formed while reducing the oxygen concentration in the film formation chamber. This makes it possible to form a second conductive film in which the composition ratio of oxygen decreases as it falls away from the interface with the first conductive film, thereby preventing discontinuity in the composition ratio of oxygen between the second conductive film and the third conductive film. have. Therefore, the electrode which has favorable adhesiveness can be formed, and also the semiconductor device which has a capacitor with favorable adhesiveness can be manufactured.

EXAMPLE

[First Embodiment]

A semiconductor device and a manufacturing method thereof according to a first embodiment of the present invention will be described with reference to FIGS. 1 is a cross-sectional view showing a semiconductor device according to the present embodiment. 2 to 5 are process sectional views showing the method for manufacturing the semiconductor device according to the present embodiment.

(Semiconductor device)

The semiconductor device according to the present invention is applied to ferroelectric RAM, that is, FeRAM.

As shown in FIG. 1, an element isolation film 14 for partitioning the element region 12 is formed on the silicon substrate 10. In the device region 12 partitioned by the device isolation film 14, a transistor including a gate electrode 18 having a sidewall insulating film 16 formed on a side thereof, and a source / drain diffusion layer 20 is formed.

Further, an interlayer insulating film 22 having a film thickness of 400 nm is formed on the entire surface. A contact hole 23 reaching the source / drain diffusion layer 20 is formed in the interlayer insulating film 22, and conductor flocks 24a and 24b are formed in the contact hole 23.

On the interlayer insulating film 22, a stopper film 26 serving as a silicon nitride film having a film thickness of 100 nm and a silicon oxide film 28 having a film thickness of 100 nm are sequentially formed.

On the silicon oxide film 28, a lower electrode 36 having a Pt / Ir / Ir0 ₂ structure, which is formed by sequentially stacking an Ir0 ₂ film 30 having a thickness of 50 nm, an Ir film having a thickness of 50 nm, and a Pt film 34 having a thickness of 75 nm. ) Is formed. On the lower electrode 36, a ferroelectric film 38, which is a PbZr _X Ti _1-X O ₃ (PZT) film having a thickness of 300 nm, is formed. Although the composition ratio X of Zr can be 0.4, for example, the composition ratio X of Zr is not limited to 0.4, It can set suitably.

The Pt / Ir / Ir0 ₂ structure having a structure of 50 nm thick Ir0 ₂ film 40, 50 nm thick Ir film 42, and 75 nm thick Pt film 44 is sequentially stacked on the ferroelectric film 38. The upper electrode 46 is formed. The lower electrode 36, the ferroelectric film 38, and the upper electrode 46 constitute a memory capacitor 48.

The semiconductor device according to the present embodiment is characterized by the structure of the lower electrode 36 and the upper electrode 46. I.e., the lower electrode 36 is Ir0 ₂ film 30 is not to be phase to form a direct Pt film 34, a first Ir film 32 on the Ir0 ₂ film 30 is formed, and the Ir film (32 ), A Pt film 34 is formed. In this Pt / Ir / Ir0 ₂ electrode, since the Ir film 32, not the oxide film, is sandwiched between the Ir0 ₂ film 30 and the Pt film 34, the adhesion of the Pt film 34 can be improved. This can prevent the Pt film 34 from peeling off. Similarly, the upper electrode 46 also has a Pt / Ir / Ir0 ₂ structure, whereby the adhesion of the Pt film 44 can be improved, thereby preventing the Pt film 34 from peeling off.

Further, a silicon oxide film 50 having a thickness of 200 nm is formed on the entire surface. The silicon oxide film 50 is formed with a contact hole 52 reaching the upper electrode 46 and a contact hole 54 reaching the conductor plug 24a. In the silicon oxide film 50, local wirings 56 are formed to connect the upper electrode 46 and the conductor plug 24a through the contact holes 52 and 54.

Further, an interlayer insulating film 58 made of a silicon oxide film having a thickness of 300 nm is formed on the entire surface, and contact holes reaching the conductor flocks 24b are formed in the interlayer insulating film 58, the silicon oxide films 50 and 28, and the stopper film 26. 60 is formed. The bit line 62 is connected to the conductor flocks 24b through the contact holes 60.

As described above, according to the present embodiment, the Pt / Ir / Ir0 ₂ structure of the capacitor has a structure in which Ir is interposed between the Pt film and the Ir0 ₂ film to improve the adhesion of the Pt film, thereby preventing the Pt film from peeling off. can do.

(Manufacturing Method of Semiconductor Device)

Next, the manufacturing method of the semiconductor device according to the present embodiment will be described with reference to FIGS.

First, as shown in FIG. 2A, an element isolation film 14 that partitions the element region 12 is formed on the surface of the silicon substrate 10 by the LOCOS (LOCal Oxidation of Silicon) method.

Next, in the device region 12, a transistor including a gate electrode 18 having a sidewall insulating film 16 formed on its side and a source / drain diffusion layer 20 is formed (see Fig. 2A).

Next, an interlayer insulating film 22 having a thickness of 400 nm, which is a silicon oxide film, is formed on the entire surface by CVD (Chemical Vapor Deposition), and thereafter, an interlayer is formed by CMP (Chemical Mechanical Polishing). The surface of the insulating film 22 is planarized.

Next, a contact hole 23 reaching the source / drain diffusion layer 20 is formed in the interlayer insulating film 22 by a photolithography technique.

Next, a Ti film having a thickness of 20 nm and a TiN film having a thickness of 50 nm are sequentially formed on the entire surface by a sputtering method to form an adhesion layer composed of a Ti film and a TiN film. Next, a tungsten layer having a thickness of 1 m is formed on the entire surface by CVD.

Next, the tungsten layer and the adhesion layer are polished until the surface of the interlayer insulating film 22 is exposed by the CMP method, so that the conductive plugs 24a and 24b serving as the adhesion layer and the tungsten layer are formed in the contact hole 23. Form (see FIG. 2B).

Next, a silicon nitride film 26 having a thickness of 100 nm and a silicon oxide film 28 having a thickness of 100 nm are sequentially formed on the entire surface by CVD (see FIG. 2C).

Next, an IrO ₂ film 30 having a thickness of 50 nm is formed on the entire surface in an O ₂ atmosphere by a reactive sputtering method. As film formation conditions, for example, can execute a 0.5~5.0kW, O ₂ flow rate of the power by using the Ir as a target for 50~200sccm, the substrate temperature was room temperature ~500 ℃.

Next, an Ir film 32 having a thickness of 50 nm is formed on the entire surface in an Ar atmosphere by the sputtering method. As film formation conditions, for example, can execute a 0.5~5.0kW, O ₂ flow rate of the power by using the Ir as a target for 50~200sccm, the substrate temperature was room temperature ~500 ℃.

Next, a Pt film 34 having a thickness of 75 nm is formed on the entire surface in an Ar atmosphere by the sputtering method. For example, the film forming conditions can be 0.5 to 5.0 kW in power, 50 to 200 sccm in flow rate of O ₂ , and substrate temperature to room temperature to 500 ° C. using Pt as a target.

Next, a ferroelectric film 38, which becomes a PbZr _X Ti _1-X O ₃ (PZT) film, is formed on the entire surface by CVD (see FIG. 3A).

Next, an IrO ₂ film 40 having a thickness of 50 nm is formed in the same manner as in the case of forming the IrO ₂ film 30 on the entire surface.

Next, an Ir film 42 having a thickness of 50 nm is formed in the same manner as in the case of forming the Ir film 32 on the entire surface.

Next, in the same manner as the case where the Pt film 34 is formed on the entire surface, a Pt film 44 having a thickness of 75 nm is formed (see Fig. 3B).

Next, a Pt film 44, an Ir film 42, an IrO ₂ film 40, a ferroelectric film 38, a Pt film 34, an Ir film 32, and an IrO ₂ film 30 are formed by photolithography. Pattern. Accordingly, the lower electrode 36 having the Pt / Ir / IrO ₂ structure is formed of the IrO ₂ film 30, the Ir film 32, and the Pt 34, and the IrO ₂ film 40, the Ir film 42, The upper electrode 46 having the Pt / Ir / IrO ₂ structure is formed of Pt 44, and the capacitor 48 is composed of the lower electrode 36, the ferroelectric film 38, and the upper electrode 46 (FIG. 4a). Dry etching may be used for patterning, and etching conditions may use, for example, Cl ₂ and Ar as etching gases.

Next, a silicon oxide film 50 having a thickness of 200 nm is formed on the entire surface.

Next, a contact hole 52 that reaches the upper electrode 46 is formed in the silicon oxide film 50 by photolithography, and the conductor flocks 24a are formed in the silicon oxide films 50 and 28 and the silicon nitride film 26. A contact hole 54 is formed.

Next, a TiN film is formed over the entire surface. Thereafter, the TiN film is patterned using photolithography technology to form a local wiring 56 connecting the upper electrode 46 and the conductor flocks 24a through the contact holes 52 and 54 (see FIG. 4B).

Next, an interlayer insulating film 58 made of a silicon oxide film having a thickness of 300 nm is formed on the entire surface.

Next, a contact hole 60 reaching the upper surface of the conductor flocks 24b is formed in the interlayer insulating film 58, the silicon oxide films 50 and 28 and the silicon nitride film 26 by photolithography.

Next, an Al film with a film thickness of 600 nm is formed on the entire surface. Thereafter, the Al film is patterned to form bit lines 62 connected to the conductor flocks 24b through the contact holes 60 (see FIG. 5).

In this way, the semiconductor device according to the present embodiment is manufactured.

In the semiconductor device using the electrode of the proposed Pt / IrO ₂ structure, peeling of the electrode has arisen in the manufacturing process, for example in 2 or 3 wafers of 100 wafers. In contrast, in the semiconductor device according to the present embodiment, no peeling of the electrode occurred in the manufacturing process.

As described above, according to the present embodiment, since the upper electrode and the lower electrode have a Pt / Ir / IrO ₂ structure, that is, a structure in which Ir is interposed between the Pt film and the IrO ₂ film, the adhesion of the Pt film can be improved. You can prevent throwing away.

In addition, while the Pt / Ir / IrO ₂ structure is applied to both the upper electrode and the lower electrode of the capacitor, the Pt / Ir / IrO ₂ structure may not necessarily be applied to both the upper electrode and the lower electrode, for example, Pt. The Pt / Ir / IrO ₂ structure may be applied only to one electrode where the film is easily peeled off.

In the above description, the film thickness of the IrO ₂ film is 50 nm, the film thickness of the Ir film is 50 nm, and the film thickness of the Pt film is 75 nm. However, these film thicknesses are not limited to the above, and may be appropriately set.

Specific examples of the electrode structure of the capacitor will be described with reference to FIGS. 6 and 7. 6 and 7, components other than the capacitor 48 are omitted.

For example, in the capacitor of FIG. 6A, a Pt / IrO ₂ structure lower electrode 36 is formed by sequentially forming an IrO ₂ film 30 having a thickness of 50 nm and a Pt film 34 having a thickness of 200 nm. A 50 nm IrO ₂ film 40, a 50 nm Ir film 42, and a 75 nm Pt film 44 are sequentially formed to form an upper electrode 46 having a Pt / Ir / IrO ₂ structure. . A ferroelectric film 38 is formed between the lower electrode 36 and the upper electrode 46, and a capacitor 48 is formed of the lower electrode 36, the ferroelectric film 38, and the upper electrode 46. . That is, the capacitor of FIG. 6A applies the Pt / Ir / IrO ₂ structure only to the upper electrode 46.

In the capacitor of FIG. 6B, an IrO ₂ film 30 having a thickness of 50 nm, an Ir film 32 having a thickness of 50 nm, and a Pt film 34 having a thickness of 75 nm are sequentially formed to form a lower portion of the Pt / Ir / IrO ₂ structure. the electrode 36 is configured, and is a film by forming in order, the upper electrode 46 of Pt / IrO ₂ structure is configured to 50nm of the Pt film 44 of the IrO ₂ film 40, a film thickness of 200nm thickness. A ferroelectric film 38 is formed between the lower electrode 36 and the upper electrode 48, and the capacitor 48 is composed of the lower electrode 36, the ferroelectric film 38, and the upper electrode 46. . That is, the capacitor of FIG. 6B applies the Pt / Ir / IrO ₂ structure only to the lower electrode 36.

In the capacitor of FIG. 6C, an IrO ₂ film 30 having a thickness of 50 nm and a Pt film 34 having a thickness of 200 nm are sequentially formed to form a lower electrode 36 having a Pt / IrO ₂ structure, and has a film thickness of 50 nm. An IrO ₂ film 40 having a thickness of 50 nm and an Ir film 42 having a thickness of 200 nm and a Pt film 44 having a thickness of 200 nm are sequentially formed to form an upper electrode 46 having a Pt / Ir / IrO ₂ structure. A ferroelectric film 38 is formed between the lower electrode 36 and the upper electrode 48, and the capacitor 48 is composed of the lower electrode 36, the ferroelectric film 38, and the upper electrode 46. . That is, the capacitor of FIG. 6C thickens the film thickness of the Pt film 44 of the upper electrode 46 to 200 nm, compared to the capacitor shown in FIG. 6A. By increasing the thickness of the Pt film 44, the cross-sectional area of the upper electrode 46 can be increased, and accordingly the resistance of the upper electrode 46 can be reduced.

In the capacitor of FIG. 7A, an IrO ₂ film 30 having a thickness of 50 nm, an Ir film 32 having a thickness of 50 nm, and a Pt film 34 having a thickness of 200 nm are sequentially formed to form a lower portion of the Pt / Ir / IrO ₂ structure. The electrode 36 is constituted, and the upper electrode 46 of the Pt / IrO ₂ structure is formed by sequentially forming an IrO ₂ film 40 having a thickness of 50 nm and a Pt film 44 having a thickness of 200 nm. A ferroelectric film 38 is formed between the lower electrode 36 and the upper electrode 48, and the capacitor 48 is composed of the lower electrode 36, the ferroelectric film 38, and the upper electrode 46. . That is, the capacitor of FIG. 7A thickens the film thickness of the Pt film 34 of the lower electrode 36 to 200 nm compared to FIG. 6B. By increasing the thickness of the Pt film 34, the cross-sectional area of the lower electrode 36 can be increased, and thus the resistance of the lower electrode 36 can be reduced.

In the capacitor of FIG. 7B, an IrO ₂ film 30 having a thickness of 50 nm, an Ir film 32 having a thickness of 50 nm, and a Pt film 34 having a thickness of 75 nm are sequentially formed to form a lower portion of the Pt / Ir / IrO ₂ structure. The electrode 36 is constituted, and the upper electrode 46 is composed of an IrO ₂ film 40 having a thickness of 175 nm. A ferroelectric film 38 is formed between the lower electrode 36 and the upper electrode 48, and the capacitor 48 is composed of the lower electrode 36, the ferroelectric film 38, and the upper electrode 46. . That is, in the capacitor of FIG. 7B, the Pt / Ir / IrO ₂ structure is applied only to the lower electrode 36, and the upper electrode 46 includes only the IrO ₂ film 40. Since the upper electrode 46 is composed only of the IrO ₂ film 40, the manufacturing process can be simplified.

Thus, the electrode structure, the film thickness, and the like may be appropriately set in consideration of the structure of the semiconductor device, the electrical characteristics to be realized, and the like.

Second Embodiment

A semiconductor device and a manufacturing method thereof according to a second embodiment of the present invention will be described with reference to FIGS. 8A is a cross-sectional view showing the semiconductor device according to the present embodiment, and FIG. 8B is a schematic diagram showing the structure of a capacitor. 9 and 10 are cross-sectional views illustrating the method of manufacturing the semiconductor device according to the present embodiment. 11 is a schematic view showing a chamber of the sputter apparatus. The same components as those of the semiconductor device according to the first embodiment shown in FIGS. 1 to 7 and the manufacturing method thereof are denoted by the same reference numerals, and description thereof will be omitted or concise.

(Semiconductor device)

As shown in FIGS. 8A and 8B, on the silicon oxide film 28, an IrO ₂ film 30 having a thickness of 50 nm, a PtO _X film 31 having a thickness of 50 nm, and a Pt film 34 having a thickness of 200 nm are sequentially stacked. The lower electrode 36a having the constructed Pt / PtO _X / IrO ₂ structure is formed. The composition ratio X of oxygen in the PtO _X film 31 can be suitably set in the range of 0.1 to 2.0, for example.

On the lower electrode 36a, a ferroelectric film 38 made of a PbZrTiO ₃ (PZT) film having a thickness of 300 nm is formed. Although the composition ratio of the PZT film used for the ferroelectric film 38 can be Pb: Zr: Ti 110: 52: 48, for example, it is not necessarily limited to such a composition ratio, and an enemy composition ratio can be set.

On the ferroelectric film 38, a Pt / PtO _X / IrO ₂ structure formed by sequentially stacking an IrO ₂ film 40 having a thickness of 50 nm, a PtO _X film 41 having a thickness of 50 nm, and a Pt film 44 having a thickness of 200 nm was sequentially stacked. The upper electrode 46a is formed. The lower electrode 36a, the ferroelectric film 38, and the upper electrode 46a constitute a memory capacitor 48a.

The semiconductor device according to the present embodiment has a major feature in that an Ir film is not used for the lower electrode 36a or the upper electrode 46a.

That is, in the semiconductor device according to the first embodiment, Ir films 32 and 42 are used for the lower electrode 36 and the upper electrode 46 of the capacitor 48, and the Ir films 32 and 42 are formed by sputtering. Is formed by. When the Ir films 32 and 42 are formed on the semiconductor substrate 10, a sputtering apparatus having a chamber 66 as shown in FIG. 11 is generally used, but Ir expelled from the target 68 is only on the semiconductor substrate. In addition, it deposits on the adhesion board 64. The Ir film deposited on the adhesion plate 64 may peel off from the surface of the adhesion plate 64, and the peeled Ir film becomes particles (small particles) and adheres to the wafer 8. In this way, the particle | grains which become an Ir film adhering on the wafer 8 become a factor which reduces the manufacture yield of a semiconductor device.

It is considered that since the film stress of the Ir film is about 1 x 10 ¹¹ dynes / cm ² , the Ir film is likely to peel off from the anti-glare plate 64 when the Ir film is formed. The film stress of the IrO ₂ film is about 5 × 10 ¹⁰ dynes / cm ² , whereas about 1 × 10 ¹¹ dynes / cm ² is generated in the Ir film.

Therefore, in this embodiment, a PtO _X film having a small film stress is sandwiched between the Pt film and the IrO ₂ film without using an Ir film. Since the film stress of the PtO _X film is small as 5 x 10 ⁹ dynes / cm ² , the PtO _X film is hard to peel off from the adhesion plate 64. For this reason, according to the present embodiment, the particles can be prevented from adhering to the wafer, and the manufacturing yield of the semiconductor device can be improved.

(Manufacturing Method of Semiconductor Device)

Next, the manufacturing method of the semiconductor device according to the present embodiment will be described with reference to FIGS. 9 and 10.

First, since the process of forming the silicon oxide film 28 is the same as the method of manufacturing the semiconductor device according to the first embodiment shown in Figs. 2A to 2C, the description is omitted.

Next, an IrO ₂ film 30 having a thickness of 50 nm is formed on the entire surface in an O ₂ atmosphere by a reactive sputtering method. As film formation conditions, for example, can execute a 0.5~5.0kW, O ₂ flow rate of the power by using the Ir as a target for 50~200sccm, the substrate temperature was room temperature ~500 ℃.

Next, a PtO _X film 31 having a film thickness of 50 nm is formed over the entire surface in an Ar and O ₂ atmosphere by the reactive sputtering method. The film forming conditions can be, for example, Pt as a target, 50-200 kW of power, 50-200 sccm of Ar flow rate, 50-200 sccm of O ₂ flow rate, and substrate temperature of room temperature to 500 ° C. The O ₂ / Ar gas ratio X at the time of forming the PtO _X film 31 can be suitably set in the range of 0.1 to 2.0, for example.

Next, a Pt film 34 having a thickness of 200 nm is formed on the entire surface in an Ar atmosphere by the sputtering method. For example, the film forming conditions can be 0.5 to 5. kW in power, 50 to 200 sccm in Ar flow rate, and substrate temperature to room temperature to 500 ° C using Pt as a target.

Next, a ferroelectric film 38 formed of a PbZr _X Ti _1-X O ₃ (PZT) film having a film thickness of 300 nm is formed on the entire surface, for example, by a sol-gel method (see FIG. 9A). The raw material of a sol gel can use the thing made by Mitsubishi material, for example. Spin coat conditions can be 3000 rpm and 15 second. Moreover, 150 degreeC is dried for 10 minutes. Thereafter, an oven is used to anneal at 400 ° C. for 10 minutes in an oxygen atmosphere. By repeating this process five times, a PZT film with a thickness of 300 nm is formed. Next, the main firing of the PZT film is performed by RTA (Rapid Thermal Annealing) method. Annealing conditions can be made into 700 degreeC and 1 minute in oxygen atmosphere.

Next, an IrO ₂ film 40 having a thickness of 50 nm is formed in the same manner as in the case of forming the IrO ₂ film 30 on the entire surface.

Next, a PtO _X film 41 having a thickness of 50 nm is formed in the same manner as in the case of forming the PtO _X film 31 on the entire surface.

Next, a Pt film 44 having a thickness of 200 nm is formed in the same manner as in the case of forming the Pt film 34 on the entire surface (see Fig. 9B).

Next, the Pt film 44, the PtO _X film 41, the IrO ₂ film 40, the ferroelectric film 38, the Pt film 34, the PtO _X film 31 and the IrO ₂ film ( Pattern 30). As a result, the lower electrode 36a having the Pt / PtO _X / IrO ₂ structure is formed of the IrO ₂ film 30, the PtO _X film 31, and the Pt film 34, and the IrO ₂ film 40 and the PtO _X film An upper electrode 46a having a Pt / PtO _X / IrO ₂ structure is formed of the 41 and the Pt film 44, and the capacitor 48 is formed of the lower electrode 36a, the ferroelectric film 38, and the upper electrode 46a. Is configured (see FIG. 10). Dry etching may be used for patterning, and etching conditions may use, for example, Cl ₂ gas and Ar gas as etching gas.

Subsequently, the method of manufacturing the semiconductor device is the same as the method of manufacturing the semiconductor device according to the first embodiment shown in FIG. 4B or FIG. 5, and thus description thereof is omitted. In this way, the semiconductor device according to the present embodiment is manufactured.

(Variation example (1))

Next, the modification (1) of the semiconductor device and its manufacturing method which concern on a present Example are demonstrated using FIGS. 12A is a cross-sectional view showing the semiconductor device according to the present modification, and FIG. 12B is a schematic diagram showing the structure of a capacitor. 13 is a cross-sectional view illustrating the method of manufacturing the semiconductor device according to the present modification. 14 is a time chart when forming a PtO _X film according to the present modification.

The semiconductor device according to the present modification is characterized by an inclined composition that decreases as the composition ratio of oxygen in the PtO _X films 31a and 41a is separated from the interface with the IrO ₂ films 30 and 40, respectively. The 0 ₂ / Ar gas ratio X at the time of forming the PtO _X film can be suitably changed in the range of 0 to 2.0, for example. According to this modification, since the composition ratio X of oxygen in the PtO _X films 31a and 41a is made smaller as they fall from the interface with the IrO ₂ films 30 and 40, respectively, the PtO _X film 31a and the Pt film 34 ), The difference in oxygen composition between the PtO _X film 41a and the Pt film 44 becomes small. Therefore, according to this embodiment, the lower electrode 36b or the upper electrode 46b having high adhesion can be formed.

Next, the manufacturing method of the semiconductor device by this modification is demonstrated using FIG.

The semiconductor device manufacturing method according to this modification is the same as the semiconductor device manufacturing method according to the second embodiment until the step of forming the IrO ₂ film 30.

Next, a PtO _X film 31a is formed. In this modification, the composition ratio of oxygen in the PtO _X film 31a is made smaller as follows from the interface with the IrO ₂ film 30.

FIG. 14 is a time chart showing the flow rate of oxygen introduced into the chamber, the partial pressure in the chamber, and the plasma power when the PtO _X film 31a is formed.

In this modification, film formation is continued by maintaining the power of plasma when the introduction of oxygen into the chamber is stopped and the oxygen partial pressure in the chamber is lowered. Therefore, in the process of lowering the oxygen partial pressure in the chamber, the oxygen composition in the PtO _X film 31a continuously decreases. Although several tens of seconds, the deposition film PtO _X of 50nm thickness approximately, when this same film is formed PtO _X in the time chart, the oxygen composition can be formed by a simple process _X PtO film changes continuously. Thus, according to this modification, it can suppress that the oxygen composition of the interface of PtO _X film 31a and Pt film 34 becomes discontinuous.

Next, in the same manner as in the second embodiment, a Pt film 34 and a ferroelectric film 38 are formed (see Fig. 13A).

Next, an IrO ₂ film 40 having a thickness of 50 nm is formed in the same manner as in the case of forming the IrO ₂ film 30 on the entire surface.

Next, a PtO _X film 41a having a thickness of 50 nm is formed in the same manner as the case where the PtOx film 31a is formed on the entire surface.

Next, a Pt film 44 having a thickness of 200 nm is formed in the same manner as in the case of forming the Pt film 34 on the entire surface (see Fig. 13B).

Since the manufacturing method of the semiconductor device by this modified example after that is the same as that of 2nd Example, description is abbreviate | omitted. In this way, the semiconductor device according to the present modification is manufactured.

(Variation (2))

Next, a modification 2 of the semiconductor device and its manufacturing method according to the present embodiment will be described with reference to FIG. 15. 15 is a time chart when forming a PtO _X film according to the present modification.

The semiconductor device and its manufacturing method according to the present modification have a major feature in forming the PtO _X films 31a and 41a with a time chart as shown in FIG.

In this modification, as shown in Fig. 15, oxygen is introduced into the chamber at a predetermined flow rate, the oxygen flow rate in the chamber is stabilized, and then the plasma is turned on to form a PtO _X film having a predetermined film thickness. Thereafter, the plasma power is turned off to stop the film formation of the PtO _X film.

Next, the oxygen flow rate into the chamber is reduced, the oxygen partial pressure in the chamber is stabilized, and then the plasma power is turned on again to form a PtO _X film. After that, the plasma power is turned off to stop the film formation of the PtO _X film.

Next, the oxygen flow rate into the chamber is further reduced to stabilize the oxygen partial pressure in the chamber, and then the plasma power is turned on again to form a PtO _X film. After that, the plasma power is turned off to stop the film formation of the PtO _X film.

Next, after the introduction of oxygen into the chamber is stopped to remove oxygen from the chamber, the plasma power is turned on again to form a PtO _X film having an oxygen composition ratio X of zero. In this way, a PtO _X film 31a or a PtO _X film 41a is formed in which the oxygen composition gradually decreases.

A PtO _X film having a thickness of about 50 nm is formed with a film formation time of several tens of seconds, but in this modification, the oxygen composition changes slowly because the red plasma is turned off to reduce the oxygen concentration in the chamber and then the plasma is turned on for a short time. Can form a PtO _X film.

According to this modification, since the oxygen composition in the PtO _X films 31a and 41a gradually decreases as it is separated from the interface with the IrO ₂ films 30 and 40, the lower electrode 36b or the upper electrode having better adhesion. 46b can be formed.

(Variation example (3))

Next, a modification (3) of the semiconductor device and its manufacturing method according to the present embodiment will be described with reference to FIG. Fig. 16 is a time chart when forming a PtO _X film according to the present modification.

The semiconductor device and the manufacturing method thereof according to the present modification have a major feature in forming the PtO _X films 31a and 41a with the time chart as shown in FIG.

In this modification, as shown in Fig. 16, oxygen is introduced into the chamber at a predetermined flow rate, the oxygen flow rate in the chamber is stabilized, and the plasma is turned on to start the formation of the PtO _X film.

Next, the oxygen flow rate in the chamber is gradually reduced while the plasma is turned on. After oxygen is lost in the chamber, plasma power is turned off to complete film formation. In this way, a PtO _X film 31a or a PtO _X film 41a is formed in which the oxygen composition gradually decreases.

According to this modification, the PtO _X films 31a and 41a, which gradually decrease in oxygen composition, are formed by decreasing the oxygen flow rate while the plasma power is on, so that the semiconductor device can be manufactured by a simple process.

(Evaluation results)

Next, the evaluation test result of the adhesiveness of the lower electrode and upper electrode of the semiconductor device manufactured by the present Example is demonstrated.

The evaluation test for the adhesion between the lower electrode and the upper electrode was carried out by applying an epoxy resin between the upper electrode and the traction means, drying the epoxy resin at 150 ° C. for 1 hour, and then pulling up the traction means upwards. It was carried out by pulling. When peeled off at the interface between the upper electrode and the epoxy resin, it was judged that the adhesion of the electrode was good, and when peeled off at the interface of any film of the capacitor, it was judged that the adhesion was poor. An adhesive evaluation test was carried out on each of 50 samples to calculate the rate at which defects occurred.

In the proposed semiconductor device, that is, a semiconductor device using a lower electrode or an upper electrode having a Pt / IrO ₂ structure, the defective rate was 80%. In the semiconductor device according to the first embodiment, that is, a semiconductor device using a lower electrode or an upper electrode having a Pt / Ir / IrO ₂ structure, the defective rate was 20%.

On the other hand, in the semiconductor device according to the present embodiment, that is, the semiconductor device using the lower electrode or the upper electrode having the Pt / PtOx / IrO ₂ structure, the defective rate was 25%. In the semiconductor device according to the modification of the present embodiment, that is, in the semiconductor device in which the oxygen composition ratios of the PtO _X films 31a and 41a dropped from the IrO ₂ films 30 and 40, respectively, the defective rate was 0%.

Therefore, the semiconductor device according to the present embodiment can realize a low failure rate almost the same as the semiconductor device according to the first embodiment. Thus, according to this embodiment, the lower electrode or upper electrode which has favorable adhesiveness can be formed.

Next, evaluation test results for the number of particles will be described with reference to FIGS. 17 and 18. 17 is a graph showing the number of particles when an Ir film or an IrO ₂ film is formed. 18 is a graph showing the number of particles when a Pt film or a PtO _X film is formed. 17 and 18 represent the sputter amount, i.e., the product of sputter power and sputter time, and the vertical axis represents the number of particles attached to the wafer. The particle number was determined by placing the wafer in the chamber for a predetermined time while sputtering, and calculating the increase in the number of particles attached to the wafer. When calculating the number of particles, particles of a size of 0.2 μm or more were used. A 6 inch silicon wafer was used as the wafer.

17 shows the number of particles when an Ir film and an IrO ₂ film are formed, and Example 1 shows the number of particles when only an IrO ₂ film is formed.

As shown in Fig. 17, in Comparative Example 1, 100 or more particles adhered to the wafer at a sputtering amount of 5 kWh or more. In Example 1, the number of particles was suppressed to 100 or less even at a sputtering amount of 10 kWh.

18 shows the particle number when only the Pt film is formed, and Example 2 shows the particle number when the Pt film and the PtO _X film are formed, and Example 3 shows the Pt film and the PtO _X film. The particle number in the case of the gradient composition which gradually changed the oxygen composition ratio in the PtO _X film at the time of formation is shown.

As shown in FIG. 18, in any of Comparative Examples 2, 2, and 3, the particle number was extremely small at the sputtering amount of 30 kWh. From these results, it is thought that particles are less likely to form when forming a PtO _X film or a Pt film.

The semiconductor device manufacturing method according to the present embodiment corresponds to the case where the lower electrode or the upper electrode is formed by the combination of the first embodiment and the second embodiment or the combination of the first embodiment and the third embodiment. The occurrence of is suppressed.

As described above, according to this embodiment, since the lower electrode and the upper electrode are formed without using an Ir film, the number of particles adhering to the wafer can be suppressed, so that the yield of manufacturing a semiconductor device can be improved.

Third Embodiment

A semiconductor device and a manufacturing method thereof according to a third embodiment of the present invention will be described with reference to FIGS. 19 to 21. 19A is a sectional view showing the semiconductor device according to the present embodiment, and FIG. 19B is a schematic diagram showing the structure of a capacitor. 20 and 21 are process sectional views showing the method of manufacturing the semiconductor device according to the present embodiment. The same components as those of the semiconductor device according to the first embodiment and the second embodiment and the manufacturing method thereof shown in FIGS. 1 to 18 are denoted by the same reference numerals and description thereof will be omitted or concise.

(Semiconductor device)

First, the semiconductor device according to the present embodiment will be described with reference to FIG. 19. The semiconductor device according to the present embodiment is characterized in that an SrRuO ₃ (SR0) film is used for the upper electrode and the lower electrode.

19A and 19B, on the silicon oxide film 28, a SrO film 29 having a thickness of 50 nm, a PtO _X film 31 having a thickness of 50 nm, and a Pt film 34 having a thickness of 200 nm are sequentially stacked. The lower electrode 36c of the Pt / PtO _X / SrO structure is formed. The composition ratio X of oxygen in the PtO _X film 31 can be suitably set in the range of 0.1 to 2.0, for example.

On the lower electrode 36a, the same ferroelectric film 38 as in the second embodiment, which is a PZT film having a thickness of 300 nm, is formed.

On top of the ferroelectric film 38, an SrO film 39 having a thickness of 50 nm, a PtO _X film 41 having a thickness of 50 nm, and a Pt film 44 having a thickness of 200 nm are sequentially stacked on top of the Pt / PtO _X / SrO structure. The electrode 46c is formed. The lower electrode 36c, the ferroelectric film 38, and the upper electrode 46c form a capacitor 48c for a memory.

The semiconductor device according to the present embodiment has a major feature in that an SRO film is used for the lower electrode 36c or the upper electrode 46c. That is, since SrRu easily reacts with moisture in the air, it is difficult to form a stable SrRu film. Therefore, in the case where the SRO film is used instead of the IrO ₂ films 30 and 40 in the semiconductor device according to the first embodiment, an SrRu film must be formed on the SRO film, and the formation of such an SrRu film is difficult because of the above reasons. The SRO film could not be used in place of the Ir0 ₂ films 30 and 40. On the other hand, according to the present embodiment, since the PtO _X films 31 and 41 are formed on the SRO films 29 and 39, respectively, the lower electrode 36c having high adhesion even when the SRO films 29 and 39 are used, The upper electrode 46c can be formed.

As described above, according to the present embodiment, the PtO _X film is sandwiched between the Pt film and the SRO film, whereby the lower electrode and the upper electrode using the SRO film can be formed. Thereby, the lower electrode or upper electrode with high adhesiveness can be formed using an SRO film | membrane.

(Manufacturing Method of Semiconductor Device)

Next, a method of manufacturing a semiconductor device according to the present embodiment will be described with reference to FIGS. 20 and 21.

First, since the process of forming the silicon oxide film 28 is the same as the method of manufacturing the semiconductor device according to the first embodiment shown in Figs. 2A to 2C, the description is omitted.

Next, an SrO film 29 having a thickness of 50 nm is formed on the entire surface by the sputtering method. Film-forming conditions can be 0.3-5 kW of power, 200-500 sccm of Ar gas flow rates, and a board | substrate temperature of room temperature-500 degreeC, for example. Next, the SRO film 29 is crystallized by performing oxygen annealing at 600 ° C. for 30 minutes.

Next, as in the second embodiment, a PtO _X film 31 having a thickness of 50 nm and a Pt film 34 having a thickness of 200 nm are sequentially stacked.

Next, in the same manner as in the second embodiment, a ferroelectric film 38 made of a PZT film having a thickness of 300 nm is formed (see Fig. 20A).

Next, an SRO film 39 having a thickness of 50 nm is formed in the same manner as in the case of forming the SRO film 29 on the entire surface.

Next, a PtO _X film 41 having a thickness of 50 nm is formed in the same manner as in the case of forming the PtO _X film 31 on the entire surface.

Next, a Pt film 44 having a thickness of 200 nm is formed in the same manner as in the case of forming the Pt film 34 on the entire surface (see FIG. 20B).

Next, as in the second embodiment, the Pt film 44, the PtO _X film 41, the SrO film 39, the ferroelectric film 38, the Pt film 34, the PtO _X film 31, and the SrO film were Pattern (29). As a result, the SrO film 29, the PtO _X film 31, and the Pt film 34 form a lower electrode 36c having a Pt / PtO _X / SrO structure. The SrO film 39 and the PtO _X film 41 are formed. And an upper electrode 46c having a Pt / PtO _X / SrO structure as the Pt film 44, and a capacitor 48c as the lower electrode 36c, the ferroelectric film 38, and the upper electrode 46c ( See FIG. 21).

Subsequently, the method of manufacturing the semiconductor device is the same as the method of manufacturing the semiconductor device according to the first embodiment shown in Figs. 4B to 5, and thus description thereof is omitted. In this way, the semiconductor device according to the present embodiment is manufactured.

(Variation)

Next, a modification of the semiconductor device and its manufacturing method according to the present embodiment will be described with reference to FIG. 22. FIG. 22A is a sectional view of the semiconductor device according to the present modification, and FIG. 22B is a schematic diagram showing the structure of a capacitor.

The semiconductor device according to the present modification is characterized by an inclined composition that decreases as the composition ratio of oxygen in the PtO _X films 31a and 41a is separated from the interface with the SrO films 29 and 39, respectively. The 0 ₂ / Ar gas ratio X at the time of forming the PtO _X film can be suitably changed in the range of 0 to 2.0, for example. According to this modification, since the composition ratio X of oxygen in the PtO _X films 31a and 41a is made smaller as they fall from the interface with the SrO films 29 and 39, respectively, the PtO _X film 31a and the Pt film 34 are reduced. In the meantime, the difference in oxygen composition between the PtO _X film 41a and the Pt film 44 becomes small.

Thus, according to this modification, the lower electrode 36d or the upper electrode 46d with high adhesiveness can be formed. The PtO _X films 31a and 41a having such a composition can be formed in the same manner as the semiconductor device manufacturing method according to the modification of the second embodiment.

(Evaluation results)

Next, the evaluation test result of the adhesiveness of the lower electrode and upper electrode of the semiconductor device manufactured by the present Example is demonstrated.

The evaluation test about the adhesiveness of a lower electrode and an upper electrode was performed similarly to 2nd Example.

When the lower electrode or the upper electrode had a Pt / SRO structure, the defective rate was 90%.

On the other hand, in the semiconductor device according to the present embodiment, that is, the semiconductor device using the lower electrode or the upper electrode of the Pt / PtO _X / SrO structure, the defective rate was 30%. In the semiconductor device according to the modification of the present embodiment, that is, in the semiconductor device in which the oxygen composition ratios of the PtO _X films 31a and 41a dropped from the IrO ₂ films 30 and 40, respectively, the defective rate was 0%.

Thus, according to this embodiment, the lower electrode or upper electrode which has favorable adhesiveness can be formed.

Next, the evaluation test results for the particle number will be described. When the SrRu film was formed, many particles adhered to the wafer. However, when the SRO film was formed, the number of particles adhering to the wafer could be suppressed.

As described above, according to the present embodiment, the number of particles adhering to the wafer can be suppressed, and the production yield of the semiconductor device can be improved.

[Example 4]

A semiconductor device and a method of manufacturing the same according to a fourth embodiment of the present invention will be described with reference to FIGS. FIG. 23A is a sectional view showing the semiconductor device according to the present embodiment, and FIG. 23B is a schematic diagram showing the structure of a capacitor. 24 and 25 are process sectional views showing the method of manufacturing the semiconductor device according to the present embodiment. The same components as those in the semiconductor device and the manufacturing method according to the first to third embodiments shown in FIGS. 1 to 22 are denoted by the same reference numerals and description thereof will be omitted or concise.

(Semiconductor device)

First, the semiconductor device according to the present embodiment will be described with reference to FIG. The semiconductor device according to the present embodiment is characterized in that a PtIrO _X film, that is, an oxide film of an alloy of Pt and Ir is used between the Pt film and the IrO ₂ film as an electrode.

As shown in Fig. 23, on the silicon oxide film 28, Pt / formed by sequentially stacking an IrO ₂ film 30 having a thickness of 50 nm, a PtIrO _X film 33 having a thickness of 50 nm, and a Pt film 34 having a thickness of 200 nm. The lower electrode 36e of the PtIrO _X / IrO ₂ structure is formed. The O ₂ / Ar gas ratio X at the time of forming the PtIrO _X film 33 can be suitably set in the range of 0.1 to 2.0, for example.

On the lower electrode 36e, similarly to the second embodiment, a ferroelectric film 38, which is a PZT film having a thickness of 300 nm, is formed.

On the ferroelectric film 38, a Pt / PtIrO _X / IrO ₂ structure formed by sequentially stacking an IrO ₂ film 40 having a thickness of 50 nm, a PtIrO _X film 43 having a film thickness of 50 nm, and a Pt film 44 having a thickness of 200 nm was sequentially stacked. The upper electrode 46e is formed. A capacitor 48e for memory is formed of these lower electrodes 36e, ferroelectric film 38, and upper electrode 46e.

As described above, according to the present embodiment, even when the electrode of the capacitor has a Pt / PtIrO _X / IrO ₂ structure, that is, a structure in which an oxide film of an alloy of Pt and Ir is sandwiched between the Pt film and the IrO ₂ film, an upper electrode or a lower electrode Can be formed.

(Manufacturing Method of Semiconductor Device)

Next, the manufacturing method of the semiconductor device according to the present embodiment will be described with reference to FIGS. 24 and 25.

First, since the process of forming the silicon oxide film 28 is the same as the method of manufacturing the semiconductor device according to the first embodiment shown in Figs. 2A to 2C, the description is omitted.

Next, in the same manner as in the second embodiment, an IrO ₂ film 30 having a thickness of 50 nm is formed.

Next, a PtIrO _X film 33 having a thickness of 50 nm is formed on the entire surface in an Ar and O ₂ atmosphere by the reactive sputtering method. The film formation conditions are targets having an Ir / Pt ratio of 0.1 to 0.5 as targets, power of 0.5 to 5 kW, Ar gas flow rate of 200 to 500 sccm, O ₂ flow rate of 200 to 500 sccm, and substrate temperature of room temperature to 500 ° C. have. The O ₂ / Ar gas ratio when forming the PtO _X film 31 can be suitably set in the range of 0.1 to 2.0, for example.

Next, similarly to the second embodiment, a Pt film 34 having a thickness of 200 nm and a ferroelectric film 38 made of a PZT film having a thickness of 300 nm are sequentially formed (see FIG. 24A).

Next, an SRO film 39 having a thickness of 50 nm is formed in the same manner as in the case of forming the IrO ₂ film 30 on the entire surface.

Next, a PtIrO _X film 43 having a film thickness of 50 nm is formed in the same manner as the case where the PtIrO _X film 33 is formed on the entire surface.

Next, a Pt film 44 having a thickness of 200 nm is formed in the same manner as in the case of forming the Pt film 34 on the entire surface (see Fig. 24B).

Next, as in the second embodiment, the Pt film 44, the PtIrO _X film 43, the IrO ₂ film 40, the ferroelectric film 38, the Pt film 34, the PtIrO _X film 33, and IrO were ₂ film 30 is patterned. As a result, the lower electrode 36e having the Pt / PtIrO _X / IrO ₂ structure is formed of the IrO ₂ film 30, the PtIrO _X film 33, and the Pt film 34, and the IrO ₂ film 40 and the PtIrO _X film The upper electrode 46e of the Pt / PtIrO _X / IrO ₂ structure is formed of the 43 and the Pt film 44, and the capacitor 48e is formed of the lower electrode 36e, the ferroelectric film 38, and the upper electrode 46e. Is configured (see FIG. 25).

Subsequently, the method of manufacturing the semiconductor device is the same as the method of manufacturing the semiconductor device according to the first embodiment shown in FIG. 4B or FIG. 5, and thus description thereof is omitted. In this way, the semiconductor device according to the present embodiment is manufactured.

(Variation)

Next, a modification of the semiconductor device and its manufacturing method according to the present embodiment will be described with reference to FIG. 26. FIG. 26A is a cross-sectional view showing the semiconductor device according to the present modification, and FIG. 26B is a schematic diagram showing the structure of a capacitor.

The semiconductor device according to the present modification is characterized in that it has an inclined composition that becomes smaller as the composition ratio of oxygen in the PtIrO _X films 33a and 43a falls from the interface with the IrO ₂ films 30 and 40, respectively. The 0 ₂ / Ar gas ratio X at the time of forming the PtIrO _X film can be suitably changed in the range of 0 to 2.0, for example. According to this modification, the composition ratio X of the oxygen in the PtIrO _X films 33a and 43a is made smaller as they fall from the interface with the IrO ₂ films 30 and 40, respectively, so that the PtIrO _X film 33a and the Pt film 34 ), The difference in oxygen composition between the PtIrO _X film 43a and the Pt film 44 becomes small.

Thus, according to this modification, the lower electrode 36f or the upper electrode 46f with high adhesiveness can be formed. The PtIrO _X films 33a and 43a having such an inclined composition can be formed in the same manner as the semiconductor device manufacturing method according to the modification of the second embodiment.

(Evaluation results)

Next, the evaluation test result of the adhesiveness of the lower electrode and upper electrode of the semiconductor device manufactured by the present Example is demonstrated.

The evaluation test about the adhesiveness of a lower electrode and an upper electrode was performed similarly to 2nd Example.

In the case where the lower electrode or the upper electrode had a Pt / IrO ₂ structure, the defective rate was 80%.

On the other hand, in the semiconductor device according to the present embodiment, that is, the semiconductor device using the lower electrode or the upper electrode of the Pt / PtIrO _X / IrO ₂ structure, the defective rate was 20%. In addition, in the semiconductor device according to the modification of the present embodiment, that is, in the semiconductor device in which the oxygen composition ratios of the PtIrO _X films 33a and 43a fell from the IrO ₂ films 30 and 40, respectively, the defective rate was 0%.

Thus, according to this embodiment, the lower electrode or upper electrode which has favorable adhesiveness can be formed.

Next, the evaluation test results for the particle number will be described. When the Ir film was formed, many particles adhered to the wafer. However, when the PtIrO _X film was formed, the number of particles attached to the wafer could be suppressed.

As described above, according to the present embodiment, the number of particles adhering to the wafer can be suppressed, and the production yield of the semiconductor device can be improved.

Modified Example

The present invention is not limited to the above embodiment, and various modifications are possible.

For example, in the first to fourth embodiments, the case of applying to FeRAM has been described as an example, but the object to be applied is not limited to FeRAM, and it can be applied to all semiconductor devices using Pt as an electrode. It can be applied to a semiconductor device using an oxide film as a dielectric of a capacitor and the like, in particular to a DRAM using high dielectric constant films (Ba, Sr) Ti0 ₃ .

In the first to fourth embodiments, a Pt film is used as an electrode, but an alloy containing Pt may be used as an electrode instead of the Pt film.

In addition, in the first embodiment, the electrode has a Pt / Ir / IrO ₂ structure, but for example, a Pt / Ir / IrO ₂ / Ir structure may be used to improve the adhesion to the substrate layer of the IrO ₂ film.

In the first embodiment, the electrode has a Pt / Ir / IrO ₂ structure, but the electrode is not limited to the Pt / Ir / IrO ₂ structure. For example, the electrode may have a Pt / Ru / RuO ₂ structure or a Pt / Rh / structure. RhO ₂ structure or the like may be used.

In the first embodiment, the upper electrode and the lower electrode were formed by laminating three independent films of the Pt film, the Ir film, and the IrO ₂ film. However, it is not necessary to necessarily form the electrode by laminating the independent films. You may comprise an electrode by changing continuously. For example, after forming the IrO ₂ film, the Ir film may be formed by stopping the introduction of O ₂ into the film formation chamber, and thereafter, an alloy film of Pt and Ir may be formed by increasing the composition of Pt.

In the first to fourth embodiments, a PbZr _X Ti _1-X O ₃ (PZT) film was used as the ferroelectric film. However, the ferroelectric film is not limited to the PbZr _X Ti _1-X O ₃ (PZT) film. Can be used. For example, a PbZr _X Ti _1-X O ₃ (PZT) film doped with La, an SrBi ₂ Ta ₂ O ₉ (SBT) film, an SrBi ₂ (Ta, Nb) ₂ O ₉ film, or a Y1-based film may be used. Can be.

In addition, in the second embodiment, the Pt / PtO _X / IrO ₂ structure is applied to both the upper electrode and the lower electrode of the capacitor, but the Pt / PtO _X / IrO ₂ structure is not necessarily applied to both the upper electrode and the lower electrode. For example, the Pt / PtO _X / IrO ₂ structure may be applied only to one electrode where the Pt film is easily peeled off.

In the second embodiment, the film thickness of the IrO ₂ film is 50 nm, the film thickness of the PtO _X film is 50 nm, and the film thickness of Pt is 200 nm. However, these film thicknesses are not limited to the above and can be appropriately set. For example, the film thickness of a PtO _X film can be 20-200 nm, for example.

In addition, although the IrO ₂ films 30 and 40 were formed in the second and fourth embodiments, the present invention is not limited to the IrO ₂ films 30 and 40, for example, an oxide film of Ir, Ru or Rh, or Ir, Ru. Alternatively, an oxide film of an alloy containing Rh may be used.

In the second and third embodiments, the PtO _X films 31 and 41 are formed, but not limited to the PtO _X films 31 and 41, and for example, an oxide film of Ir, Ru, or Rh, or Ir, Ru. Alternatively, an oxide film of an alloy containing Rh may be used.

In the second to fourth embodiments, the Pt films 34 and 44 are formed, but they are not limited to the Pt films 34 and 44. For example, Ir films, Ru films or Rh films, or Ir, Ru or An alloy film containing Rh may be used.

In the second embodiment, the lower electrode or the upper electrode of the Pt / PtO _X / IrO ₂ structure is formed, but the lower electrode of the Pt / PtO _X / Ir / IrO ₂ structure in which Ir is sandwiched between the PtO _X film and the IrO ₂ film. The upper electrode may be formed. Good adhesion can also be achieved with a lower electrode or an upper electrode having such a structure.

In the third embodiment, the Pt / PtO _X / SRO structure is applied to both the upper electrode and the lower electrode of the capacitor, but the Pt / PtO _X / SRO structure does not necessarily need to be applied to both the upper electrode and the lower electrode. For example, the Pt / PtO _X / SRO structure may be applied only to one electrode where the Pt film is easily peeled off.

In the third embodiment, the film thickness of the SRO film is 50 nm, the film thickness of the PtO _X film is 50 nm, and the film thickness of Pt is 200 nm. However, these film thicknesses are not limited to the above and can be appropriately set. For example, the film thickness of a PtO _X film can be 20-200 nm, for example.

In addition, although the SRO films 29 and 39 were formed in the third embodiment, they are not limited to the SRO films 29 and 39. For example, an oxide film of an alloy containing SrRu may be used.

In addition, in the fourth embodiment, the Pt / PtIrO _X / IrO ₂ structure is applied to both the upper electrode and the lower electrode of the capacitor, but the Pt / PtIrO _X / IrO ₂ structure is not necessarily applied to both the upper electrode and the lower electrode. For example, the Pt / PtIrO _X / IrO ₂ structure may be applied only to one electrode where the Pt film is easily peeled off.

In the fourth embodiment, the film thickness of the IrO ₂ film is 50 nm, the film thickness of the PtIrO _X film is 50 nm, and the film thickness of Pt is 200 nm. However, these film thicknesses are not limited to the above and can be appropriately set. For example, the film thickness of the PtIrO _X film can be, for example, 20 to 200 nm.

In the fourth embodiment, the PtIrO _X films 33 and 43 are formed, but not limited to the PtIrO _X films 33 and 43. For example, an oxide film of an alloy containing Pt, Ir, Ru, or Rh is used. You may also do it.

As described above, according to the present invention, since the adhesion of the Pt film can be improved by making the electrode of the capacitor have a Pt / Ir / IrO ₂ structure, that is, a structure having an Ir film sandwiched between the Pt film and the IrO ₂ film, the Pt film is peeled off. You can prevent it. That is, the semiconductor device which used the high adhesive electrode as the electrode of a capacitor can be provided.

Further, according to the present invention, since the lower electrode and the upper electrode are formed without using an Ir film, the number of particles adhering to the wafer can be suppressed, so that the yield of manufacturing a semiconductor device can be improved.

Claims (18)

A first conductive film that is an oxide film of a first metal, a second conductive film that is formed on the first conductive film and is the first metal, and a second material that is formed on the second conductive film and that is different from the first metal A semiconductor device comprising an electrode having a third conductive film containing a metal. The method of claim 1, And the electrode further has a fourth conductive film made of the first metal formed under the first conductive film. The method according to claim 1 or 2, The third conductive film further contains the first metal. The method of claim 3, The third conductive film is a semiconductor device, characterized in that the composition ratio of the first metal is reduced as it is separated from the interface with the second conductive film. The method according to any one of claims 1 to 4, And the first metal is Ir, Ru, or Rh. The method according to any one of claims 1 to 5, And the second metal is Pt. A capacitor having a lower electrode, a dielectric film formed on the lower electrode, and an upper electrode formed on the dielectric film, The lower electrode and / or the upper electrode may include a first conductive film formed of an oxide film of a first metal, a second conductive film formed on the first conductive film, and formed of the first metal, and an upper portion of the second conductive film. And a third conductive film formed on the substrate and containing a second metal different from the first metal. A first conductive film made of an oxide film containing a first metal, a second conductive film formed on the first conductive film and made of an oxide film containing a second metal different from the first metal, and the second conductive film And an electrode having a third conductive film formed on and containing the second metal. The method of claim 8, The oxide film containing the first metal is an oxide film of the first metal or an oxide film of an alloy containing the first metal. The method according to claim 8 or 9, The oxide film containing the second metal is an oxide film of the second metal or an oxide film of an alloy containing the second metal. The method according to any one of claims 8 to 10, And the third conductive film containing the second metal is a conductive film made of the second metal or a conductive film made of an alloy containing the second metal. The method according to any one of claims 8 to 11, And the electrode is formed between the first conductive film and the second conductive film and further has a fourth conductive film containing the first metal. The method according to any one of claims 8 to 12, A composition ratio of oxygen decreases as the second conductive film is separated from the interface with the first conductive film. The method according to any one of claims 8 to 13, And the first metal is Ir, Ru, Rh or SrRu. The method according to any one of claims 8 to 14, And the second metal is Pt, Ir, Ru, or Rh. A capacitor having a lower electrode, a dielectric film formed on the lower electrode, and an upper electrode formed on the dielectric film, The lower electrode and / or the upper electrode may include a first conductive film made of an oxide film containing a first metal and an oxide film formed on the first conductive film and containing a second metal different from the first metal. A semiconductor device comprising a second conductive film and a third conductive film formed on the second conductive film and containing the second metal. Forming a first conductive film made of an oxide film containing a first metal, and forming an oxide film formed on the first conductive film and containing a second metal different from the first metal and interfacing with the first conductive film. A method of manufacturing a semiconductor device, comprising: forming a second conductive film in which the composition ratio of oxygen decreases as it is separated from the step; and forming a third conductive film containing the second metal on the second conductive film. In the step of forming the second conductive film, the second conductive film is formed while reducing the oxygen concentration in the deposition chamber. The method of claim 17, In the step of forming the second conductive film, the second conductive film is formed while reducing the oxygen concentration in the film formation chamber in a plurality of steps.