JP4805775B2 - Iridium oxide film manufacturing method, electrode manufacturing method, dielectric capacitor manufacturing method, and semiconductor device manufacturing method - Google Patents

Description

The present invention relates to a method for producing an iridium oxide film, a manufacturing method of an electrode, those concerning the manufacturing process of a method of manufacturing a dielectric capacitor, and a semiconductor device.

  Many semiconductor devices using dielectric capacitors that have been put to practical use so far have a structure called a planar type. In the planar type, the lower electrode of the dielectric capacitor is a plate line, and the upper electrode is electrically connected to the diffusion layer of the cell transistor.

  However, in the planar type structure, it is difficult to form a dielectric capacitor immediately above the cell transistor, so that one cell is divided into a transistor region and a capacitor region. Not suitable.

  On the other hand, in order to recommend the miniaturization of a semiconductor circuit, a stack type semiconductor device has been proposed (for example, Patent Document 1). The stack type has a structure in which the upper electrode of the dielectric capacitor is a plate line (or the upper electrode is electrically connected to the plate line) and the lower electrode is electrically connected to the diffusion layer of the transistor.

Therefore, when the stack type structure is used, the film constituting the lower electrode must be a conductive film, unlike the case of using the planar type structure. Therefore, a structure of a lower electrode in which a Pt film / IrOx film / Ir film / TiAlN film is laminated in order from above has been proposed (for example, Patent Document 2), and a Bi layered ferroelectric (SrBi) is formed on the Pt film. _A ferroelectric film such as a ₂ Ta ₂ O ₉ ) film or a zirconate titanate (Pb (Zr _1-x Ti _x ) O ₃ ) film, and a W plug or a poly Si plug is formed under the TiAlN film. Used in the formed form.
Japanese Patent Laid-Open No. 9-102591 JP 2001-237395 A

  When manufacturing a dielectric capacitor, it is indispensable to perform a heat treatment in an oxygen atmosphere after forming a dielectric film on the lower electrode. Therefore, as described above, when using a lower electrode in which an iridium oxide film is laminated with another film such as a metal film, the thermal expansion coefficient of each film is different, so that a very large thermal stress is caused by heat treatment in an oxygen atmosphere. There has been a problem that peeling occurs at the interface between the other film and the iridium oxide film.

  In particular, the platinum film is difficult to form an oxide on the surface, and the difference between the thermal expansion coefficient of the platinum film and the thermal expansion coefficient of the iridium oxide film is very large. Therefore, when the other film is a metal film containing platinum, the problem of peeling at the interface is more likely to occur.

Therefore, in view of the above problems, the present invention provides a method for producing an iridium oxide film having high adhesion at the interface between the other film and the iridium oxide film when another film is formed on the surface of the iridium oxide film. The purpose is to provide. The present invention aims at providing a method of manufacturing a high electrode adhesion at the interface between the metal film and the iridium oxide film, a method of manufacturing a dielectric capacitor, and a method of manufacturing a semiconductor device.

Above-mentioned problems, Ru is solved by the following means.

The method for producing an iridium oxide film according to the present invention uses a target containing iridium and is a gas containing oxygen and has a flow rate ratio between the oxygen and a gas other than oxygen (the flow rate of oxygen gas F _O2 / other than oxygen). Conditions under which the sputtering output power (DC sputtering power) is 0.5 kW or more and 1 kW or less by a reactive sputtering method in which a gas having a gas flow rate F _I ) of 0.25 or more and 0.40 or less is sputtered. The (110) crystal plane is selectively oriented under conditions where the film forming temperature is 275 ° C. or higher and 400 ° C. or lower and the sputtering pressure is 0.69 Pa (5.2 mTorr) or higher and 1.09 Pa (8.2 mTorr) or lower. it you are characterized to form a iridium oxide film.

  In the method for producing an iridium oxide film of the present invention, an iridium oxide film having a (110) crystal plane selectively oriented can be formed under the above conditions. Therefore, another film (for example, metal) is formed on the surface of the iridium oxide film. In the case where a film or the like is formed, an iridium oxide film having high adhesion at the interface between the other film and the iridium oxide film can be obtained.

  The method for producing an electrode of the present invention includes an iridium oxide film forming step for forming an iridium oxide film using the method for producing an iridium oxide film of the present invention, and a metal film for forming a metal film on the surface of the iridium oxide film. And a forming step.

  In the method for producing an electrode of the present invention, as described above, an iridium oxide film having a (110) crystal plane selectively oriented is formed by the method for producing an iridium oxide film of the present invention, and a metal film is formed on the surface. Since it can be formed, it is possible to obtain an electrode having high adhesion at the interface between the metal film and the iridium oxide film and hardly causing peeling at the interface.

  In the electrode manufacturing method of the present invention, examples of the metal film include a film containing platinum.

  In the dielectric capacitor of the present invention, examples of the metal film include a film containing platinum.

  The dielectric capacitor manufacturing method of the present invention includes a first electrode forming step of forming a first electrode using the electrode manufacturing method of the present invention, and a dielectric film on the surface of the metal film of the first electrode. And a second electrode forming step of forming a second electrode on the surface of the dielectric film.

  In the dielectric capacitor manufacturing method of the present invention, as described above, the metal film is formed on the iridium oxide film in which the (110) crystal plane is selectively oriented by the electrode manufacturing method of the present invention. Since the electrode can be formed, the adhesion at the interface between the metal film and the iridium oxide film is high, and peeling at the interface hardly occurs, so that a high performance dielectric capacitor can be obtained.

  The method of manufacturing a semiconductor device of the present invention includes a semiconductor substrate preparation step of preparing a semiconductor substrate, a transistor formation step of forming a transistor on the semiconductor substrate, and a method of manufacturing a dielectric capacitor of the present invention above the semiconductor substrate. And a dielectric capacitor forming step of forming a dielectric capacitor by using.

  In the method for manufacturing a semiconductor device of the present invention, as described above, the metal film is formed on the iridium oxide film in which the (110) crystal plane is selectively oriented by the dielectric capacitor manufacturing method of the present invention. Since one electrode can be formed, the adhesiveness at the interface between the metal film and the iridium oxide film is high, and peeling at the interface is unlikely to occur, so that a semiconductor device with high performance can be obtained.

  In the method for manufacturing a semiconductor device of the present invention, it is preferable that the method further includes a connecting step of electrically connecting the first electrode of the dielectric capacitor and the transistor.

  In the above process, for example, a capacitor can be provided immediately above the transistor, which is suitable for miniaturization. In addition, as described above, the first electrode in which the metal film is formed on the iridium oxide film with the (110) crystal plane selectively oriented is formed by the dielectric capacitor manufacturing method of the present invention. Therefore, the adhesiveness at the interface between the metal film and the iridium oxide film is high, and peeling at the interface hardly occurs, so that a semiconductor device with high performance can be obtained.

ADVANTAGE OF THE INVENTION According to this invention, when another film | membrane is formed on the surface of an iridium oxide film, the manufacturing method of an iridium oxide film with high adhesiveness in the interface of another film | membrane and an iridium oxide film can be provided. . Further, according to the present invention, it is possible to provide a method for manufacturing an electrode having high adhesion at the interface between the metal film and the iridium oxide film, a method for manufacturing a dielectric capacitor, and a method for manufacturing a semiconductor device.

  Hereinafter, the present invention will be described in detail.

[1] Iridium Oxide Film In the iridium oxide film of the present invention, the (110) crystal plane is selectively oriented. In the present invention, “(110) crystal plane is selectively oriented” means that the X-ray diffraction intensity from the (110) crystal plane is I ₁₁₀ , and the X-ray diffraction intensity from the (200) crystal plane is I _200. In this case, the value of I ₁₁₀ / I ₂₀₀ is 8 or more or I ₂₀₀ = 0.

The I ₁₁₀ / I ₂₀₀ value is preferably 20 or more, and more preferably 30 or more.

Further, the X-ray diffraction intensity can be measured using a commercially available X-ray diffraction apparatus (for example, MAXIMA_X XRD-7000, manufactured by Shimadzu Corporation).
Incidentally, the absolute value of the X-ray diffraction intensity (for example, I ₁₁₀ , I _200, etc.) is a non-physical quantity depending on the intensity of the X-ray source, the film thickness of the sample, the integration time, etc. I ₁₁₀ defined in the present invention. Since the / I ₂₀₀ value is a ratio of the I ₁₁₀ value and the I ₂₀₀ value in the same sample, it does not depend on the measurement conditions and purely indicates the orientation ratio of crystal planes contained in the film. The I ₁₁₀ / I ₂₀₀ value of an iridium oxide film (for example, a powder state) in which (110) crystal plane orientation and (200) crystal plane orientation are mixed at 1: 1 is 4 (eg, JCPDS card) reference).

  The manufacturing method of the iridium oxide film of the present invention is such that a film forming temperature is 275 ° C. or higher and 400 ° C. or lower by a reactive sputtering method using a “target containing iridium” and sputtering while introducing “a gas containing oxygen”. Further, an iridium oxide film is formed under the condition that the sputtering pressure is 0.69 Pa (5.2 mTorr) or more and 1.09 Pa (8.2 mTorr) or less.

  In the present invention, the film formation temperature refers to the temperature of the substrate during sputtering. The film formation temperature is 275 ° C. or more and 400 ° C. or less, preferably 300 ° C. or more and 350 ° C. or less, and more preferably 315 ° C. or more and 335 ° C. or less.

  In the present invention, the sputtering pressure refers to the total pressure of the “gas containing oxygen” in the film forming chamber. The sputtering pressure is 0.69 Pa (5.2 mTorr) or more and 1.09 Pa (8.2 mTorr), preferably 0.76 Pa (5.7 mTorr) or more and 1.03 Pa (7.7 mTorr) or less.

By setting the film forming temperature and the sputtering pressure to the above conditions, an iridium oxide film in which the (110) crystal plane is selectively oriented can be obtained. Specifically, for example, an iridium oxide film having an I ₁₁₀ / I ₂₀₀ value of 8 or more is obtained.

  In the “target containing iridium”, for example, iridium alone having a purity of 3N5 (99.95%) or more (preferably 4N (99.99%) or more) is used.

  In the “gas containing oxygen”, for example, a mixed gas of an inert gas and an oxygen gas can be used. Examples of the inert gas include nitrogen gas, carbon dioxide gas, and rare gas. Examples of the rare gas include helium gas, neon gas, and argon gas. Among these, rare gas is preferable, and argon gas is particularly preferable.

The content of oxygen contained in the “gas containing oxygen” is such that the flow rate of oxygen gas is F _{2 O2} and the flow rate of gases other than oxygen is F ₁ , and the F _{2 O} / F ₁ value is 0.25 or more and 0.40. or less, it is favorable preferable is 0.3 or more 0.35 or less.

The output during sputtering (DC sputtering power) is preferably 0.5 kW or more and 1 kW or less, and more preferably 0.50 kW or more and 0.75 kW or less.
When the DC sputtering power is 0.5 kW or more and 1 kW or less, it is possible to stably discharge and suppress the formation of a reduced film (iridium film).

  Since the iridium oxide film of the present invention described above has a larger unevenness on the surface of the film than the conventional iridium oxide film, other iridium oxide films when other films (such as metal films) are formed on the surface of the iridium oxide film. The adhesion between the film and the iridium oxide film can be increased.

FIG. 1 is a cross-sectional view showing an example of the iridium oxide film of the present invention. FIG. 1 is an SEM (scanning electron microscope) image. The iridium oxide film shown in FIG. 1 has a composition of IrO ₂ and a (110) crystal plane is selectively oriented. For example, the I ₁₁₀ / I ₂₀₀ value is 35.

The iridium oxide film shown in FIG. 1 is formed as follows, for example. In other words, the iridium content with 99.95% of the iridium target, while introducing a mixed gas of oxygen gas and argon gas _{(F O2 / F I = 0.33} ), the film formation temperature of 325 ° C., the sputtering pressure Sputtering is performed under the conditions of 0.89 Pa (0.67 mTorr) and DC sputtering power of 0.5 kW.

On the other hand, FIG. 2 shows a cross-sectional view of an example of a conventional iridium oxide film for comparison. FIG. 2 is also an SEM (scanning electron microscope) image. The conventional iridium oxide film shown in FIG. 2 has a composition of IrO ₂ and a (200) crystal plane is selectively oriented. For example, the I ₁₁₀ / I ₂₀₀ value is 0.1.

The conventional iridium oxide film shown in FIG. 2 is formed as follows, for example. In other words, the iridium content with 99.95% of the iridium target, while introducing a mixed gas of oxygen gas and argon gas _{(F O2 / F I = 0.33} ), the film formation temperature of 300 ° C., a mixed gas Sputtering is performed under the conditions of a pressure of 1.33 Pa (10 mTorr) and a DC sputtering power of 0.5 kW.

  As can be seen from a comparison between FIG. 1 and FIG. 2, the unevenness on the surface of the iridium oxide film shown in FIG. 1 is larger than the unevenness on the surface of the conventional iridium oxide film shown in FIG.

  The mechanism by which the adhesion at the interface between the iridium oxide film and the other film is increased due to the large unevenness on the surface of the iridium oxide film is not clear, but the following two are theoretically considered.

  The first is due to the mechanical coupling action, which is known as the anchor effect. The anchor effect is that the contact area increases at the interface of a film with a rough surface, and as a result, the adhesion increases due to the diffusion of the film components into each other and the penetration of the film into the grain boundaries and voids. That is.

  The second is due to physical interaction and is due to electromagnetic forces acting on molecules, known as van der Waals forces.

  With respect to the above two actions, it is difficult to directly evaluate the force acting between the films. Therefore, the adhesion energy between the iridium oxide film and the platinum film is converted into an iridium oxide film as shown in FIG. Comparison can be made between the case where the iridium oxide film shown is used and the case where the conventional iridium oxide film shown in FIG. 2 is used.

  Specifically, in order to calculate the above adhesion energy, a platinum film is laminated on the surface of the iridium oxide film shown in FIG. 1 or FIG. 2, and then subjected to a high temperature treatment at 750 ° C. for 0.5 hours. The membrane was intentionally aggregated to form platinum aggregates, and the contact angle of the platinum aggregates was determined.

  FIG. 3 shows an example of a cross-sectional view of the laminated film after the high temperature treatment when the iridium oxide film shown in FIG. 1 is used as the iridium oxide film. On the other hand, FIG. 4 shows an example of a cross-sectional view of the laminated film after the high temperature treatment when the conventional iridium oxide film shown in FIG. 2 is used as the iridium oxide film. 3 and 4 are also SEM (scanning electron microscope) images.

Here, the contact angle of the platinum aggregate can be determined as follows.
Using the cross-sectional SEM image, the angle between the iridium oxide film surface and the platinum aggregate surface is measured. This measurement is performed at 15 locations (15 samples), and the average value of the obtained values is defined as the contact angle.

  The contact angles of platinum in the laminated film after the high-temperature treatment shown in FIGS. 3 and 4 obtained as described above were 48 degrees and 69.1 degrees, respectively.

Further, the adhesion energy E _IrPt between the iridium oxide film and the platinum film can be expressed by the following formula.
Formula: E _IrPt = γ _Pt (1 + cos θ)
Here, θ represents the contact angle of the platinum aggregate, and γ _Pt represents the surface energy of the platinum aggregate.

  From the above equation, the relative value of the adhesion energy in the case of using the iridium oxide film shown in FIG. 1 when the adhesion energy in the case of using the conventional iridium oxide film shown in FIG. .23. Therefore, it can be seen that the iridium oxide film shown in FIG. 1 has an effect of improving the adhesion energy of 23% as compared with the conventional iridium oxide film shown in FIG.

  Also from the above results, the iridium oxide film of the present invention has the (110) crystal plane selectively oriented as described above, and thus the film surface has a larger unevenness than the conventional iridium oxide film. Adhesion is considered to increase due to the anchor effect and the effects of van der Waals forces.

  On the other hand, such an iridium oxide film in which the (110) crystal plane is selectively oriented can be obtained by controlling the film formation temperature and the sputtering pressure within a predetermined range in the film formation as described above. .

Here, the film formation conditions of the iridium oxide film shown in FIG. 1 were changed, and changes in the X-ray diffraction intensity I ₁₁₀ from the (110) crystal plane and the (200) X-ray diffraction intensity I ₂₀₀ from the crystal plane were examined. . I ₁₁₀ and I ₂₀₀ are relative intensities.

Specifically, the sputtering pressure is 0.69 Pa (5.2 mTorr), 0.89 Pa (6.7 mTorr), 1.09 Pa (8.2 mTorr) under the film forming conditions of the iridium oxide film shown in FIG. The film formation was performed at 28 Pa (9.6 mTorr) and 1.47 Pa (11.0 mTorr). FIG. 5 shows changes in I ₁₁₀ and I ₂₀₀ with respect to changes in the sputtering pressure.

On the other hand, under the iridium oxide film formation conditions shown in FIG. 1, the film formation temperature was changed to 200 ° C., 250 ° C., 275 ° C., 300 ° C., 350 ° C., 375 ° C., 400 ° C., 425 ° C., and 500 ° C. Went. FIG. 6 shows changes in I ₁₁₀ and I ₂₀₀ with respect to changes in temperature.

  As shown in FIGS. 5 and 6, the (110) crystal plane is selected by controlling the film formation temperature and the sputtering temperature within a predetermined range (specifically, the above range) when forming the iridium oxide film. It can be seen that an oriented iridium oxide film can be obtained.

[2] Electrode, Dielectric Capacitor, Semiconductor Device Hereinafter, an electrode, a dielectric capacitor, a semiconductor device, and a manufacturing method thereof according to the present invention will be described with reference to the drawings. In addition, the same code | symbol is provided to the member which has the substantially same function through all the drawings, and the overlapping description may be abbreviate | omitted.

  FIG. 7 is a cross-sectional view showing the structure of a preferred embodiment of the semiconductor device of the present invention. The semiconductor device in this embodiment is a stack type semiconductor device.

  A semiconductor device 10 illustrated in FIG. 7 includes a semiconductor substrate 12 having a region separated by an element isolation insulating layer 14, and a transistor 20 is formed on the semiconductor substrate 12. A dielectric capacitor 40 is formed above the semiconductor substrate 12 and the transistor 20 via a first interlayer insulating film 30. Further, a second interlayer insulating film 70 is formed so as to cover the dielectric capacitor 40.

  The dielectric capacitor 40 is the dielectric capacitor of the present invention. As shown in FIG. 7, the dielectric capacitor 40 has a configuration in which a lower electrode film 50, a dielectric film 60, and an upper electrode film 62 are sequentially stacked from the side close to the semiconductor substrate 12.

The electrode of the present invention is applied to the lower electrode film 50. As shown in FIG. 7, the lower electrode film 50 has a configuration in which, for example, a TiAlN film 52, an iridium film 54, an iridium oxide film 56, and a platinum film 58 are sequentially stacked from the side close to the semiconductor substrate 12.
Here, the above-described iridium oxide film of the present invention is applied to the iridium oxide film 56.

  In the present embodiment, the thicknesses of the TiAlN film 52, the iridium film 54, the iridium oxide film 56, and the platinum film 58 are, for example, 50 nm, 50 nm, 50 nm, and 100 nm, respectively. The film thickness can be optimized as needed depending on the function of the semiconductor device and the like.

The lower electrode film 50 is not limited to the above-described configuration. For example, from the side close to the semiconductor substrate 12, a four-layer configuration such as a TiN film / iridium film / iridium oxide film / platinum film, a TiAlN film / iridium oxide film / platinum film, etc. A three-layer structure may be used, and of course, a two-layer structure such as an iridium oxide film / platinum film may be used. Instead of the platinum film 58, for example, a metal film such as a Pd film or an Au film may be used. However, in the present embodiment, the lower electrode film 50 includes at least a configuration of an iridium oxide film / metal film from the side close to the semiconductor substrate 12.
Further, since the lower electrode film 50 is a stack type semiconductor device in the present embodiment, all the stacked films need to be conductive films.

In the present embodiment, for example, an SrBi ₂ Ta ₂ O ₉ film is used as the dielectric film 60. However, the dielectric film 60 is not limited to this, for example, other metal oxide ferroelectrics (hereinafter may be abbreviated as “ferroelectric”), metal oxide paraelectric (hereinafter “high dielectric”). Or the like.) May be used. In the present invention, the high dielectric is defined as a paraelectric having a relative dielectric constant of 10 or more.

Examples of the ferroelectric include Bi layered compound (SBT) and lead zirconate titanate (PZT). Examples of Bi layered compounds include SrBi ₂ Ta ₂ O ₉ used in the present embodiment, SrBiTaO compounds in other compositions, and compounds obtained by adding (or substituting) additives (for example, Nb) to SrBiTaO. Can be mentioned. Further, as lead zirconate titanate, Pb (Zr _1-x Ti _x ) O ₃ , PbZrTiO in other compositions, and a compound obtained by adding (or replacing) an additive (for example, La, Ca, etc.) to PbZrTiO, Examples thereof include a compound (BLT) obtained by adding lanthanum to bismuth titanate. In addition, the ferroelectric material includes those obtained by dissolving other dielectric materials in the above-described ferroelectric material.
Examples of the high dielectric material include BST ((Ba, Sr) TiO ₃ ), STO (SrTiO ₃ ), and BTO (BaTiO ₃ ).
The thickness of the dielectric film 60 is, for example, 120 nm in the present embodiment, but can be optimized as needed depending on the function of the semiconductor device.

  In the present embodiment, for example, a platinum film is used for the upper electrode film 62. However, the upper electrode film 62 is not limited to this, and for example, an iridium oxide film, a ruthenium oxide film, or the like can be used. The thickness of the upper electrode film 62 is, for example, 150 nm in the present embodiment, but can be optimized as needed depending on the function of the semiconductor device and the like.

As illustrated in FIG. 7, the transistor 20 is formed in a region on the semiconductor substrate 12 separated by the element isolation insulating layer 14, and includes a source region 22, a drain region 24, a gate insulating film 26, and a gate electrode 28. It consists of
The source region 22 and the drain region 24 are formed on the surface of the semiconductor substrate 12 so as to be separated from each other by implanting impurities such as ions. The gate electrode 28 is formed on the active region between the source region 22 and the drain region 24 via the gate insulating film 26.

  In the present embodiment, the semiconductor substrate 12 is a silicon substrate. However, the present invention is not limited to this. For example, an SOI (Silicon on Insulator) substrate or the like can also be used.

  In the present embodiment, the element isolation insulating layer 14 has a configuration in which, for example, the surface of the semiconductor substrate 12 is locally oxidized, but is not limited thereto, and an insulating thin film formed on the surface of the semiconductor substrate 12, etc. Other configurations can also be applied.

  The first interlayer insulating film 30 is formed so as to cover the transistor 20. The second interlayer insulating film 70 is formed so as to cover the first interlayer insulating film 30 and the dielectric capacitor 40.

  As shown in FIG. 7, a first contact hole 32 and a third contact hole 72 are formed in the first interlayer insulating film 30 and the second interlayer insulating film 70, respectively. 76 is embedded. One of the first plugs 36 is electrically connected to the drain region 24 of the transistor 20 and the other is electrically connected to the third plug 76. One of the third plugs 76 is electrically connected to the first plug 36 and the other can be electrically connected to the outside. With this configuration, the drain region 24 of the transistor 20 is electrically connected to the outside.

  Further, as shown in FIG. 7, a second contact hole 34 is formed in the first interlayer insulating film 30, and a second plug 38 is embedded therein. One of the second plugs 38 is electrically connected to the source region 22 of the transistor 20 and the other is electrically connected to the lower electrode film 50 of the dielectric capacitor 40. With this configuration, the source region of the transistor 20 is electrically connected to the dielectric capacitor.

  Further, as shown in FIG. 7, a fourth contact hole 74 is formed in the second interlayer insulating film 70, and a fourth plug 78 is embedded therein. One of the fourth plugs 78 is electrically connected to the upper electrode film 62 of the dielectric capacitor 40 and the other can be electrically connected to the outside. With this configuration, the dielectric capacitor 40 is electrically connected to the outside.

  In the present embodiment, for example, tungsten is used for the first plug 36, the second plug 38, the third plug 76, and the fourth plug 78. However, the present invention is not limited to this, and a conductive material such as copper is used. Can do.

  Next, the semiconductor device 10 according to the present embodiment will be described in more detail according to the method for manufacturing the semiconductor device of the present embodiment with reference to the drawings.

First, as shown in FIG. 8A, a semiconductor substrate 12 is prepared.
Next, as shown in FIG. 8B, a predetermined position on the surface of the semiconductor substrate 12 is locally oxidized, for example, thereby forming an element isolation insulating layer 14 for separating the elements from each other. .

  Next, a diffusion layer is formed by performing ion implantation, for example, in part of the region separated by the element isolation insulating layer 14 to form the source region 22 and the drain region 24. Here, the source region and the drain region are formed so as to be separated from each other, and an active region is formed between the regions.

  Next, for example, a silicon oxide film and a polysilicon film are sequentially laminated on the surface of the active region of the semiconductor substrate 12 and patterned by photolithography and etching, thereby forming a gate insulating film 26 and a gate electrode 28, respectively. To do.

  Next, as shown in FIG. 8C, an insulating film (for example, a silicon oxide film) is formed by, for example, chemical vapor deposition (CVD) so as to cover the transistor 20 and the element isolation insulating layer 14 on the semiconductor substrate 12. The first interlayer insulating film 30 is formed by planarizing the surface of the film by, for example, a chemical mechanical polishing (CMP) method.

  Next, photolithography and etching are sequentially performed on the first interlayer insulating film 30 so as to penetrate the first interlayer insulating film 30 and reach the drain region 24 and the source region 22 of the transistor 20. A first contact hole 32 and a second contact hole 34 are formed respectively.

  Further, for example, tungsten is buried in the first contact hole 32 and the second contact hole 34 by, for example, sputtering, and then CMP is performed until the surface is substantially flush with the surface of the first interlayer insulating film 30. Thus, the first plug 36 and the second plug 38 are formed.

  As shown in FIG. 8D, the dielectric capacitor 40 is formed on the first interlayer insulating film 30 so that the lower electrode film 50 is electrically connected to the second plug 38.

Specifically, first, a TiAlN film 52 and an iridium film 54 are sequentially formed on the surface of the first interlayer insulating film 30 by a sputtering method. The TiAlN film 52 is formed so as to be electrically connected to the second plug 38.
Next, an iridium oxide film 56 is formed on the surface of the iridium film 54 by using the iridium oxide film manufacturing method of the present invention.
Further, a platinum film 58 is formed on the surface of the iridium oxide film 56 by sputtering.

  Next, a dielectric film 60 is formed on the surface of the platinum film 58. The dielectric film 60 is formed as follows, for example. First, an SBT precursor solution containing strontium (Sr), bismuth (Bi), and tantalum (Ta) is applied on the surface of the platinum film 58 by, for example, a spin coating method, and then 750 in an oxygen atmosphere. Heat treatment is performed at 5 ° C. for 5 hours.

  Further, the upper electrode film 62 is formed on the surface of the dielectric film 60 by sputtering.

  Finally, each of the formed films is sequentially subjected to photolithography and etching, so that the lower electrode film 50 including the TiAlN film 52, the iridium film 54, the iridium oxide film 56, and the platinum film 58, the dielectric film 60, Then, the dielectric capacitor 40 having the upper electrode film 62 is formed.

  As shown in FIG. 8-3 (E), an insulating film (for example, a silicon oxide film, a silicon nitride film, etc.) is formed by CVD, for example, so as to cover the dielectric capacitor 40 and the first interlayer insulating film 30. The second interlayer insulating film 70 is formed by planarizing the surface of the film by, for example, the CMP method.

  Next, photolithography and etching are sequentially performed on the second interlayer insulating film 70 so as to penetrate the second interlayer insulating film 70 and reach the first plug 36 and the upper electrode film 62 of the dielectric capacitor 40. Then, a third contact hole 72 and a fourth contact hole 74 are formed, respectively.

  Further, for example, tungsten is buried in the third contact hole 72 and the fourth contact hole 74 by, for example, sputtering, and then CMP is performed until the surface is substantially flush with the surface of the second interlayer insulating film 70. The third plug 76 and the fourth plug 78 are formed.

  In this way, the semiconductor device 10 in this embodiment can be manufactured.

  In the semiconductor device 10 according to the present embodiment described above, since the iridium oxide film of the present invention is used as the iridium oxide film 56, the adhesion between the iridium oxide film 56 and the platinum film 58 is high, and the semiconductor device is manufactured. In the process (particularly, the process of forming the dielectric film after forming the lower electrode), even if high temperature treatment is applied, delamination between the iridium oxide film and the platinum film due to the difference in thermal expansion coefficient is suppressed. For this reason, the performance of the semiconductor device 10 can be maximized.

  Furthermore, since the semiconductor device 10 according to the present embodiment uses the iridium oxide film manufacturing method of the present invention in the step of forming the iridium oxide film 56, the adhesion between the iridium oxide film 56 and the platinum film 58 is improved. In the same manner as described above, the performance of the semiconductor device 10 can be maximized.

  For this reason, the present invention is particularly effective for a stack type semiconductor device in which the lower electrode must be formed of a conductive film as in the semiconductor device of the present embodiment.

  In the present embodiment, a stack type semiconductor device is used, but a semiconductor device having another configuration such as a planar type may be used according to circumstances.

It is sectional drawing of an example of the iridium oxide film of this invention. It is sectional drawing of an example of the conventional iridium oxide film. It is sectional drawing of an example of the iridium oxide-platinum laminated film after a high temperature process in the case of using the iridium oxide film of this invention. It is sectional drawing of an example of the iridium oxide-platinum laminated film after a high temperature process in the case of using the conventional iridium oxide film. It is a graph which shows the iridium oxide film crystal plane orientation when changing sputtering pressure among the film-forming conditions of an iridium oxide film. It is a graph which shows iridium oxide film crystal plane orientation when changing film-forming temperature among the film-forming conditions of an iridium oxide film. It is sectional drawing which shows the structure of suitable one Embodiment of the semiconductor device of this invention. It is process drawing which shows an example of the manufacturing method of the semiconductor device of this invention. It is process drawing which shows an example of the manufacturing method of the semiconductor device of this invention. It is process drawing which shows an example of the manufacturing method of the semiconductor device of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Semiconductor device 12 ... Semiconductor substrate 20 ... Transistor 40 ... Dielectric capacitor 50 ... Lower electrode film (1st electrode)
56 ... Iridium oxide film 58 ... Platinum film (metal film)
60: Dielectric film 62: Upper electrode film (second electrode)

Claims (6)

Using a target containing iridium, a flow rate ratio between the oxygen and a gas other than oxygen (flow rate F _{O2 of the} oxygen gas / flow rate F _I of the gas other than oxygen) is 0.25 or more. By the reactive sputtering method in which sputtering is performed while introducing a gas of 0.40 or less, the sputtering output (DC sputtering power) is 0.5 kW to 1 kW, and the deposition temperature is 275 ° C. to 400 ° C. And a sputtering pressure of 0.69 Pa (5.2 mTorr) or more and 1.09 Pa (8.2 mTorr) or less. (110) An iridium oxide film that forms an iridium oxide film with a crystal plane selectively oriented Production method. An iridium oxide film forming step of forming an iridium oxide film using the method of manufacturing an iridium oxide film according to claim 1 ;
A metal film forming step of forming a metal film on the surface of the iridium oxide film;
The manufacturing method of the electrode containing this. The method of manufacturing an electrode according to claim 2 , wherein the metal film includes platinum. A first electrode forming step of forming the first electrode using the electrode manufacturing method according to claim 2 ,
Forming a dielectric film on the surface of the metal film of the first electrode; and
A second electrode forming step of forming a second electrode on the surface of the dielectric film;
A method for manufacturing a dielectric capacitor comprising: A semiconductor substrate preparation step of preparing a semiconductor substrate;
Forming a transistor on the semiconductor substrate; and
A dielectric capacitor forming step of forming a dielectric capacitor above the semiconductor substrate using the dielectric capacitor manufacturing method according to claim 4 . 6. The method of manufacturing a semiconductor device according to claim 5 , further comprising a connection step of electrically connecting the first electrode of the dielectric capacitor and the transistor.