KR19990021150A - Method and apparatus for detecting codeword transition in digital video home system - Google Patents

Abstract

Disclosed are a code word transition detection method and apparatus capable of detecting a transition of digital data received from the outside in a digital video home system. The syndrome calculating unit calculates a syndrome of the input data having the first data information and the first parity information, and provides the first parity information of the input data when the calculated syndrome value is equal to the setting value. The parity generating unit generates and provides second parity information about the first data information and the first data information of the input data having the first parity information. The parity comparison unit compares the first parity information from the syndrome calculating unit with the second parity information from the parity generating unit and provides a parity comparison signal indicating whether an error of the input data occurs. The transition determining unit receives the first parity information from the syndrome calculating unit and the parity comparison signal from the parity comparison unit to determine whether the input data has a code with transition, and provides a transition determination signal. Therefore, it is possible to detect whether or not the digital data received from the outside is transitioned, and thus it is possible to prevent the deterioration of the image quality and the sound quality generated when the error-prone data is recorded or reproduced on the recording medium.

Description

Method and apparatus for detecting codeword transition in digital video home system

The present invention relates to a digital video home system, and more particularly, to a method and apparatus for detecting a code word transition in a digital video home system for detecting whether a received digital data is transmitted from an external source.

The Digital Video Home System (hereinafter referred to as 'DVHS') is a bit stream storage device having a function of storing and outputting compressed or processed data such as digital broadcasting on a tape without processing.

Thus, the digital video home system does not require an analog-to-digital converter / digital-analog converter, and a compression / reduction function. Of course, these signals are converted into video and audio signals through a conversion device and output as signals that can be recognized by humans.

In such a digital video home system, data received from the outside is controlled by a memory composed of a dynamic random access memory (DRAM), a memory controller, and a DVHS channel codec controlling the memory controller.

In addition, the received data is detected by the Reed Solomon encoder RS ENCODER and the Reed Solomon decoder RS DECODER, and error detection of the received data and error correction of the received data are performed.

In particular, when the external reception data is input from the memory, the Reed-Solomon decoder checks a syndrome of the input external reception data and calculates a syndrome value. In addition, it is determined whether the calculated syndrome value of the received data matches the already set syndrome reference value, for example, a value of '0', and when the syndrome value of the external received data matches the syndrome reference value, the external received data is determined to be valid normal data. If not, it is determined that an error has occurred in the externally received data, and the externally received data having the error is not used as data.

However, according to the conventional externally received data error detection method described above, if an error equal to or greater than a minimum distance that can determine whether an externally received data error occurs in a code word constituting the externally received data, a code is generated. The word transitions to a code word with information that is completely different from the original received data.

In addition, when the syndrome value of the received data having the shifted code word has a value of '0', a serious problem arises in that the Reed-Solomon decoder determines external received data having completely different information as valid normal data.

The present invention proposed to solve the above problems is to provide a code word transition detection method in a digital video home system that can detect whether or not the received digital data transition from the outside.

Another object of the present invention is to provide an apparatus for detecting a code word transition in a digital video home system capable of detecting whether or not the received digital data is transmitted from the outside.

1 is a block diagram schematically showing the configuration of a channel codec of a digital video home system according to an embodiment of the present invention;

2 is a block diagram showing the configuration of an apparatus for detecting code word transitions in a digital video home system according to an embodiment of the present invention; And

3 is a flowchart illustrating a code word transition detection method of a digital video home system according to an embodiment of the present invention.

Explanation of symbols for main parts of the drawings

110: set top box 120: time stamp generator

130: memory 140: dummy filter

150: smoothing / de-smoothing buffer 160: time stamp comparator

170: first packageizer 180: Reed-Solomon encoder

190: Reed-Solomon decoder 192: syndrome calculation unit

194: parity generating unit 196: parity comparison unit

198: transition determining unit 200: track formatter / track deformatter

210: sync pattern detector 220: second packager

230: memory controller 240: first shuffler

250: second shuffler 260: i-D straightener

270: error information register 280: scrambler / descrambler

290: data controller 300: the ID generator

310: microcontroller 320: switching pulse generator

330: pre-encoder 340: deck

According to the present invention for achieving the above object, the code word detection method in the digital video home system, receiving the received digital data having the first data information and the first parity information from the outside to receive the syndrome value of the received digital data; Calculating; Determining whether the calculated syndrome value is the same as a set value, outputting received digital data if it is the same, and calculating a syndrome value of the next received digital data if it is not the same; Generating second parity information on the first data information of the output digital data; Determining whether the first parity information and the second parity information of the output received digital data are the same, and generating a signal indicating that the received digital data having the first data information and the first parity information is valid if they are the same; Wow; And generating a signal indicating that the received digital data having the first data information and the first parity information is invalid when the first parity information and the second parity information are not the same.

According to the present invention for achieving the above object, the code word detection apparatus in the digital video home system receives the received digital data having the first data information and the first parity information from the outside to determine the syndrome value of the received digital data. Syndrome calculation means for calculating and providing first parity information of the received digital data in response to the result; Parity generating means for generating and providing second parity information with respect to the first data information of the received digital data; Parity comparison means for comparing a first parity information from said syndrome calculating means and a second parity information from said parity generating means to provide a parity comparison signal informing whether or not an error of received digital data has occurred; And a transition determining means for receiving a first parity information from the syndrome calculating means and a parity comparison signal from the parity comparing means to determine whether the first data information of the received digital data has transitioned and providing a transition determination signal. Include.

By such a code word detection method and apparatus in a digital video home system, it is possible to detect whether or not a specific data received from the outside is transitioned, and thus the image quality and sound quality generated by recording or playing back the error-prone data on a tape. Can be prevented from deteriorating.

Best Mode for Carrying Out the Invention Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a block diagram illustrating the configuration of a digital video home system channel codec having a code word transition detection device according to an embodiment of the present invention.

Referring to FIG. 1, a digital video home system channel codec according to an embodiment of the present invention may include a time stamp generator 120, a memory 130, a dummy filter 140, a smoothing / de smoothing buffer 150, and a time stamp. The comparator 160, the first packager 170, the Reed-Solomon encoder 180, the Reed-Solomon decoder 190, the track formatter 200, the sync pattern detector 210, and the second packager ( 220), memory controller 230, first shuffler 240, second shuffler 250, eye de-calibrator 260, error information register 270, scrambler and inverse scrambler 280, data controller 290, the ID generator 200, and the microcontroller 310 are included.

The functions of the components of the digital video home system channel codec as described above are as follows.

First, the time stamp generator 120 streams an MPEG2 bit stream to each of the digital data of L bytes, where L is an integer of 2 or more, which is serially input in the form of a transport packet through the set top box 110 from the satellite. It receives the 27MHz clock synchronized to the program clock reference included in the TPE (Transport Packet Eliment), generates a 4-byte time stamp at 27MHz, makes 192 bytes of data, and outputs it to the smoothing buffer 150. .

The memory 130 stores 306 sync blocks from the first packager 170 as six tracks at addresses corresponding to the IDs included in the sync blocks, respectively. Constitute a sequence. In addition, the memory 130 stores the sync block from the track formatter 200 under the control of the data controller 290. The memory 130 is preferably configured as a dynamic random access memory (DRAM).

Next, the dummy filter 140 filters the dummy block in the sync block stored in the memory 130 and provides the normal sync block to the smoothing and de smoothing buffer 150.

Meanwhile, the smoothing / de-smoothing buffer 150 receives 192 bytes of TOE data including the time stamp from the time stamp generator 120, and the input time stamp is generated by the switching pulse generated by the switching pulse generator 320. Compared with the reference time stamp, the normal sync block is output in the same case, and the dummy sync block is output in the other case and stored in the internal memory bank. In addition, the smoothing and anti-smoothing buffer 150 temporarily stores the normal sync block from the dummy filter 140 and outputs a constant speed to the time stamp comparator 160.

The time stamp comparator 160 reads the time stamp of each sync block from the smoothing / de-smoothing buffer 150 and compares the value with a current reference time stamp to control the transmission time point to transmit the sync block. It transmits to a television via the set top box apparatus 110 according to the viewpoint.

Next, the first packetizer 170 divides the normal block stored in the smoothing and de smoothing buffer 150 into two sync blocks each having 96 bytes, and two bytes of ID, 3, and 3 for each sync block. Generate and store bytes of system data, the system data comprising two bytes of main header and one byte of data-AUX.

That is, the TPE data stores 96 bytes from 6 to 101 of the upper local memory bank in the first packager 170, and the remaining 96 bytes are stored in the lower local memory bank. While the data is being stored in the lower local memory, this indicates the ID of the sync block from address 0 to address 5 of the upper local memory, the track number to be stored, the number of the own sync block, and the current sync block data. The main header containing the recording system information is stored.

The first shuffler 240 shuffles 1836 sync blocks of six tracks stored in a memory, brings 102 sync blocks 18 times, and provides them to the Reed-Solomon encoder 180. The shuffling method allows neighboring bytes to come from different tracks in order to improve the error correction capability when a burst error of the tape occurs.

Meanwhile, the Reed-Solomon encoder 180 generates an internal correction code in a horizontal direction and an external correction code in a vertical direction for each of the 18 shuffled 102 sync blocks from the first shuffler 240 and generates an external correction code for each track. Generates 30 parity sync blocks, that is, 180 parity sync blocks. That is, RS coding is performed in units of ECC (Error Correction Code), and one track is composed of three ECCs. Each ECC shuffles data from six tracks to generate additional information. Note that the main data is sequentially recorded in track units, while the additional information for error correction is recorded in a shuffled form with a 30 sync block size at the top of the track.

External parity corrects up to 10 symbol errors, and the inner and sub codes have 4 and 2 symbol error correction capabilities, respectively. In addition, since the self-erasing function is performed, up to 10 error corrections can be performed in the case of the external ECC, and up to 2 symbols can be corrected in the sub code.

In addition, the second shuffler 250 shuffles the sync blocks of six tracks stored in the memory to bring 102 sync blocks 18 times and provides them to the Reed-Solomon decoder 190. The shuffling method described above is described above. The same as in the first shuffler 240.

Meanwhile, the Reed-Solomon decoder 190 performs error correction in units of ECC for sync blocks of six tracks shuffled by the second shuffler 250. External parity corrects up to 10 symbol errors, and the inner and sub codes have 4 and 2 symbol error correction capabilities, respectively. In addition, since the self-erasing function is performed, up to 10 errors can be corrected in the case of the external ECC, and up to 2 symbols can be corrected in the sub code.

Then, the track formatter / track deformatter 200 receives the sync data and the IDD generated from the ID generator 300 and synchronizes the sync data to each sync block of six tracks stored in the memory 130. And IDD are added, and each track is formed in accordance with the DVHS track format and provided to the scrambler and the inverse scrambler 280.

The sync pattern detector 210 distinguishes a preamble, a sub code, and a main code from a track having digital data in a bit serial form, and finds a boundary of each sync block unit in the main code area. That is, by detecting the shape of the data and its boundary point, the data is classified in units of sync blocks, and the data is provided to the second packager 220 together with the data.

The second packager 220 stores data divided in units of sink blocks detected by the sync pattern detector 210, and the stored sink block data is in a scrambled state.

On the other hand, the memory controller 230 generates a storage address and a control signal of the corresponding data required for each block to read and write data from the memory 130 under the control of the controller 290. That is, when the sink block data is to be stored from the first packager 170, the memory controller 230 generates a storage address using information of the header portion and stores the data together with the control signal. In addition, when there is a data request from the track formatter 200, the memory controller 230 generates an address and a read signal of the corresponding data, reads the data, and transfers the data to the track formatter 200.

When the ID information in the header of each sync block from the second packager 220 is damaged, the ID de-corrector 260 performs error correction and outputs the error to the scrambler and inverse scrambler 280. Used as an initialization value of the scrambler and inverse scrambler 280.

In addition, an error information register (EIR) 270 stores error information of each sync block from the Reed-Solomon decoder 190 to enable continuous data processing in order to reduce inefficient operation time. do.

The scrambler / descrambler 280 scrambles the formatted data from the track formatter 200 to the pre-encoder 330, and scrambles the scrambled data from the deck 340 to the second packager. Descrambling the output to the track formatter / track deformatter 200.

The pre-encoder 330 pre-encodes the scrambled data from the scrambler / descrambler 280 and stores the scrambled data on a tape mounted on the deck 340.

The controller 290 receives a data request request from the first packetizer 170, the Reed-Solomon encoder 180, and the track formatter 200, and controls the memory controller 230 to store and store the data. By providing a signal to the memory 130, it distributes time so that the memory can be accessed. In addition, the controller 290 stores the sub code data generated by the microcontroller 230 in the memory 130 and adds parity information to the track formatter / track deformatter 200.

FIG. 2 illustrates in detail the configuration of a code word transition detection device configured in the Reed-Solomon decoder 190 to determine whether a code word of input data from the memory 130 has transitioned. 3 is a flowchart illustrating a code word transition detection method of the code word transition detection device shown in FIG. 2.

Referring to FIG. 2, an apparatus for detecting code word transitions according to an embodiment of the present invention includes a syndrome calculating unit 192, a parity generating unit 194, a parity comparing unit 196, and a transition determining unit 198. Has a configuration.

The code word transition detection method of the code word transition detection device having the above-described configuration will be described in detail with reference to FIG. 3 as follows.

First, the syndrome calculating unit 192 receives the received digital data having the first data information and the first parity information of the predetermined bit from the memory 130 and calculates the syndrome of the received digital data (step S510).

Then, it is determined whether or not the calculated syndrome value of the received digital data matches a preset syndrome setting value, for example, a value of '0' (step S520), and the calculated syndrome value of the received digital data is equal to the syndrome setting value. If the same, the received digital data is output (step S540).

If the calculated syndrome value of the received digital data is not the same as the syndrome setting value, the syndrome of the next received digital data is calculated without outputting the currently received received digital data (step S530).

Next, the parity generator 194 generates new second parity information by using the first data information of the received digital data having the first data information and the first parity information input from the memory 130 ( Step S550).

Subsequently, the parity comparison unit 196 receives the first parity information of the received digital data from the syndrome calculating unit 192 and receives the second parity information of the received digital data from the parity generation unit 194. And whether the second parity information coincides with each other (step S560).

When the first and second parity information match, a comparison signal indicating that the received digital data is valid is generated (step S570). When the first and second parity information do not match, the received digital data is invalid. A comparison signal is generated to indicate that it is (step S580).

The received digital data having the first data information and the first parity information is received from the syndrome calculating unit 192, and the parity comparison unit 196 compares the result of comparing the first and second parity information. In response to the signal, the transition determining unit 198 generates a transition determination signal indicating whether a code word transition of the received digital data is detected (step S590).

According to the code word detection method and apparatus in the digital video home system as described above, it is possible to detect whether or not the received digital data is transmitted from the outside. Therefore, it is possible to prevent the error-prone data from being recorded or reproduced on the tape, and further, to solve the problem of deterioration in image quality and sound quality of the video cassette recorder of the digital video home system type.

As mentioned above, although this invention was demonstrated concretely by the above-mentioned preferable embodiment, this invention is not limited to this, A deformation | transformation and improvement are possible within the range of the common knowledge of a person skilled in the art.

Claims (3)

(a) receiving received digital data having first data information and first parity information from an external device and calculating a syndrome value of the received digital data; (b) determining whether the syndrome value calculated in step (a) is the same as the setting value, outputting received digital data if it is identical, and calculating syndrome values of the next received digital data if they are not identical; (c) generating second parity information on the first data information of the received digital data output in step (b); (d) determining whether the first parity information of the received digital data output in step (b) and the second parity information generated in step (c) are the same, and if so, the first data information and the first parity information Generating a signal indicating that the received digital data is valid; And (e) when the first parity information generated in step (a) and the second parity information generated in step (c) are not the same, indicating that the received digital data having the first data information and the first parity information are invalid. Generating a signal comprising the step of generating a signal. The method of claim 1, wherein the set value is '0'. Syndrome calculation means 192 for receiving the received digital data having the first data information and the first parity information from the outside to calculate a syndrome value of the received digital data, and providing the first parity information of the received digital data in response to the result. ); Parity generating means (194) for generating and providing second parity information for the first data information of the received digital data; Parity comparison means for comparing a first parity information from the syndrome calculating means 192 and the second parity information from the parity generating means 194 to provide a parity comparison signal indicating whether an error of received digital data has occurred. (196); And Providing a transition determination signal by receiving the first parity information from the syndrome calculating means 192 and the parity comparison signal from the parity comparing means 196 and determining whether the first data information of the received digital data has transitioned. Apparatus for detecting a code word transition in a digital video home system, characterized in that it comprises transition determining means (198).