KR19990010190A - Uniform Planar Waveguide Manufacturing Method - Google Patents
Uniform Planar Waveguide Manufacturing Method Download PDFInfo
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- KR19990010190A KR19990010190A KR1019970032888A KR19970032888A KR19990010190A KR 19990010190 A KR19990010190 A KR 19990010190A KR 1019970032888 A KR1019970032888 A KR 1019970032888A KR 19970032888 A KR19970032888 A KR 19970032888A KR 19990010190 A KR19990010190 A KR 19990010190A
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/401—Oxides containing silicon
- C23C16/402—Silicon dioxide
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/453—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating passing the reaction gases through burners or torches, e.g. atmospheric pressure CVD
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P3/00—Waveguides; Transmission lines of the waveguide type
- H01P3/10—Wire waveguides, i.e. with a single solid longitudinal conductor
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Abstract
본 발명은 균일한 평면 광도파로를 제작하는 방법에 관한 것으로, 균일한 평면 광도파로를 제작하는 방법은 기판에 하위 클래딩층을 증착한 후 증착된 표면을 연마하는 제1단계; 제1단계의 결과물위에 코아층을 증착한 후 증착된 표면을 연마하는 제2단계; 광도파로를 생성하기 위해 제2단계에서 표면 연마된 코아층을 패터닝 하는 제3단계; 및 제3단계에서 패터닝되어 생성된 광도파로 위에 상위 클래딩층을 증착한 후 증착된 표면을 연마하는 제4단계로 이루어진다.The present invention relates to a method of manufacturing a uniform planar optical waveguide, the method of manufacturing a uniform planar optical waveguide includes a first step of depositing a lower cladding layer on a substrate and then polishing the deposited surface; Depositing a core layer on the resultant of the first step and then polishing the deposited surface; A third step of patterning the surface polished core layer in a second step to create an optical waveguide; And a fourth step of depositing an upper cladding layer on the optical waveguide patterned and generated in the third step and then polishing the deposited surface.
본 발명에 의하면, 표면 평탄화 공정이 추가되어 광도파로의 두께 균일도가 증가하므로써 광도파로내의 유효굴절률이 균일하게 되고 보다 정밀한 광소자가 제작가능하다. 특히 AWG DeMUX의 경우 각 채널에서의 위상차가 원하는 값에 일치되어 누화가 감소된다.According to the present invention, the surface planarization process is added to increase the thickness uniformity of the optical waveguide, so that the effective refractive index in the optical waveguide is uniform and a more precise optical device can be manufactured. Especially for AWG DeMUX, phase difference in each channel Crosstalk is reduced by matching the desired value.
Description
본 발명은 광도파로 제작방법에 관한 것으로, 보다 상세하게는 균일한 평면 광도파로 제작방법에 관한 것이다.The present invention relates to a method for manufacturing an optical waveguide, and more particularly to a method for manufacturing a uniform planar optical waveguide.
평면 광도파로(Planar Lightwave Circuit)는 광통신용 소자를 제작하는 마이크로-옵틱(micro-optic) 방법의 단점을 보완하고 대량생산을 하기위해 개발되었다. 도 1a 내지 1c는 종래의 평면 광도파로 제작과정을 크게 구분하여 도시한 것으로, 도 1a는 기판(100)위에 하위 클래딩층(Lower Cladding layer, 102) 및 코아층(Core layer, 104) 증착단계를 나타내고, 도 1b는 도 1a의 코아층에 도파로(106)를 형성하는 패턴공정단계를 나타내며, 도 1c는 도 1b에서 형성된 도파로위에 상위 클래딩층(Upper Cladding Layer, 108) 증착단계 및 패키징단계(도시되지 않음)로 이루어진다.Planar lightwave circuits have been developed to compensate for the shortcomings of the micro-optic method for fabricating optical communication devices and for mass production. 1A to 1C illustrate a conventional planar optical waveguide manufacturing process. FIG. 1A illustrates a process of depositing a lower cladding layer 102 and a core layer 104 on a substrate 100. 1B illustrates a pattern process step of forming the waveguide 106 in the core layer of FIG. 1A, and FIG. 1C illustrates a process of depositing and packaging an upper cladding layer 108 on the waveguide formed in FIG. 1B. Is not made).
도 1d는 도 1a 내지 1c의 제작방법을 세분화한 흐름도로서, 도 1d에 따른 평면 광도파로 제작방법은 다음과 같다. 먼저, 막 증착공정에 의해 하위 클래딩 및 코아층이 증착된다(112단계). 막 증착은 폴리머(Polymer)와 같은 유기물질은 스핀코팅(spin coating), 무기물질은 화학기상증착법(Chemical Vapor Deposition, CVD), 변형된 CVD, 화염가수증착법(Flame Hydrolysis Deposition, FHD) 등의 방법으로 이루어진다. 이 때, 막 증착방법과 조건에 따라 약간의 차이는 있지만 두께의 불균일이 존재한다. 스핀코팅은 유기물질을 합성한 후 소정의 용매를 이용하여 그 농도 및 점도를 조절한 다음, 스핀코터(Spin coater)위에 분사시킨 후 고속으로 회전시켜 수 마이크로미터(μm)의 유기막을 형성하는 방법이다. CVD 방법은 증착시키고자하는 막의 원료가 되는 물질의 가스를 주입시켜 반응로에서 에너지를 주어 기판에 막을 형성하는 방법이다. 변형된 CVD에는 저압 CVD(Low Pressure CVD), APCVD(Atmosphere Pressure CVD), PECVD(Plazma Enhanced CVD) 등의 방법이 있다. FHD는 수소와 산소 불꽃을 이용하여 이용하여 반응가스를 합성하여 작은 입자(Soot)를 만든 후 기판위에 증착시키는 방법이다. 각각의 막 증착공정시 기판으로는 주로 실리콘 기판이 사용되고 이외에도 석영(Quartz), 산화알루미늄(Al2O3), 갈륨비소(GaAs), 인듐인화물(InP) 등의 산화물 및 III-V족 화합물 반도체 기판이 사용된다.FIG. 1D is a flowchart illustrating the manufacturing method of FIGS. 1A to 1C. The method of manufacturing the planar optical waveguide according to FIG. 1D is as follows. First, the lower cladding and the core layer are deposited by the film deposition process (step 112). Film deposition includes spin coating for organic materials such as polymer, chemical vapor deposition (CVD) for inorganic materials, modified CVD, flame hydrodeposition (FHD), etc. Is done. At this time, there is a slight difference depending on the film deposition method and conditions, there is a non-uniform thickness. Spin coating is a method of synthesizing organic materials, adjusting the concentration and viscosity using a predetermined solvent, spraying on a spin coater, and then rotating at high speed to form an organic film of several micrometers (μm). to be. The CVD method is a method of forming a film on a substrate by injecting a gas of a material that is a raw material of a film to be deposited to give energy in a reactor. Modified CVD includes low pressure CVD (Atmosphere Pressure CVD), plasma enhanced CVD (PECVD) and the like. FHD is a method of synthesizing a reaction gas using hydrogen and oxygen flame to make small particles and depositing them on a substrate. In each film deposition process, a silicon substrate is mainly used, and oxides of group III-V compounds such as quartz, aluminum oxide (Al 2 O 3 ), gallium arsenide (GaAs), and indium phosphide (InP) are used. Substrates are used.
패턴제작은 청정실내에서 이루어진다. 막이 증착된 웨이퍼는 세척 및 건조 과정을 거쳐 포토 레지스트(Photo Resist, PR) 스핀코팅이 이루어진다(116단계). 이 때, 상술한 112단계와 116단계 사이에 식각조건에 따라 금속 마스크가 증착되기도 한다(114단계). PR 스핀코팅 후, PR 패턴이 견고해지도록 베이킹되고(118단계) 마스크 정렬기(Mask aligner)를 이용하여 설계패턴이 웨이퍼 위에 전사된 다음 자외선이 조사된다(120단계). 자외선 조사에 의해 패턴이 형성되면 현상액을 사용하여 반응하지않은 PR을 벗겨내고(122단계), 건식 식각한다(124단계). 식각방법은 이온화 결합 플라즈마(Ionization Coupled Plazma) 혹은 반응성 이온빔 에칭(Reactive Ionbeam Etching)이 사용된다. 식각이 끝나면 패턴 마스크로 사용된 물질(PR이나 금속막)이 제거되고(126단계), 후 열처리(Post-Annealing)된 다음(128단계), 막 증착공정에 의해 상위 클래딩이 형성된다(130단계). 이러한 과정이 완료되면 웨이퍼 단위의 공정은 끝나고 각 소자 단위로 절단 가공된 후 패키징 과정을 거쳐 소자로 완성된다.Pattern production takes place in a clean room. After the film is deposited, the wafer is cleaned and dried, followed by photoresist (PR) spin coating (step 116). In this case, a metal mask may be deposited between etching steps 112 and 116 according to etching conditions (step 114). After the PR spin coating, the PR pattern is baked to be solid (step 118), and the design pattern is transferred onto the wafer using a mask aligner, and then ultraviolet rays are irradiated (step 120). When the pattern is formed by UV irradiation, the unreacted PR is peeled off using a developer (step 122), and dry etching (step 124). The etching method may be ionization coupled plasma or reactive ion beam etching. After etching, the material (PR or metal film) used as the pattern mask is removed (step 126), post-annealed (step 128), and an upper cladding is formed by a film deposition process (step 130). ). When this process is completed, the wafer process is completed, cut into each device unit, and then packaged to complete the device.
상술한 바와 같이 종래의 평면 광도파로 제작방법은 기본적으로 막을 증착하는 과정이 3번 반복되고, 다층구조(Multi-layer)의 소자를 만들 때는 그 이상이 필요하다. 이 경우, 막 증착 조건을 최적화시켜도 두께의 균일도가 2~3% 정도이다. 막의 두께가 일정하지 않으면 이를 기본으로 만들어지는 도파로의 두께도 같이 불균일하게 되고 이는 결국 소자 특성의 불균일을 초래하게 된다. 도 2a는 두께가 불균일한 광도파로의 단면을 도시한 것이고, 도 2b는 두께가 불균일한 광도파로의 측단면을 도시한 것이다. 참조번호 200은 기판, 202는 코아층 그리고 204는 클래딩층을 나타내며, d는 광도파로의 두께, w는 광도파로의 폭 그리고 l은 광도파로의 길이를 나타낸다. 상기한 두께의 불균일이 소자의 특성에 미치는 영향은 다음과 같다. 예를 들어, 어레이 도파로 디멀티플렉서(Arrayed WaveGuide Demultiplxer, AWG DeMUX)는 여러 파장이 섞여들어오는 입력 광신호의 파장을 분리하여 각각의 독립된 채널로 나눠준다. 이 때, 각 채널의 위상차는 일정한 간격으로 정해져야하고, 이 위상차는이 경로차, β가 도파로의 전파지수(propagation index)일 때,로 주어진다. 도파로의 전파지수 β는 k0가 파속(wave factor), d가 도파로의 두께, θ가 입사각일 때,로 주어지는데, 도파로가 균일하지 않으면 빛이 전파되는 도중 d가 변하게되고 결국 각 채널 끝단에서 원하는 특정 파장으로 분리되못하여 누화(cross talk)이 커지게 된다. 이것이 실제 소작 제작에 문제점으로 작용한다.As described above, in the conventional planar optical waveguide fabrication method, a process of depositing a film is basically repeated three times, and more than that is required when making a device having a multi-layer structure. In this case, even if the film deposition conditions are optimized, the uniformity of the thickness is about 2 to 3%. If the thickness of the film is not constant, the thickness of the waveguide made based on it is also uneven, which leads to non-uniformity of device characteristics. FIG. 2A shows a cross section of an optical waveguide of non-uniform thickness, and FIG. 2B shows a side cross section of an optical waveguide of non-uniform thickness. Reference numeral 200 denotes a substrate, 202 a core layer and 204 a cladding layer, d denotes an optical waveguide thickness, w denotes an optical waveguide width, and l denotes an optical waveguide length. The influence of the above-described thickness nonuniformity on the characteristics of the device is as follows. For example, an arrayed waveguide demultipler (AWG DeMUX) separates the wavelength of an incoming optical signal into multiple independent channels. At this time, the phase difference of each channel Should be set at regular intervals, and this phase difference When this path difference, β is the propagation index of the waveguide, Is given by The propagation index β of the waveguide is when k 0 is the wave factor, d is the thickness of the waveguide, and θ is the angle of incidence. If the waveguide is not uniform, d is changed during light propagation, and thus crosstalk is increased because it is not separated into a specific wavelength desired at each end of the channel. This is a problem in actual cauterization.
AWG DeMUX 소자 뿐 만 아니라 광도파로를 기본으로하는 소자에서는 이러한 문제점이 발생할 수 있다. 기본적으로 이로 인해 발생하는 오차가 허용범위 안에 들어오면 사용가능하지만 다층구조로 되어 보다 정밀한 광 신호의 제어가 필요한 소자인 경우 보다 정확한 광도파로가 요구된다.This problem can occur in devices based on optical waveguides as well as AWG DeMUX devices. Basically, if the error caused by this falls within the allowable range, it can be used, but in the case of a device that requires more precise optical signal control due to the multilayer structure, more accurate optical waveguide is required.
본 발명이 이루고자하는 기술적 과제는 2~3%되는 상/하위 클래딩층, 코아층의 두께 불균일을 해결하기위해 표면 평탄화 공정을 추가하여 막의 두께 차이를 최소화하므로써 표면 균일도를 증가시키는 균일한 평면 광도파로 제작방법을 제공함에 있다.The technical problem to be achieved by the present invention is to add a surface planarization process to solve the thickness nonuniformity of the upper and lower cladding layer, core layer 2 to 3% by uniform surface optical waveguide to increase the surface uniformity by minimizing the difference in film thickness To provide a manufacturing method.
도 1a 내지 1c는 종래의 평면 광도파로 제작과정을 도시한 것이다.1A to 1C illustrate a conventional planar optical waveguide fabrication process.
도 1d는 종래의 평면 광도파로 제작방법을 세분화한 흐름도이다.1D is a flowchart illustrating a conventional method for fabricating a planar optical waveguide.
도 2a는 두께가 불균일한 광도파로의 단면도이다.2A is a cross-sectional view of an optical waveguide having a non-uniform thickness.
도 2b는 두께가 불균일한 광도파로의 측단면도이다.2B is a side cross-sectional view of an optical waveguide having a non-uniform thickness.
도 3은 본 발명에 따른 균일한 평면 광도파로 제작방법에 대한 흐름도이다.3 is a flowchart illustrating a method of manufacturing a uniform planar optical waveguide according to the present invention.
도 4a 내지 4c는 표면 평탄화 과정을 도시한 것이다.4A-4C illustrate the surface planarization process.
상기 기술적 과제를 달성하기 위한, 본 발명에 따른 균일한 평면 광도파로 제작방법은 기판에 하위 클래딩층을 증착한 후 증착된 표면을 연마하는 제1단계; 상기 제1단계의 결과물위에 코아층을 증착한 후 증착된 표면을 연마하는 제2단계;광도파로를 생성하기 위해 상기 제2단계에서 표면 연마된 코아층을 패터닝 하는 제3단계; 및 상기 제3단계에서 패터닝되어 생성된 광도파로 위에 상위 클래딩층을 증착한 후 증착된 표면을 연마하는 제4단계를 포함함이 바람직하다.In order to achieve the above technical problem, a method for manufacturing a uniform planar optical waveguide according to the present invention includes a first step of depositing a lower cladding layer on a substrate and then polishing the deposited surface; A second step of depositing a core layer on the resultant of the first step and then polishing the deposited surface; a third step of patterning the surface polished core layer in the second step to generate an optical waveguide; And depositing an upper cladding layer on the optical waveguide patterned in the third step, and then polishing the deposited surface.
이하에서 첨부된 도면을 참조하여 본 발명을 보다 상세히 설명하기로 한다. 도 3은 본 발명에 따른 균일한 평면 광도파로 제작방법에 관한 흐름도로서, 도 3에 따른 균일한 평면 광도파로 제작방법은 하위 클래딩층 증착단계(300), 제1표면 연마계(310), 코아층 증착단계(320), 제2표면 연마단계(330), 패터닝 단계(340), 상위 클래딩층 증착단계(350) 및 제3표면 연마단계(360)로 이루어진다.Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. 3 is a flowchart illustrating a method of manufacturing a uniform planar optical waveguide according to the present invention. The method of manufacturing a uniform planar optical waveguide according to FIG. 3 includes a lower cladding layer deposition step 300, a first surface polishing system 310, and a core. The layer deposition step 320, the second surface polishing step 330, the patterning step 340, the upper cladding layer deposition step 350, and the third surface polishing step 360 are performed.
상/하위 클래딩층과 코아층의 막 증착단계(300, 320, 350)는 상술한 바와 같은 스핀 코팅, CVD, 저압 CVD, PECVD, APCVD 및 FHD중에서 한 방법이 사용된다. 기판도 상술한 실리콘, 석영, Al2O3, GaAs, InP 등의 산화물 및 III-V족 화합물 반도체 기판중의 하나가 사용된다.The film deposition steps 300, 320 and 350 of the upper and lower cladding layers and the core layer may use one of the above-described spin coating, CVD, low pressure CVD, PECVD, APCVD, and FHD. As the substrate, one of the above-described oxides such as silicon, quartz, Al 2 O 3 , GaAs, InP, and a group III-V compound semiconductor substrate is used.
제1, 제2 및 제3표면 연마단계(310, 330, 360)는 표면을 평탄화하기위한 과정이다. 표면연마(polishing)에는 기계적 연마와 화학적 연마 방법이 있는데, 기계적 연마는 연마하고자하는 표면 물질의 경도(hardness) 이상되는 물질을 사용하여 물리적으로 표면을 조금씩 긁어내는 방법이고, 화학적 연마는 표면과 반응하는 화학물질을 사용하여 표면을 조금씩 녹여내는 방법이다. 상술한 두 연마방법을 결합한 기계화학적 연마법(Chemical Mechanical Polishing)이 사용되기도 한다. 기계화학적 연마방법은 화학약품을 사용하여 연마하고자하는 표면과 화학반응으로 표면의 특성을 변화시켜 기계적 연마효율을 증진시키는 방법으로, 특히 웨이퍼를 이용한 대량생산 공정이 가능하고 미세한 표면 연마가 가능한 반도체 공정에 많이 사용된다. 도 4a 내지 4c는 상술한 기계화학적 연마방법을 도시한 것으로, 도면의 ○는 연마제, ●는 화학약품을 나타낸다. 도 4a는 연마되지 않은 증착면을 나타내고, 도 4a의 400은 기판, 402는 증착막을 나타낸다. 도 4b는 404의 연마기구와 연마제, 화학약품을 이용하여 연마하는 과정을 나타내며, 도 4c는 연마된 후 표면이 균일하게 되었음을 보이는 도면이다.The first, second and third surface polishing steps 310, 330, and 360 are processes for planarizing the surface. Surface polishing includes mechanical and chemical polishing methods. Mechanical polishing is a method of physically scraping a surface by using a material that is more than the hardness of the surface material to be polished, and chemical polishing reacts with the surface. It is a method of melting the surface little by little using chemicals. Chemical Mechanical Polishing, which combines the two polishing methods described above, may also be used. Mechanochemical polishing method is a method of improving the mechanical polishing efficiency by changing the properties of the surface by chemical reaction with the surface to be polished using chemicals, especially a semiconductor process capable of mass production process using wafers and fine surface polishing Used a lot for 4A to 4C illustrate the above-described mechanochemical polishing method, in the drawings,? Denotes an abrasive and? Denotes a chemical. FIG. 4A shows an unpolished deposition surface, 400 in FIG. 4A shows a substrate, and 402 shows a deposited film. FIG. 4B illustrates a polishing process using a polishing apparatus, an abrasive, and chemicals of 404. FIG. 4C is a view showing that the surface is uniform after polishing.
예를 들어, 실리카 광도파로의 경우 표면연마 대상이 비피에스지(BPSG, Boron Phosporous Silica Glass)로서 주성분이 규소산화물(SiO2)이므로, 이와 반응하는 알칼리(Alkali, OH)중의 하나인 KOH가 첨가된 연마제(SiO2미립자, 세라믹 미립자 등)가 사용된다면 실리카 유리의 표면 특성이 달라지고, 화학반응에 의해 달라진 막의 표면 특성으로 인해 기계적 연마 효율이 증진된다.For example, in the case of the silica optical waveguide, the surface polishing target is BPSG (Borth Phosporous Silica Glass), and since the main component is silicon oxide (SiO 2 ), KOH, which is one of the alkali (Alkali, OH) reacting thereto, is added. If abrasives (SiO 2 fine particles, ceramic fine particles, etc.) are used, the surface properties of the silica glass are different, and the mechanical polishing efficiency is enhanced due to the surface properties of the film which are changed by the chemical reaction.
한편, 본 발명의 동작원리는 다음과 같다. 먼저 하위 클래딩층 막이 증착되고(300단계), 상술한 방법으로 표면 연마 작업이 수행된다(310단계). 그 위에 코아층 막이 증착되고(320단계) 다시 표면 연마 작업이 수행된다(330단계). 코아층의 증착 및 표면 연마 작업이 완료되면 패터닝이 이루어진다(340단계).On the other hand, the operation principle of the present invention is as follows. First, the lower cladding layer film is deposited (step 300), and the surface polishing operation is performed by the method described above (step 310). The core layer film is deposited thereon (step 320), and the surface polishing operation is performed again (step 330). When the deposition and surface polishing of the core layer is completed, patterning is performed (step 340).
패터닝 과정은 다음과 같다. 먼저, 웨이퍼가 세척된 후, PR 스핀코팅이 이루어진다(342단계). 342단계의 수행이전에 식각 조건에 따라 금속 마스크가 증착되기도 한다(341단계). PR 스핀코팅 후, PR 패턴이 견고해지도록 베이킹되고(343단계) 설계패턴이 웨이퍼 위에 전사된 다음 자외선이 조사된다(344단계). 자외선 조사에 의해 패턴이 형성되면 현상액을 사용하여 반응하지않은 PR을 벗겨내고(345단계), 건식 식각한다(346단계). 식각방법은 이온화 결합 플라즈마 혹은 반응성 이온빔 에칭이 사용된다. 식각이 끝나면 패턴 마스크로 사용된 물질(PR이나 금속막)이 제거되고(347단계), 후 열처리되어(348단계) 패터닝 과정이 완료된다.The patterning process is as follows. First, after the wafer is cleaned, PR spin coating is performed (step 342). Before performing step 342, a metal mask may be deposited according to an etching condition (step 341). After the PR spin coating, the PR pattern is baked to be solid (step 343), and the design pattern is transferred onto the wafer, followed by irradiation with ultraviolet light (step 344). When the pattern is formed by UV irradiation, the unreacted PR is removed using a developer (step 345), and dry etching (step 346). Etching methods use ionized plasma or reactive ion beam etching. After etching, the material (PR or metal film) used as the pattern mask is removed (step 347), and then heat-treated (step 348) to complete the patterning process.
패터닝 후, 막 증착공정에 의해 상위 클래딩이 형성되고(350단계), 표면 연마 작업이 수행된다(360단계).After patterning, the upper cladding is formed by the film deposition process (step 350), and the surface polishing operation is performed (step 360).
상술한 과정이 모두 종료되면, 이 과정들을 반복하여 다층구조의 소자를 제작할 수 있다.When all of the above processes are completed, these processes may be repeated to fabricate a multi-layered device.
상술한 방법으로 연마가 이루어진 단일모드 실리카 도파로의 경우 도파로의 두께 편차는 500Å이내로 줄어든다. 단일모드 실리카 도파로인 경우 코아층의 두께가 약 8μm이므로 두께 편차율이 0.6%가 되어 종래의 2~3%에 비해 균일도가 3~5배 가량 향상된다. 멀티모드(multimode)인 경우에는 도파로의 크기가 더 커지고 두께 편차는 변하지 않으므로 편차율은 더욱 줄어들게 된다. 따라서, 여러 개의 파장을 다루는 소자, 광의 전파길이가 긴 소자 또는 다층의 도파로를 갖는 소자 등에 이용가능하다.In the case of the single mode silica waveguide polished by the above-described method, the thickness variation of the waveguide is reduced to within 500 mW. In the case of the single mode silica waveguide, the thickness of the core layer is about 8 μm, so the thickness variation ratio is 0.6%, and the uniformity is improved by 3 to 5 times compared to the conventional 2 to 3%. In the case of multimode, the waveguide becomes larger in size and the thickness variation does not change, thereby reducing the variation rate. Therefore, the present invention can be used for devices that handle multiple wavelengths, devices with a long propagation length of light, or devices having multiple waveguides.
본 발명에 의하면, 표면 평탄화 공정이 추가되어 광도파로의 두께 균일도가 증가하므로써 광도파로내의 유효굴절률이 균일하게 되고 보다 정밀한 광소자가 제작가능하다. 특히 AWG DeMUX의 경우 각 채널에서의 위상차가 원하는 값에 일치되어 누화가 감소된다.According to the present invention, the surface planarization process is added to increase the thickness uniformity of the optical waveguide, so that the effective refractive index in the optical waveguide is uniform and a more precise optical device can be manufactured. Especially for AWG DeMUX, phase difference in each channel Crosstalk is reduced by matching the desired value.
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KR1019970032888A KR100509510B1 (en) | 1997-07-15 | 1997-07-15 | Fabrication for uniform planar waveguide |
JP10176899A JP2999751B2 (en) | 1997-06-27 | 1998-06-24 | Apparatus and method for producing silica film |
CN98102663.XA CN1115426C (en) | 1997-06-27 | 1998-06-26 | Apparatus for manufacturing silica film and method for manufacturing silica film using the same |
GB9813734A GB2326649B (en) | 1997-06-27 | 1998-06-26 | Apparatus for manufacturing silica film and method for manufacturing silica film using the same |
US09/104,984 US6280525B1 (en) | 1997-06-27 | 1998-06-26 | Apparatus for manufacturing silica film |
JP10193029A JP2902640B2 (en) | 1997-07-15 | 1998-07-08 | Manufacturing method of planar optical waveguide |
CN98103201A CN1105927C (en) | 1997-07-15 | 1998-07-13 | Fabrication method for uniform planar optical waveguide |
GB9815126A GB2327280B (en) | 1997-07-15 | 1998-07-14 | Fabrication method for uniform planar optical waveguide |
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JP2009205112A (en) * | 2008-02-29 | 2009-09-10 | Sumitomo Electric Ind Ltd | Optical waveguide and method of manufacturing the same |
JP6004550B2 (en) * | 2012-12-20 | 2016-10-12 | 日本碍子株式会社 | Seed crystal substrate, composite substrate and functional element |
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US4086001A (en) * | 1975-01-13 | 1978-04-25 | Honeywell Inc. | Planar optical waveguide |
US4169009A (en) * | 1977-03-30 | 1979-09-25 | United Technologies Corporation | Large area microstructure processing |
JPS5540477A (en) * | 1978-09-14 | 1980-03-21 | Nec Corp | Production of diffraction grating |
JPS5930508A (en) * | 1982-08-12 | 1984-02-18 | Matsushita Electric Ind Co Ltd | Optical waveguide |
NL8701478A (en) * | 1987-06-25 | 1989-01-16 | Philips Nv | METHOD FOR MANUFACTURING A PLANAR OPTICAL COMPONENT. |
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US5613995A (en) * | 1993-04-23 | 1997-03-25 | Lucent Technologies Inc. | Method for making planar optical waveguides |
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