KR19990004867A - Etching method of polysilicon film with high selectivity to silicon oxide film - Google Patents

Etching method of polysilicon film with high selectivity to silicon oxide film Download PDF

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KR19990004867A
KR19990004867A KR1019970029027A KR19970029027A KR19990004867A KR 19990004867 A KR19990004867 A KR 19990004867A KR 1019970029027 A KR1019970029027 A KR 1019970029027A KR 19970029027 A KR19970029027 A KR 19970029027A KR 19990004867 A KR19990004867 A KR 19990004867A
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polysilicon film
silicon oxide
film
etching
oxide film
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KR1019970029027A
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Korean (ko)
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신현상
선준협
조준희
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김영환
현대전자산업 주식회사
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Abstract

본 발명은 실리콘산화막에 대한 높은 선택비를 갖는 폴리실리콘막의 식각 방법을 제공하고자 하는 것으로, 이를 위해 본 발명은 반도체 장치 제조 방법에 있어서, 실리콘산화막 상에 폴리실리콘막이 덮힌 웨이퍼를 준비하는 단계; 및 소정량의 TMAH(tetramethyl-ammonium hydroxide)가 희석된 용액에서 상기 폴리실리콘막을 습식 식각하는 단계를 포함하여 이루어진다.The present invention is to provide a method of etching a polysilicon film having a high selectivity to the silicon oxide film, the present invention for the semiconductor device manufacturing method comprising the steps of: preparing a wafer covered with a polysilicon film on the silicon oxide film; And wet etching the polysilicon film in a solution in which a predetermined amount of tetramethyl-ammonium hydroxide (TMAH) is diluted.

Description

실리콘산화막에 대한 높은 선택비를 갖는 폴리실리콘막의 식각 방법Etching method of polysilicon film with high selectivity to silicon oxide film

본 발명은 반도체 장치 제조 방법에 관한 것으로, 특히 실리콘산화막에 대한 높은 선택비를 갖는 폴리실리콘막의 식각 방법에 관한 것이다.The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to an etching method of a polysilicon film having a high selectivity to a silicon oxide film.

반도체 제조 공정상에서 실리콘산화막에 대한 선택비를 가지도록 폴리실리콘막을 습식 식각하는 공정이 필요한 경우가 있는데, 이때, 하부층인 실리콘산화막과 선택비를 갖는 식각 처리(recipe)를 수행하여야 한다.In a semiconductor manufacturing process, a process of wet etching a polysilicon film is required in order to have a selectivity to a silicon oxide film. In this case, an etching process having a selectivity ratio with a silicon oxide film as a lower layer should be performed.

널리 사용되고 있는 종래의 폴리실리콘막 습식 식각 방법은, 질산과 불산이 혼합된 용액을 사용하는데, 먼저 질산에 의해 폴리실리콘막의 표면을 산화시켜 실리콘 산화물로 만든 후, 불산을 사용하여 실리콘산화막을 식각하는 방법이 사용되어 왔다. 그러나, 이 방법으로는 하부층인 실리콘산화막에 대한 선택비가 나쁘므로 실제 폴리실리콘막의 습식식각에 적용하기에는 한계가 있다.The conventional polysilicon film wet etching method, which is widely used, uses a solution in which nitric acid and hydrofluoric acid are mixed. First, the surface of the polysilicon film is oxidized with nitric acid to make silicon oxide, and then the silicon oxide film is etched using hydrofluoric acid. The method has been used. However, in this method, since the selectivity of the silicon oxide film as the lower layer is bad, there is a limit to the actual wet etching of the polysilicon film.

본 발명은 실리콘산화막에 대한 높은 선택비를 갖는 폴리실리콘막의 식각 방법을 제공함을 그 목적으로 한다.An object of the present invention is to provide an etching method of a polysilicon film having a high selectivity to silicon oxide film.

도 1은 2.38%의 TMAH가 희석된 탈이온수에서의 온도에 따른 폴리실리콘막의 식각속도를 나타내는 그래프.1 is a graph showing the etching rate of the polysilicon film according to the temperature in deionized water diluted 2.38% TMAH.

상기 목적을 달성하기 위한 본 발명의 폴리실리콘막의 식각 방법은, 반도체 장치 제조 방법에 있어서, 실리콘산화막 상에 폴리실리콘막이 덮힌 웨이퍼를 준비하는 단계; 및 소정량의 TMAH(tetramethyl-ammonium hydroxide)가 희석된 용액에서 상기 폴리실리콘막을 습식식각하는 단계를 포함하여 이루어진다.According to another aspect of the present invention, there is provided a method of etching a polysilicon film, the method comprising: preparing a wafer in which a polysilicon film is covered on a silicon oxide film; And wet etching the polysilicon film in a solution in which a predetermined amount of tetramethyl-ammonium hydroxide (TMAH) is diluted.

또한, 본 발명의 폴리실리콘막 식각 방법은 상기 TMAH가 희석된 용액에서 상기 폴리실리콘막을 습식식각하기 전에 폴리실리콘막 표면에 자연 성장된 산화막을 불산 용액에서 제거하는 단계를 더 포함하여 이루어진다.In addition, the polysilicon film etching method of the present invention further comprises the step of removing the oxide film naturally grown on the surface of the polysilicon film in the hydrofluoric acid solution before the wet etching of the polysilicon film in the solution diluted TMAH.

이하, 첨부된 도면 도 1을 참조하여 본 발명의 일실시예를 상세히 설명한다.Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

도 1은 2.38%의 TMAH(tetramethyl-ammonium hydroxide)가 희석된 탈이온수(deionized water)의 온도에 따른 폴리실리콘막의 식각속도를 나타내는 그래프로서, 폴리실리콘막의 습식식각 속도는 열적 활성 반응(thermal activation reaction)인데, 도면에 도시된 바와같이, 60℃의 온도에서 식각률(etch rate)이 가장 좋음을 알 수 있다.1 is a graph showing the etching rate of a polysilicon film according to the temperature of deionized water in which 2.38% of TMAH (tetramethyl-ammonium hydroxide) is diluted, and the wet etching rate of the polysilicon film is a thermal activation reaction. As shown in the figure, it can be seen that the etch rate is the best at a temperature of 60 ° C.

따라서, 실리콘산화막을 전혀 식각하지 않는 60℃의 탈이온수 + 2.38% TMAH 용액(이하, TMAH 용액이라 함)을 이용하여 폴리실리콘막의 습식식각을 수행함으로써, 하부층인 실리콘산화막에 대한 높은 선택비를 갖는 습식식각을 수행할 수 있는데, 60℃ 이외의 온도에서도 실리콘산화막에 대한 식각은 전혀 일어나지 않으므로, 여러 온도범위에서도 실리콘산화막에 대한 높은 선택비를 유지한 채 폴리실리콘막을 식각하는 것이 가능하다. 또한, TMAH 농도를 변화시켜도 폴리실리콘막의 습식식각 속도만이 변할 뿐이므로 실리콘산화막에 대한 높은 선택비를 유지한 채 폴리실리콘막의 식각이 가능하다.Accordingly, by performing wet etching of the polysilicon film using deionized water + 2.38% TMAH solution (hereinafter referred to as TMAH solution) at 60 ° C. which does not etch the silicon oxide film at all, it has a high selectivity to the silicon oxide film as the lower layer. The wet etching may be performed, but since the etching of the silicon oxide film does not occur at any temperature other than 60 ° C., the polysilicon film may be etched while maintaining a high selectivity to the silicon oxide film even at various temperature ranges. In addition, even if the TMAH concentration is changed, only the wet etching rate of the polysilicon film changes, so that the polysilicon film can be etched while maintaining a high selectivity to the silicon oxide film.

본 발명의 습식식각 방법이 실리콘 산화물에 대한 높은 선택비를 가지고 있어, 심지어 폴리실리콘막의 표면에 존재하는 자연산화막(native oxide)에 의해서도 폴리실리콘막의 습식식각이 진행되지 못하므로, 본 발명의 폴리실리콘막의 습식식각을 실시하기 전에 표면에 존재하는 자연산화막을 제거를 하여야 하는데, 이는 불산용액을 등을 이용하여 진행하여야만 한다.Since the wet etching method of the present invention has a high selectivity to silicon oxide, the wet etching of the polysilicon film does not proceed even by the native oxide present on the surface of the polysilicon film, so that the polysilicon of the present invention Before the wet etching of the film, the natural oxide film on the surface should be removed. This should be carried out using a hydrofluoric acid solution or the like.

반도체 제조 공정중 식각공정에서는 하부층에 대한 높은 선택비를 필수적으로 갖추어야만 실제 공정에 적용될 수 있는데, 본 발명의 경우에는 그 동안 하부층인 실리콘 산화물에 대해서 낮은 선택비를 가지고 있던 폴리실리콘막의 습식식각 방법을 대체할 수 있는 방법으로 실리콘 산화물을 전혀 식각하지 않고 폴리실리콘막만을 습식 식각할 수 있는 방법이다. 따라서 실리콘 산화물에 대한 높은 선택비를 요구하며 폴리실리콘막을 식각 하고자 하는 어떠한 공정에도 적용될 수 있다.In the etching process of the semiconductor manufacturing process, it is necessary to have a high selectivity for the lower layer to be applied to the actual process, in the case of the present invention, the wet etching method of the polysilicon film has a low selectivity for the silicon oxide, which is a lower layer in the past It is a method of replacing the silicon oxide is a method of wet etching only the polysilicon film without etching at all. Therefore, it requires a high selectivity to silicon oxide and can be applied to any process for etching a polysilicon film.

예를 들면, 기본적인 폴리실리콘막의 습식식각 외에도, 반도체 제조공정중 워드라인, 비트라인 및 스토리지노드(storage node) 등에 사용되고 있는 폴리실리콘막의 증착이 원하는 두께를 초과하여 증착되었을 경우나, 증착 후 규격(specification)에서 규정한 것보다 많은 불순물이 발생한 경우에 본 발명을 사용하여 재작업(rework)을 진행함으로써 웨이퍼 손실을 감소시킬 수 있다.For example, in addition to the wet etching of the basic polysilicon film, the deposition of the polysilicon film used for word lines, bit lines, and storage nodes during the semiconductor manufacturing process exceeds the desired thickness, If more impurities occur than specified in the specification, wafer loss can be reduced by reworking using the present invention.

본 발명은 실리콘산화막에 대한 높은 선택비를 갖는 폴리실리콘막의 식각 방법을 제공함으로써, 폴리실리콘막의 재작업 등에 유용하게 사용하여, 웨이퍼의 손실을 줄이는 등 특유의 효과를 준다.The present invention provides a method of etching a polysilicon film having a high selectivity to a silicon oxide film, which is useful for reworking a polysilicon film and the like, thereby reducing the loss of a wafer and providing unique effects.

Claims (4)

반도체 장치 제조 방법에 있어서,In the semiconductor device manufacturing method, 실리콘산화막 상에 폴리실리콘막이 덮힌 웨이퍼를 준비하는 단계; 및Preparing a wafer on which a polysilicon film is covered on a silicon oxide film; And 소정량의 TMAH(tetramethyl-ammonium hydroxide)가 희석된 용액에서 상기 폴리실리콘막을 습식식각하는 단계Wet etching the polysilicon film in a solution diluted with a predetermined amount of tetramethyl-ammonium hydroxide (TMAH) 를 포함하여 이루어진 폴리실리콘막 식각 방법.Polysilicon film etching method comprising a. 제1항에 있어서,The method of claim 1, 상기 TMAH가 희석된 용액에서 상기 폴리실리콘막을 습식식각하기 전에 폴리실리콘막 표면에 자연 성장된 산화막을 불산 용액에서 제거하는 단계를 더 포함하여 이루어지는 폴리실리콘막 식각 방법.And removing the oxide film grown naturally on the surface of the polysilicon film from the hydrofluoric acid solution before the wet etching of the polysilicon film in the TMAH-diluted solution. 제1항 또는 제2항에 있어서,The method according to claim 1 or 2, 상기 TMAH가 희석된 용액은 약 2.38%의 TMAH가 희석된 탈이온수인 것을 특징으로 하는 폴리실리콘막 식각 방법.The method of diluting the TMAH is polysilicon film etching method characterized in that the deionized water diluted with about 2.38% TMAH. 제3항에 있어서,The method of claim 3, 약 60℃의 상기 TMAH가 희석된 용액에서 상기 폴리실리콘막을 습식식각하는 폴리실리콘막 식각 방법.And etching the polysilicon film in a solution of the TMAH diluted at about 60 ° C.
KR1019970029027A 1997-06-30 1997-06-30 Etching method of polysilicon film with high selectivity to silicon oxide film KR19990004867A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010064043A (en) * 1999-12-24 2001-07-09 구본준, 론 위라하디락사 method for fabricating thin film transistor and array substrate for liquid crystal display device
KR100675733B1 (en) * 1999-12-16 2007-01-29 엘지.필립스 엘시디 주식회사 Method for fabricating array substrate in Liquid crystal display

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100675733B1 (en) * 1999-12-16 2007-01-29 엘지.필립스 엘시디 주식회사 Method for fabricating array substrate in Liquid crystal display
KR20010064043A (en) * 1999-12-24 2001-07-09 구본준, 론 위라하디락사 method for fabricating thin film transistor and array substrate for liquid crystal display device

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