KR19990003155A - Laser diode and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a laser diode and a method of manufacturing the same for realizing a complete forward mesa shape of a wafer after a mesa etching process. As a laser diode of a mesa structure on a wafer using a mask pattern formed of an insulating film according to the present invention, n Type InP buffer layer; InGaAsP active insects; p-type InP cladding layer; And InGaAs layers are sequentially stacked. In addition, the present invention is an n-type substrate; an n-type InP buffer layer; InGaAsP active layer; And a wafer having a structure in which p-type InP clad layers are sequentially stacked, comprising: growing an InGaAs layer on a p-type InP clad layer of the wafer; Depositing an insulating film on the InGaAs layer, and then forming an insulating film pattern having a tapered shape having a lower width wider than an upper width through a photolithography process on a predetermined region; And mesa etching the lower InGaAs layer and the wafer by using the insulating layer pattern as an etching mask pattern.

Description

Laser diode and manufacturing method thereof

The present invention relates to a laser diode and a method of manufacturing the same, and more particularly, to a laser diode and a method of manufacturing the same for realizing a complete forward mesa shape of a wafer after a mesa etching process.

In general, a laser diode using the principle of applying a current to a PN structure and causing in-phase photons to pass through a medium in the resonator and have coherence and induced emission and amplified light in a sufficiently inverted density region Is used as a compact disc, a laser printer, an optical disc memory, and a light source for optical communication.

Planar Buried Hetero-structure Laser Diodes (PBH-LDs) have a structure in which a planar active layer is buried between current blocking layers having a high band gap. The PBH-LD can inject a current into the active layer to increase efficiency, increase the localization of light due to the difference in refractive index, and reduce the threshold current as well as obtain optical mode stability. However, in order to obtain these characteristics, growth of a good current blocking layer adjacent to the active layer is essential.

In order to grow such a current blocking layer, a wafer having a structure in which an n-type substrate 100, an n-type InP buffer layer 101, an InGaAsP active layer 102, and a p-type InP lower clad layer 103 are sequentially stacked as shown in FIG. 1A. After forming a mask pattern 104 for mesa etching, and then etching using a non-selective etching solution of the HBr system. At this time, the mask pattern 104 is composed of a silicon oxide film in 11 directions formed by PECVD, the structure after the mesa etching process is as shown in Figure 1B. However, in this case, an inverted mesa shape having a 221 crystal plane is observed near the end (a) where the mask pattern 104 is in contact with the lower wafer. The 221 crystal plane is rich in indium (In) so that indium is dissolved when the current blocking layer is grown in a subsequent process, or phosphine (PH ₃ ) is used as a source gas when grown by a metal-organic chemical vapor deposition (MOCVD) method. Since the degree of decomposition of is lower than that of trimethyl indium (TMI), the bond with phosphorus is not easy, and thus the smooth bond with the current blocking gun is inhibited. Therefore, the above shape can be removed by adjusting the deposition conditions of the InP lower clad layer and the silicon oxide film, but it is difficult to guarantee the reproducibility of the process.

Thus, as mentioned above, a defect occurs at the interface between the wafer and the current blocking layer, which acts as a diffusion path for zinc (Zn) during subsequent growth of the p-type cladding layer and forms a path of leakage current. This prevents efficient current injection into the active layer and impairs the stability of the chip at a high temperature.

Accordingly, the present invention is directed to a wafer structure of a conventional PBH-LD in order to suppress the formation of an inverted mesa shape in the vicinity of a boundary between a mask pattern formed of a silicon oxide film or a silicon nitride film and a lower wafer contacted after mesa etching a wafer. It is an object of the present invention to provide a laser diode and a method of manufacturing the same, which realize a complete forward mesa shape by further stacking an InGaAs layer and controlling an etching pattern thereof.

1A and 1B are cross-sectional views showing a conventional PBH-LD wafer structure and its mesa shape.

2A and 2C are sectional views showing a process of forming a PBH-LD wafer and its mesa shape according to the present invention.

* Explanation of symbols for the main parts of the drawings

100, 200: n-type substrate, 101, 201: n-type InP buffer layer, 102, 202: active layer, 103, 203: n-type InP clad layer, 104, 205: mask pattern, 204: InGaAs layer

In order to achieve the above object, n-type InP buffer layer: InGaAsP active layer: p-type InP clad layer in the laser diode of the mesa structure on the wafer using a mask pattern formed of an insulating film according to the present invention; And InGaAs layers are sequentially stacked.

In addition, the present invention is an n-type substrate; an n-type InP buffer layer; InGaAsP active layer; And a wafer having a structure in which p-type InP clad layers are sequentially stacked, comprising: growing an InGaAs layer on a p-type InP clad layer of the wafer; Depositing an insulating film on the InGaAs layer. Next, forming an insulating film pattern having a tapered shape with a lower width wider than an upper width through a photolithography process on a predetermined region; And mesa etching the lower InGaAs layer and the wafer by using the insulating layer pattern as an etching mask pattern.

EXAMPLE

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

2A and 2C are cross-sectional views of forming a forward mesa structure of a laser diode according to an embodiment of the present invention. As shown in Fig. 2A, MOCVD on a wafer having a structure in which a conventional n-type substrate 200, an n-type InP buffer layer 201, an InGaAsP active layer 202, and a p-type IrP clad layer 203 are sequentially stacked. InGaAs layer 204 is grown by about 0.2 mu m. Next, as shown in FIG. 2B, a silicon oxide film in 11 directions is deposited on the InGaAs layer using a plasma enhanced CVD (PECVD) method, and then a mask pattern for mesa etching the wafer through photolithography is performed. 205). Here, a silicon nitride film may be deposited instead of the silicon oxide film, and the lower width of the shape of the mask pattern may be tapered in a shape wider than the upper width. Subsequently, the InGaAs layer and the wafer under the mask pattern are mesa-etched using a non-selective etching solution. Mesa etching is mainly an HBr-based etching solution using a mixture of HBr: H ₂ O ₂ : H ₂ O: HCl in a 10: 2: 20: 10, in order to minimize the etching rate between InP and the active layer INGaAsP. The etching is performed before the etching solution is stabilized. That is, it is used within 3 hours after mixing the etching solution. The cross-section of the wafer after etching is as shown in FIG. 2C. Unlike the related art, 221 plane is not generated at the boundary between the mask pattern and the lower layer. This forward mesa shape may be an effect that the adhesion between the mask pattern and the InGaAs layer is not good because the surface of the InGaAs layer is rougher than the InP cladding layer. Alternatively, the effect may be a difference in etching pattern according to gallium (Ga) and arsenic (As).

As described above, the present invention provides a conventional n-type substrate; an n-type InP buffer layer; InGaAsP active layer; And further stacking an InGaAs layer on a conventional PBH-LD wafer composed of a p-type InP clad layer and mesa etching with a mask pattern formed of a silicon oxide film or a silicon nitride film, thereby achieving a perfect forward mesa shape even at the contact boundary between the wafer and the mask pattern. By suppressing defects that may occur when forming the current blocking layer, the overall characteristics of the chip can be improved and the process can be reproduced.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.

Claims (9)

A laser diode having a mesa structure on a wafer using a mask pattern formed of an insulating film, the laser diode comprising: an n-type InP buffer layer; InGaAsP active layer: p-type InP clad layer; And InGaAs layers sequentially stacked. The laser diode of claim 1, wherein the insulating film is a silicon oxide film. The laser diode of claim 1, wherein the insulating film is a silicon nitride film. n-type substrate; an n-type InP buffer layer; InGaAsP active layer; And a wafer having a structure in which p-type InP clad layers are sequentially stacked. Growing an InGaAs layer on the p-type InP clad layer of the wafer; Depositing an insulating film on the InGaAs layer, and then forming an insulating film pattern having a tapered shape having a lower width wider than an upper width through a photolithography process on a predetermined region; And And mesa etching the lower InGaAs layer and the wafer by using the insulating layer pattern as an etching mask pattern. The method of manufacturing a laser diode according to claim 4, wherein the insulating film is a silicon oxide film. The method of manufacturing a laser diode according to claim 4, wherein the insulating film is a silicon nitride film. The method of claim 4, wherein the etching solution of mesa etching is a mixed solution of HBr: H ₂ O ₂ : H ₂ O: HCl. The method of claim 7, wherein the mixing solution of the mesa etching has a mixing ratio of 10: 2: 20: 10. The method of claim 4, wherein the InGaAs layer has a thickness of 0.2 μm.