KR19990002584U - Semiconductor package - Google Patents

Abstract

The present invention discloses a semiconductor package. A semiconductor package according to the disclosed subject matter includes a semiconductor chip having electrodes; A lead frame including an die pad to which the semiconductor chip is attached, and an inner lead and an out lead connected to electrodes of the semiconductor chip to form an electrical signal transmission path between the semiconductor chip and the outside; And a package body made of an epoxy resin for encapsulating a spatial region including the semiconductor chip and an inner lead electrically connected thereto, wherein the die pad of the lead frame is adapted to improve bonding strength with an epoxy resin on a lower surface thereof. Characterized in that the buffer layer is provided for.

Description

Semiconductor package

The present invention relates to a semiconductor package, and more particularly, to a semiconductor package coated with a Si or Si compound on the lower die pad of the lead frame.

In general, each semiconductor chip in which an integrated circuit is formed is packaged through an assembly process such as chip cutting, chip attaching, wire bonding, molding, and trimming / forming, and the semiconductor package is signaled to the outside of the semiconductor chip. The outlead of the lead frame which is a transmission path has the shape which protruded out of the package body.

In the above description, the lead frame includes an die pad to which the semiconductor chip is attached, an inner lead connected to the electrodes of the semiconductor chip to form an electrical signal transmission path, and an out lead exposed to the outside of the package body to serve as a connection lead. Accordingly, the lead frame forms a skeleton of the package and provides a path for dissipating heat generated in the semiconductor chip to the outside while forming an electrical signal transmission path between the semiconductor chip and the outside.

1 illustrates a semiconductor package according to the prior art, and as shown, a semiconductor chip 1 having a plurality of electrodes 1a is disposed on a down-set die pad 2a. The electrodes 1a of the semiconductor chip 1 are attached to each other via the inner lead 2b and the metal wire 3. In addition, the spatial region including the semiconductor chip 1 and the inner lead wire-bonded thereto is sealed by an epoxy resin to form the package body 4, and the outer lead 2c of the lead frame is formed outside the package body 4. ) Is exposed.

However, due to the low adhesion between the die pad and the epoxy resin, such a semiconductor package may cause delamination at their bonding sites, and when moisture is absorbed into the inside of the package body, moisture may be accumulated in the delaminated portion. There was a problem that the crack is generated by the concentration of the package is eventually destroyed.

Therefore, the present invention coats the lower surface of the die pad with Si or Si compound having excellent bonding force to the epoxy resin to prevent the delamination caused by the low adhesion between the die pad and the epoxy resin, and also the package due to the delamination phenomenon. An object of the present invention is to provide a semiconductor package capable of preventing crack generation inside the body.

1 is a cross-sectional view for explaining a semiconductor package according to the prior art.

2 is a schematic view for explaining a semiconductor package according to the first embodiment of the present invention;

3 is a schematic view illustrating a semiconductor package according to a second embodiment of the present invention.

4 is a schematic diagram illustrating a semiconductor package according to a third embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

10, 20, 30: semiconductor chip 11, 21, 31: die pad

12, 22, 33: coating material layer 13, 23, 34: the package body

32: adhesive tape

The above object is a semiconductor chip provided with electrodes; A lead frame including an die pad to which the semiconductor chip is attached, and an inner lead and an out lead connected to electrodes of the semiconductor chip to form an electrical signal transmission path between the semiconductor chip and the outside; And a package body made of an epoxy resin for encapsulating a spatial region including the semiconductor chip and an inner lead electrically connected thereto, wherein the die pad of the lead frame is adapted to improve bonding strength with an epoxy resin on a lower surface thereof. It is achieved by a semiconductor package according to the present invention characterized in that the buffer layer is provided for.

According to the present invention, by coating a Si or Si compound on the lower portion of the die pad, it is possible to prevent the delamination due to the low adhesion between the die pad and the epoxy resin during the molding process.

EXAMPLE

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

2 is a schematic diagram illustrating a semiconductor package according to a first embodiment of the present invention, in which a semiconductor chip 10 having electrodes is attached on a die pad 11 of a lead frame, and the semiconductor chip 10 and The lower die pad 11 is molded by the epoxy resin 13. Here, on the lower surface and the side surface of the die pad 11, as a buffer layer for improving the adhesion with the epoxy resin, a Si or Si compound, for example, SiC, SiN or Si ₃ N ₄ by a method such as CVD or plasma spraying. The coating material layer 12 is formed of one selected from among, and the coating material layer 12 can prevent the delamination caused by the low bonding force between the die pad 11 and the epoxy resin 13. .

In detail, the lead frame is generally made of Ni, Fe, or Cu metal. Since the lead frame made of such a material has a very low adhesive force with the epoxy resin, the bonding surface between the die pad to which the semiconductor chip is attached and the epoxy resin, that is, Delamination occurs on the bottom surface of the die pad. In addition, when moisture is absorbed into the package body in a state in which the delamination phenomenon occurs on the bottom surface of the die pad, moisture absorbed in the delaminated portion is concentrated and cracks due to moisture absorbed in this portion occur. Eventually package destruction occurs.

On the other hand, Si and Si-based compounds have a very good bonding strength because they chemically bond with the epoxy resin, so that the lamination between the coating material and the epoxy resin does not occur, thereby facilitating the bonding between the die pad and the epoxy. can do. In addition, the coating of Si or the Si compound is applied only to the lower surface and the side surface of the die pad, thereby not affecting the electrical characteristics of the lead frame.

FIG. 3 is a schematic diagram illustrating a semiconductor package according to a second embodiment of the present invention. As shown in FIG. 3, an ion beam sputtering method is applied to a lower surface of a die pad 21 to which a semiconductor chip is attached. By using a layer of coating material 22 made of Si or a Si compound. That is, when the CVD method is used, a coating material layer is formed on the bottom and side surfaces of the die pad, but in this case, Si ions are deposited on the bottom surface of the die pad, and as described above, the coating material layer 22 Since the bonding force with the epoxy resin 23 is excellent, the delamination phenomenon in the die pad lower surface does not occur.

4 is a schematic diagram illustrating a semiconductor package according to a third embodiment of the present invention, which is formed on the bottom surface of the die pad 31 by using a PVD or CVD method as in the first and second embodiments of the present invention. Instead of forming a coating material layer, an adhesive tape 32 or a coupling material having Si or a Si compound coated thereon or entirely included thereon is attached to the bottom surface of the die pad to form a coating material layer 33. do. In this case, the first and second embodiments of the present invention require a coating process for forming a coating material layer, whereas coating is performed by spraying Si or Si compound particles into the adhesive tape 32 having an adhesive component. Since the material layer 33 is formed, the cost for forming the coating material layer 33 can be reduced.

In the figure, reference numeral 30 denotes a semiconductor chip, and 34 denotes an epoxy resin.

As described above, the semiconductor package of the present invention forms a coating material layer made of Si or Si compound having excellent bonding strength with the epoxy resin on the lower surface of the die pad of the lead frame, thereby de-lamination due to low adhesion between the die pad and the epoxy resin. The phenomenon can be prevented and, accordingly, the reliability of the semiconductor package can be improved.

Meanwhile, although specific embodiments of the present invention have been described and illustrated, modifications and variations can be made by those skilled in the art. Therefore, hereinafter, the scope of the utility model registration request can be understood to include all modifications and variations as long as they fall within the true spirit and scope of the present invention.

Claims (4)

A semiconductor chip having electrodes; A lead frame including an die pad to which the semiconductor chip is attached, and an inner lead and an out lead connected to electrodes of the semiconductor chip to form an electrical signal transmission path between the semiconductor chip and the outside; And a package body made of an epoxy resin encapsulating a spatial region including the semiconductor chip and an inner lead electrically connected thereto. The die pad of the lead frame is a semiconductor package, characterized in that the bottom surface is provided with a buffer layer for improving the bonding force with the epoxy resin. The semiconductor package of claim 1, wherein the buffer layer is made of Si or a Si compound. The semiconductor package of claim 2, wherein the Si compound is one selected from SiC, SiN, or Si ₃ N ₄ . The semiconductor package of claim 1, wherein the buffer layer is an adhesive tape containing Si or a Si compound.