KR19980076498A - Semiconductor Wafer Alignment Method Using Vision Recognition - Google Patents

Abstract

The present invention provides a method for aligning a semiconductor wafer so that each die is in the correct position as a pre-inspection step in a semiconductor wafer inspection apparatus which determines the quality of a die formed on a wafer and picks up and transfers a good die. A semiconductor wafer alignment method using vision recognition. The semiconductor wafer alignment method recognizes the recognition pattern by dividing the recognition pattern into a plurality of cells, thereby correcting the inclination of the flat zones of the dies on the wafer even if the wafer is disposed on the chuck tower at an angle with the flat zone of the wafer. can do.

Description

Semiconductor Wafer Alignment Method Using Vision Recognition

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of aligning semiconductor wafers, and more particularly, to determine whether or not dies formed on a wafer are determined and to pick up and transfer a good die. A semiconductor wafer alignment method using vision recognition to align a semiconductor wafer so that the dies are in place.

FIG. 1 is an explanatory diagram for explaining a conventional semiconductor wafer alignment method using vision recognition, in which semiconductor wafers are normally arranged so that dies are arranged to match a vision recognition pattern. Here, reference numeral 11 denotes a die formed on the wafer, and reference numeral 12 is a recognition pattern for vision recognition as shown in FIG. 2. As such, the semiconductor wafer is normally aligned when the recognition pattern 12 that recognizes the edges of the dies and the edges of the dies 11 are aligned, so that inspection of each die formed on the wafer can be performed normally. do.

The method of inspecting the wafers by aligning the wafers so that the dies 11 of the wafers are normally arranged as shown in FIG. 1 with the recognition pattern as shown in FIG. 2 generally proceeds in the order as shown in FIG. do.

First, the wafer transfer device removes the wafer from the wafer cassette (100). Next, the wafer transfer device transfers to the tip alignment unit to find a flat zone of the wafer (200). Next, the wafer supply apparatus transfers the wafer from the tip alignment portion to the chuck tower (300). Next, the wafer is moved to the profiler to perform primary die alignment to find the? Direction with respect to the center position (x, y) and the flat zone of the wafer (400). Next, the wafer is moved to the camera to visually recognize the alignment state of the die to find the rotation of the die and the position of the die (500). The wafer is then moved to the probe position to probe 600 for each die on the wafer. Next, it is determined whether the work is completed (700), the operation is terminated, or the process returns to the first step (100).

In the wafer inspection process as described above, the wafer alignment step 500 by vision recognition which proceeds first is performed in the following order.

1. The same pattern as the storage pattern 12 as shown in FIG. 2 is found by pattern matching within the die pattern of the wafer as shown in FIG.

2. Pass the center coordinates (x, y) of the pattern matched part to the controller.

3. Move to the next position. Since the semiconductor wafer is made up of a number of identical dies, it moves to a region having the same pattern as the storage pattern as shown in FIG.

4. Proceed with the work of paragraphs 1 and 2 to extract the center of the same pattern (x ', y').

5. Using the center coordinates (x, y) obtained in Clause 2 and the center coordinates (x ', y') obtained in Clause 4, the inclination value of the wafer is obtained.

6. Repeat steps 1 to 5 until the θ value is stable (ie, within a certain range).

As shown in FIG. 4, the wafer alignment method using vision recognition as described above may not only perform pattern matching but also pattern matching when the semiconductor wafer is twisted beyond a certain angle (± 5 °) from the flat zone. There arises a problem that the progress of the wafer alignment operation is stopped due to a defect.

The present invention was devised to improve the above problems, and even if the wafer is twisted from the flat zone by a certain angle (± 5 °) or more, pattern matching is performed, and no interruption of the wafer alignment operation occurs due to poor pattern matching. It is an object of the present invention to provide a semiconductor wafer alignment method.

1 is an explanatory diagram for explaining a semiconductor wafer alignment method using conventional vision recognition;

FIG. 2 is a recognition pattern diagram for vision recognition of an arrangement of dies in FIG. 1; FIG.

3 is a flowchart of a semiconductor wafer alignment method using conventional vision recognition;

4 is a view illustrating a state in which semiconductor wafers cannot be normally aligned by the semiconductor wafer alignment method of FIG. 3;

5 is a schematic structural diagram of a general semiconductor wafer inspection apparatus;

6 is an explanatory diagram for explaining a semiconductor wafer alignment method according to the present invention;

7 is a storage recognition pattern diagram according to the method of FIG. 6;

8 is a working pattern diagram of a vision monitor showing a state of semiconductor wafers aligned in accordance with the method of FIG. 6;

9 is a flowchart illustrating an operation sequence of a vision recognition unit according to the method of FIG. 6.

* Description of the symbols for the main parts of the drawings *

11. Die 12. Recognition Pattern

20. Chuck top 31., 32. Wafer positioning robot

41.CCD Camera 42.Profiler

50. Wafer Catheters 61. Pre-alignment

63. Wafer Transfer Device 70. Motor Drive

80. Controller (Industrial Personal Computer) 81. Monitor for Controller

82. I / O processing unit 90. Vision recognition unit

91. Image processor 92. Vision recognition monitor

120. Recognition Pattern

In order to achieve the above object, the semiconductor wafer alignment method according to the present invention comprises the steps of: (a) moving the wafer introduced into the chuck tower toward the CCD camera; (B) finding the same pattern in the wafer pattern as the first cell of the previously stored recognition pattern; (C) If the operation of step (b) is satisfied, the same pattern as the second cell of the recognition pattern is found in an adjacent area of the same pattern as the first cell, and if it is not found, the operation of step (b) is repeated. Performing; (D) finding the same pattern as the next cell of the recognition pattern when the operation of step (c) is satisfied; (E) detecting an inclination of the wafer by using center positions of regions matched with cells of the recognition pattern found in steps (b) to (d); (F) transmitting the detected tilt of the wafer and the center of the pattern match to the controller; (G) x, y robot correcting the inclination from the flat zone of the wafer using the inclination; (H) moving the wafer to the portion to be pattern matched next; (I) repeating the operations of steps (b) to (g) with respect to the pattern matching area of the moved wafer to find an area of the wafer that perfectly matches the recognition pattern; And (b) completely aligning the position of the wafer using the positions of the same recognized patterns through the operations of steps (b) to (g) and (i). It features.

Hereinafter, a semiconductor wafer alignment method according to the present invention will be described in detail with reference to the accompanying drawings.

5 is a schematic structural diagram of a general semiconductor wafer inspection apparatus. As shown, the semiconductor wafer inspection apparatus is largely comprised of a chuck top 20, robots 31 and 32 for positioning the wafer in the x- and y-axes, a CCD camera 41, and a profiler. 42), wafer casinger 50, pre-alignment 61, wafer transfer device 63, motor drive 70, controller 80 consisting of industrial personal computer, controller monitor 81 ), An I / O processing unit 82, an image processing unit 91, and a vision recognition monitor 90 including a vision recognition monitor 92. Here, the CCD camera 41 and the profiler 42 are moved by the moving plate 40.

The CCD camera 41 captures an image of each die formed on the semiconductor wafer and provides an image signal to the image processing unit 91. The controller 80 performs data calculation and processing, and the I / O processing unit 82 Controls the on / off of various sensors and solenoids used in the device, the motor driver 70 rotates the motors used in the device according to the command of the controller 80, the image processing unit 91 is a CCD camera 41 X and y robots 31 and 32 move the wafer mounted on the chuck tower 20 in the x and y axis directions, and the profiler 42 shifts the center of the wafer and The primary correction is performed for each θ skew, the pre-alignment 61 determines the position of the flat zone of the wafer, and the wafer transfer device 63 is removed from the wafer cassette 50. The wafer is pulled out and transferred to the tip alignment portion 61 to After determining the position of the flat zone, the wafer is supplied to the chuck top 20 seated on top of the x and y robots 31 and 32, and the chuck tower 20 is mounted with the wafer to be inspected. It is a device that performs the up / down movement and rotational movement based on the z, θ axis.

In the semiconductor wafer inspection apparatus configured as described above, the inspection method of the semiconductor wafer proceeds according to the procedure as shown in FIG. However, the alignment of the wafer by vision recognition is performed in the order as shown in FIG. 9 by the method shown in FIG. 6 using the recognition pattern as shown in FIG. 7.

Here, the vision recognition pattern used in the alignment method of the present invention is divided into a plurality of cells that are composed of a plurality of pixels and form a fine pattern having the same shape as shown in FIG. 7. The present invention is characterized in that the pattern recognition is divided into a plurality of cells in this way, thereby preventing misalignment or interruption of inspection caused by the wafer being twisted from the flat zone.

Such a method of aligning a semiconductor wafer by vision recognition according to the present invention proceeds as follows, according to the operation sequence of the vision recognition unit as shown in FIG. 9.

1. The wafer introduced into the chuck tower 20 is first aligned by the profiler 42 and moved toward the CCD camera with an error of a certain angle or more (step 510).

2. Recognize vision and grab one screen (step 520).

3. Find the same pattern as the recognition pattern as shown in FIG. 7 previously stored. That is, pattern matching is performed (step 530). Pattern matching proceeds in the following order.

1) The same pattern as the first cell (cell a) of the storage recognition pattern as shown in FIG. 7 is found in the pattern formed by the dies on the working wafer as shown in FIG.

2) If the operation of paragraph 1) is satisfied, the same pattern as the second cell of the storage pattern is found on the right side of the same pattern as the first cell. If not found, carry out the work of paragraph 1) again. In FIG. 6, since the b cell of a recognition pattern and the right pattern of the same area | region as the a cell of a wafer mostly match, it shall match.

3) The inclination of the wafer is detected using the position of each cell detected in the above 1) and 2).

4) The operation of paragraphs 1) to 3) is then repeated in the cells to find a perfectly matched area.

4. The pattern matching transmits the x, y, θ position of the same pattern as the storage pattern, that is, the matched center position (x, y) and the detected tilt of the wafer θ to the controller 80 (step 540). .

5. The robot is moved by the x, y, and θ positions to correct the position of the wafer (step 550).

6. Verify that the wafer alignment operation is complete (step 560). If the alignment is completed, the operation is terminated. If the operation is not completed, the operation moves to the next pattern recognition position (step 570), and all steps below the vision recognition step 520 are repeatedly performed until the operation is completed. do.

In fact, the pattern of the wafer coincides with the first cell, a cell in FIG. Therefore, the same pattern as the second cell (cell b) of the storage pattern is found on the right side of the same pattern as the first cell (cell a). If it is not found, the operation of item 1) is performed again. However, in Fig. 6, since the b cell of the recognition pattern and the right pattern of the same region as the a cell of the wafer coincide most, it is assumed to match. Therefore, the next third cell (c cell) is checked whether the b cell right pattern of the wafer coincides. At this time, since the c-cell and the b-cell right patterns of the wafer hardly coincide with each other, the wafer pattern coinciding with the c-cell is found in the region indicated by d in FIG. 6. Therefore, the tilt is obtained by comparing the centers of the pattern regions of the wafers matched with the cell b and the center points of the wafer regions marked with the cell c, and then rotating the wafer to correct the tilt. Repeating these corrections several times for each cell allows finding an area of the wafer that perfectly matches the recognition pattern.

As described above, the semiconductor wafer alignment method recognizes the recognition pattern by dividing the recognition pattern into a plurality of cells, so that even if the wafer is inclined with the flat zone of the wafer at a large angle, it is placed on the flat zone of each die on the wafer. The slope can be corrected to avoid interruption of the wafer inspection process.

Claims (1)

(A) moving the wafer introduced into the chuck tower toward the CCD camera; (B) finding the same pattern in the wafer pattern as the first cell of the previously stored recognition pattern; (C) If the operation of step (b) is satisfied, the same pattern as the second cell of the recognition pattern is found in an adjacent area of the same pattern as the first cell, and if it is not found, the operation of step (b) is repeated. Performing; (D) finding the same pattern as the next cell of the recognition pattern when the operation of step (c) is satisfied; (E) detecting an inclination of the wafer by using center positions of regions matched with cells of the recognition pattern found in steps (b) to (d); (F) transmitting the detected tilt of the wafer and the center of the pattern match to the controller; (G) x, y robot correcting the inclination from the flat zone of the wafer using the inclination; (H) moving the wafer to the portion to be pattern matched next; (I) repeating the operations of steps (b) to (g) with respect to the pattern matching area of the moved wafer to find an area of the wafer that perfectly matches the recognition pattern; (D) completely aligning the position of the wafer using the position of the pattern recognized identically through the operation of steps (b) to (g) and the operation of (i); Semiconductor wafer alignment method comprising a.