KR19980065709A - Salicide Preparation - Google Patents

Abstract

Disclosed is a method for preparing salicide. In the method of manufacturing a salicide according to the present invention, forming a gate electrode through a gate oxide layer on a semiconductor substrate, forming a spacer along sidewalls of the gate electrode, and forming a reaction control layer on the entire surface of the resultant. And forming a silicide forming material on the reaction control layer and forming a silicide layer by performing a heat treatment process. Accordingly, by forming the reaction control layer before forming the silicide forming material, silicide growth to the spacer formed on the sidewall of the gate electrode can be suppressed to prevent short between the gate electrode and the source electrode / drain electrode, thereby forming uniform silicide.

Description

Salicide Preparation

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing process, and more particularly, to a method of manufacturing salicide (SALICIDE: Self ALIgned siliCIDE) using a reaction control layer.

In the semiconductor manufacturing process, the salicide process in which silicide is selectively formed by applying heat treatment only to a portion where silicon (Si) is exposed, such as a gate electrode, a source electrode, and a drain electrode, has a simple and low-resistance contact resistance characteristic of the process itself. In general, it is commonly used for devices that require speed. However, a problem in applying the salicide process is that when a silicon nitride film is used as the gate spacer, subsequent silicide growth onto the spacer formed on the sidewalls of the gate electrode when proceeding to the salicide (lateral silicide) growth occurs, and a short is caused between the gate electrode and the source electrode / drain electrode.

1 and 2 are cross-sectional views schematically showing a conventional salicide process.

FIG. 1 shows a process of forming the gate electrode 2, the spacer 3, and the silicide forming material 4. First, a gate oxide film 1 having a predetermined thickness is formed on a semiconductor substrate 10, for example, a silicon substrate. Thereafter, a first conductive layer such as polysilicon is deposited on the entire surface of the resultant, and the gate electrode 2 is formed by patterning using a conventional dry etching method. Subsequently, a first insulating layer, for example, a silicon nitride layer is deposited on the entire surface of the resultant to form a spacer 3 on the sidewall of the gate electrode 2 as shown through a conventional dry etching method, and a silicide forming material ( 4) For example, titanium (Ti) is deposited to a predetermined thickness. Here, reference numeral 11 denotes a field oxide film as an element isolation region.

FIG. 2 illustrates a process of forming the silicide layer 5, in which silicide is selectively formed only on the polycrystalline silicon of the single crystal silicon (ie, exposed semiconductor substrate) and the gate electrode 2 in the active region after the process of FIG. 1. For example, by performing a heat treatment at low temperature using, for example, a rapid thermal process (RTP), a silicide layer may be selectively generated only in a region in which titanium (reference numeral 4 of FIG. 1) is in contact with silicon. After forming (5), in order to remove unreacted titanium on the spacer (3), for example, a mixed solution of sulfuric acid / fruit water / deionized water is removed to remove unreacted titanium. Next, a high temperature heat treatment is performed to effect phase conversion to silicide having low resistance.

As described above, in the case of using a silicon nitride film as a spacer, silicide growth may occur on the silicon nitride film at the time of salicide formation, which may cause a short between the gate electrode and the source electrode / drain electrode.

The technical problem to be achieved by the present invention is to form a reaction control layer before forming the silicide forming material in the manufacturing process of the salicide, thereby suppressing the growth of silicide on the spacers formed on the sidewalls of the gate electrode, thereby preventing the gate electrode and the source electrode / drain. It is to provide a method for producing salicide using a reaction control layer that can prevent a short between the electrodes.

1 and 2 are cross-sectional views schematically showing a conventional salicide process.

3 and 4 are cross-sectional views schematically showing a salicide process according to the present invention.

Explanation of symbols for the main parts of the drawings

10 ... semiconductor substrate 11 ... field oxide

1 ... gate oxide 2 ... gate electrode

3 ... spacer 4 ... silicide forming material

5 ... silicide layer 6 ... reaction control layer

In order to achieve the above object, the method of the present invention comprises the steps of: forming a gate electrode via a gate oxide film on a semiconductor substrate; forming a spacer along the sidewall of the gate electrode; and forming a reaction control layer on the entire surface of the resultant. And forming a silicide forming material on the reaction control layer, and performing a heat treatment process to form a silicide layer.

Hereinafter, with reference to the accompanying drawings will be described the present invention.

3 and 4 are cross-sectional views schematically showing a salicide process according to the present invention.

3 illustrates a process of forming the gate electrode 2, the spacer 3, the silicide forming material 4, and the reaction control layer 6.

In detail, first, a gate oxide film 1 having a predetermined thickness is formed on the semiconductor substrate 10, for example, a silicon substrate, and then a first conductive layer, for example, polysilicon is deposited on the entire surface of the resultant, and a conventional dry etching method is used. Patterning to form the gate electrode 2. Subsequently, a first insulating layer such as a silicon nitride film is deposited on the entire surface of the resultant to form a spacer 3 on the sidewall of the gate electrode 2, as shown through a conventional dry etching method, and a reaction control layer ( 6) A metal nitride, a metal carbide, or a nitride such as SiN, or an oxide film is deposited to a predetermined thickness, and the silicide forming material 4 is formed on the entire surface of the resultant, for example, titanium (Ti) or cobalt (Co), or Any one of platinum (Pt) is deposited.

At this time, the thickness of the reaction control layer 6 is to be thinner than the silicide forming material (4). Here, reference numeral 11 denotes a field oxide film as an element isolation region.

4 illustrates a process of forming the silicide layer 5.

Specifically, in order to selectively form silicide only on the single crystal silicon (i.e., exposed semiconductor substrate) of the active region and the polycrystalline silicon of the gate electrode 2 in the same manner as the conventional method after the process of FIG. Heat treatment at low temperature using a rapid thermal process) to selectively cause the silicide reaction to occur only in a region where titanium (reference numeral 4 of FIG. 3) is in contact with silicon, thereby forming the silicide layer 5 as shown. Then, in order to remove the unreacted titanium on the spacer 3, the unreacted titanium is removed using a mixed solution of sulfuric acid / fruit water / deionized water, for example. Next, a high temperature heat treatment is performed to effect phase conversion to silicide having low resistance. Here, when the reaction control layer formed on the spacer is a conductor, it is etched in a wet etchant together with the silicide forming material.

As described above, the salicide manufacturing method according to the present invention suppresses the growth of silicide to the spacer formed on the sidewall of the gate electrode by forming a reaction control layer before forming the silicide forming material, thereby forming a gap between the gate electrode and the source electrode / drain electrode. It is possible to prevent shorts and to form uniform silicides.

Claims (3)

Forming a gate electrode on the semiconductor substrate via the gate oxide film; Forming a spacer along sidewalls of the gate electrode; Forming a reaction control layer on the entire surface of the resultant product; Forming a silicide forming material on the reaction control layer; And proceeding the heat treatment step to form a silicide layer. The method of claim 1, wherein the reaction control layer is any one of a metal nitride, a metal carbide, a nitride such as silicon nitride, or an oxide film. The method of claim 2, wherein the silicide forming material is any one selected from the group consisting of titanium, cobalt, and platinum.