KR19980043614A - Manufacturing method of nonvolatile memory device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a nonvolatile memory device, wherein a gate oxide film of a peripheral circuit is formed in a dielectric film having an oxide-nitride-oxide (ONO) structure formed between a floating gate and a program gate. A sacrificial oxide film is formed on the nitride film by a deposition method to prevent the surface of the nitride film from being damaged during the cleaning process performed to remove the native oxide before the forming process, and then an oxidation process for forming a gate oxide film. As a result, it is described to form an upper oxide film on the nitride film to improve the interfacial properties of the nitride film and the upper oxide film.

Description

Manufacturing method of nonvolatile memory device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a nonvolatile memory device, and more particularly, in an ONO (Oxide-Nitride-Oxide) structure dielectric film, which prevents etching damage of the nitride film generated during the device manufacturing process, thereby reducing retention, The present invention relates to a method of manufacturing a nonvolatile memory device capable of improving cycling and disturbation characteristics.

In general, in a nonvolatile memory device, a dielectric film is formed between a floating gate and a program gate. The retention, cycling, and disturbance characteristics of the device depend on the film quality of the dielectric film. In particular, the dielectric film primarily aims to prevent leakage of electrons applied to the floating gate during programming. Therefore, research for improving the film quality of the dielectric film continues. Recently, the ONO structure is mainly applied as a dielectric film.

1A to 1C are cross-sectional views of a device for explaining a method of manufacturing a conventional nonvolatile memory device.

Referring to FIG. 1A, a field oxide film 2 is formed on a semiconductor substrate 1 in an element isolation process to determine an active region and a field region. The tunnel oxide film 3 is formed on the semiconductor substrate 1 in the cell region where the nonvolatile memory device is to be formed. The floating gate 4 is formed on the tunnel oxide film 3 by a polysilicon deposition process and a patterning process. The lower oxide film 5, the nitride film 6 and the thermal oxide film 7 are sequentially formed on the entire structure including the floating gate 4. After forming an etch mask 8 that protects the cell region by a photolithography process, the thermal oxide film 7, the nitride film 6, and the lower oxide film 5 are exposed so that the surface of the semiconductor substrate 1 in the peripheral area is exposed. ) Sequentially. While waiting for the next process, a native oxide 9 is formed on the surface of the semiconductor substrate 1 in the surrounding area.

In the above, the thermal oxide film 7 is grown to a thin thickness of about 30 GPa even if it is not grown or grown.

FIG. 1B shows a cleaning process with a 50: 1 HF etch solution to remove the native oxide film 9 in the surrounding area prior to the subsequent process. The cleaning process for removing the natural oxide film 9 is performed for about 30 seconds, during which the thin thermal oxide film 7 is removed as well as the nitride film 6 is etched and the surface 13 is roughened.

Referring to FIG. 1C, an oxidation process is performed to grow an upper oxide film 10A on a surface of a nitride film 6 in a cell region and a gate oxide film 10B on a surface of a semiconductor substrate 1 in a peripheral region. do. The ONO dielectric film 12 of the conventional nonvolatile memory device includes a lower oxide film 5, a nitride film 6, and an upper oxide film 10A. A polysilicon deposition and patterning process is performed on the entire structure in which the upper oxide film 10A and the gate oxide film 10B are formed, so that the program gate 11A is formed on the upper oxide film 10A in the cell region, and the gate oxide film in the peripheral region ( The gate electrode 11B is formed over 10B.

When the nonvolatile memory cell is manufactured by the above-described conventional method, the nitride film 6 is etched and damaged during the cleaning process for removing the natural oxide film 9, and the surface thereof becomes rough. In this state, the upper oxide film ( When 10a) is grown, the state of the interface 14 between the nitride film 6 and the upper oxide film 10A becomes uneven as shown in FIG. 2, and the surface of the nitride film 6 is oxidized so that the nitride film 6 As a result, the thickness of the transistor becomes thinner, resulting in poor retention, cycling, and disturbance of the device, resulting in deterioration of reliability of the nonvolatile memory device.

Accordingly, an object of the present invention is to provide a method of manufacturing a nonvolatile memory device capable of improving the film quality of an ONO structure dielectric film by preventing etching damage of the nitride film generated during the manufacturing process of the nonvolatile memory device.

In accordance with another aspect of the present invention, a tunnel oxide film and a floating gate are formed on a semiconductor substrate in a cell region, and a lower oxide film, a nitride film, and a sacrificial oxide film are formed on an entire structure including the floating gate. Sequentially forming; Sequentially removing the sacrificial oxide film, the nitride film and the lower oxide film formed in the surrounding area by a mask operation and an etching process; Performing a cleaning process with an etching solution to remove the natural oxide film formed on the surface of the semiconductor substrate in the peripheral region, and removing the natural oxide film formed on the surface of the semiconductor substrate with an etching solution, wherein the sacrificial oxide film is etched; Performing an oxidation process, wherein an upper oxide film is grown on the nitride film surface of the cell region, and a gate oxide film is grown on the semiconductor substrate surface of the peripheral region; And performing a polysilicon deposition and patterning process on the entire structure where the upper oxide film and the gate oxide film are formed, thereby forming a program gate on the upper oxide film of the cell region, and forming a gate electrode on the gate oxide film of the peripheral region. It is characterized by.

1A to 1C are cross-sectional views of a device for explaining a method of manufacturing a conventional nonvolatile memory device.

2 is an enlarged view of a dielectric film of a conventional nonvolatile memory device.

3A to 3C are cross-sectional views of a device for explaining a method of manufacturing a nonvolatile memory device according to the embodiment of the present invention.

4 is an enlarged view of a dielectric film of a nonvolatile Bemori element of the present invention.

* Description of the symbols for the main parts of the drawings *

1, 21: semiconductor substrate 2, 22: field oxide film

3,23 Tunnel oxide film 4,24Floating gate

5,25: lower oxide film 6,26: nitride film

7: thermal oxide film 27: sacrificial oxide film

8,28: etch mask 9,29: natural oxide film

10A, 30A: Top oxide film 10B, 30B: Gate oxide film

11A, 31A: Program gate 11B, 31B: Gate electrode

12,32: ONO dielectric film 13,33: nitride film surface portion

14,34: Interface between the nitride film and the upper oxide film

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

3A to 3C are cross-sectional views of devices for describing a method of manufacturing a nonvolatile memory device according to an embodiment of the present invention.

Referring to FIG. 3A, a field oxide film 22 is formed on a semiconductor substrate 21 in an element isolation process to determine an active region and a field region. The tunnel oxide film 23 is formed on the semiconductor substrate 21 in the cell region where the nonvolatile memory device is to be formed. The floating gate 24 is formed on the tunnel oxide layer 23 by a polysilicon deposition process and a patterning process. The lower oxide film 25, the nitride film 26 and the sacrificial oxide film 27 are sequentially formed on the entire structure including the floating gate 24. After forming an etch mask 28 to protect the cell region by a photolithography process, the sacrificial oxide layer 27, the nitride layer 26 and the lower oxide layer 25 are exposed so that the surface of the semiconductor substrate 21 in the peripheral region is exposed. ) Sequentially. The natural oxide film 29 is formed on the surface of the semiconductor substrate 21 in the surrounding area while waiting for the next process.

In the above, the sacrificial oxide layer 27 is formed of any one of low temperature oxide (LTO), medium temperature oxide (MTO), and hot temperature oxide (HTO) in a thickness of 50 to 100 kPa.

3B shows a cleaning process with a 50: 1 HF etch solution to remove the native oxide layer 29 in the surrounding area prior to the subsequent process. The cleaning process for removing the natural oxide film 29 is performed for about 30 seconds, and the sacrificial oxide film 27 does not etch damage the nitride film 26 during this process so that the surface portion 33 remains smooth.

Referring to FIG. 3C, an oxidation process is performed to grow an upper oxide film 30A on the surface of the nitride film 26 in the cell region, and a gate oxide film 30B on the surface of the semiconductor substrate 21 in the peripheral region. do. The ONO dielectric film 32 of the nonvolatile memory device of the present invention includes a lower oxide film 25, a nitride film 26, and an upper oxide film 30A. A polysilicon deposition and patterning process is performed on the entire structure in which the upper oxide film 30A and the gate oxide film 30B are formed, so that the program gate 31A is formed on the upper oxide film 30A in the cell region, and the gate oxide film in the peripheral region ( A gate electrode 31B is formed over 30B.

In the above-described embodiment of the present invention, when the etching process is performed for about 30 seconds with a 50: 1 HF etching solution, the oxide film formed by the deposition method is usually etched to a thickness of 60 to 80Å. Therefore, if the sacrificial oxide film 27 is formed to a thickness of 50 to about 10 to 20 micrometers thinner than the thickness to be etched, the sacrificial oxide film 27 is completely removed during the cleaning process for removing the natural oxide film 29, but the nitride film 26 Because of the short exposure period, the surface of the nitride film 26 is not etched, and thus the ONO dielectric film 32 is advantageous in terms of the uniformity of the thickness of each layer. In addition, if the sacrificial oxide film 27 is formed to a thickness of 90 to 100 kPa thick, about 10 to 20 kPa thick, the sacrificial oxide film 27 remains at a thickness of 10 to 20 kPa during the cleaning process so that the nitride film 26 is etched. Will not be exposed. In this state, when the upper oxide film 30A is grown by the oxidation process, as shown in FIG. 4, the interface 34 between the nitride film 26 and the upper oxide film 30A becomes uniform, and further, by the oxidation process. Since the surface is oxidized within a tolerance range due to the property that the oxide thickness of the nitride film 26 is infiltrated, even if the thickness of the nitride film 26 is reduced, the reliability of the device is not affected.

As described above, the present invention effectively forms an ONO dielectric film by forming a sacrificial oxide film on the nitride film by a deposition method in order to prevent the surface of the nitride film from being damaged during the cleaning process performed to remove the natural oxide film before the gate oxide film forming step of the peripheral circuit. It can be formed, thereby improving the reliability of the nonvolatile memory device.

Claims (10)

In the method of manufacturing a nonvolatile memory device, Forming a tunnel oxide film and a floating gate on a semiconductor substrate in a cell region, and sequentially forming a lower oxide film, a nitride film, and a sacrificial oxide film on an entire structure including the floating gate; Sequentially removing the sacrificial oxide film, the nitride film and the lower oxide film formed in the surrounding area by a mask operation and an etching process; Performing a cleaning process with an etching solution on the surface of the semiconductor substrate in the surrounding area to remove the natural oxide film, wherein the sacrificial oxide film is etched; Performing an oxidation process, wherein an upper oxide film is grown on the nitride film surface of the cell region, and a gate oxide film is grown on the semiconductor substrate surface of the peripheral region; And performing a polysilicon deposition and patterning process on the entire structure where the upper oxide film and the gate oxide film are formed, thereby forming a program gate on the upper oxide film of the cell region, and forming a gate electrode on the gate oxide film of the peripheral region. A method of manufacturing a nonvolatile memory device, characterized in that. The method of claim 1, And the sacrificial oxide film is formed of LTO. The method of claim 1, And the sacrificial oxide film is formed of MTO. The method of claim 1, The sacrificial oxide film is a method of manufacturing a nonvolatile memory device, characterized in that formed by HTO. The method of claim 1, And the sacrificial oxide film is formed to have a thickness equal to a thickness etched during the cleaning process. The method of claim 1, The sacrificial oxide film is a manufacturing method of a non-volatile memory device, characterized in that formed 10 to 20Å thicker than the thickness etched during the cleaning process. The method of claim 1, The sacrificial oxide film is a manufacturing method of a nonvolatile memory device, characterized in that formed 10 to 20Å thinner than the thickness that is etched during the cleaning process. The method of claim 1, The sacrificial oxide film is a method of manufacturing a non-volatile memory device, characterized in that formed to 50 to 100Å thick. The method of claim 1, The etching solution is a method of manufacturing a nonvolatile memory device, characterized in that 50: 1 HF. The method of claim 1, The cleaning process is a method of manufacturing a nonvolatile memory device, characterized in that performed for about 30 seconds with a 50: 1 HF etching solution.