KR19980032200A - Dielectric Compositions and Integrated Circuit Devices - Google Patents

Abstract

The present invention relates to an improved dielectric composition and an integrated circuit device comprising (i) a substrate, (ii) a metal circuit line located on the substrate, and (iii) an improved dielectric material located adjacent to the circuit line. The dielectric material preferably comprises imidized polyamic ester terminated with an alkoxysilyl alkyl group.

Description

Dielectric Compositions and Integrated Circuit Devices

The present invention relates to an integrated circuit comprising an improved dielectric composition and an improved dielectric material.

Polyimide is known in the art to be used in the manufacture of integrated circuits, thin film packages and printed circuit boards, including chips (eg, chip ends of lines). Polyimides are useful for making dielectric interlayers, passivation layers, alpha particle barriers and stress buffers. Polyimides are particularly useful as interlayer dielectric materials that insulate conductor wiring that interconnects chips on multichip modules. This is known as thin film wiring. Multichip modules are intermediate packaging layers between chips and circuit boards. Multichip modules are known in the art. Multichip modules consist of multiple layers of power, circuits, and ground planes that deliver power to the chip and distribute input / output signals between the chips on the module, or from or to the circuit board.

In the microelectronics industry, there is a continuing need to increase circuit density in multi-layer integrated circuit devices such as memory and logic devices to improve their performance and lower their cost. To achieve this goal, it is necessary to reduce the minimum wiring width (e.g., circuit line width) and to reduce the dielectric constant of the inserted dielectric material to further narrow the circuit line spacing without increasing crosstalk and capacitive coupling. There is. Polyimides have a dielectric constant of about 3.0 and have mechanical and thermal properties that withstand the thermal cycling associated with the process and semiconductor fabrication of the present invention. However, dielectric materials for fabricating future integrated circuit devices are required to exhibit a dielectric constant that is smaller than the dielectric constant exhibited by the polyimide (eg less than 3.0) and have improved mechanical and thermal properties.

It is therefore an object of the present invention to provide an improved integrated circuit device comprising an improved dielectric material.

Another object and advantage will be apparent from the following description.

1 is a cross-sectional view showing a portion of an integrated circuit device of the present invention.

2 to 5 show a method of manufacturing the integrated circuit device of the present invention.

6-8 show another method of manufacturing the integrated circuit device of the present invention.

The present invention preferably relates to an improved dielectric material comprising a cured polyamic ester terminated with a trialkoxysilylalkyl group. The invention also relates to an integrated circuit device. In one embodiment, the device comprises (i) a substrate, (ii) interconnected metal circuit lines located on the substrate, and (iii) an improved dielectric positioned adjacent (on and / or between circuit lines) the circuit lines. Contains the material.

The invention also relates to a method and an integrated circuit packaging apparatus for manufacturing the integrated circuit device of the invention.

Further details of the invention are provided in the following detailed description and the accompanying drawings.

One embodiment of the integrated circuit device of the present invention is shown in FIG. The device generally comprises a substrate 2, a metal circuit line 4 and an improved dielectric material 6 of the present invention. The substrate 2 has a vertical metal stud 8 therein. Circuit lines serve to distribute electrical signals within the device, provide power input to the device, and provide signal output from the device. Suitable integrated circuit devices generally include multiple circuit lines interconnected by vertical metal studs.

Suitable substrates for the devices of the present invention include silicon, silicon dioxide, glass, silicon nitride, ceramics, aluminum, copper and gallium arsenide. Other suitable substrates are known to those skilled in the art. In a multilayer integrated circuit device, the layer below the insulated circuit lines can also act as a substrate.

Suitable circuit lines generally comprise electrically-conductive metal materials such as copper, aluminum, tungsten, gold, silver or alloys thereof. Optionally, the circuit lines may be covered with metallic liners such as layers of nickel, tantalum or chromium, or other layers such as barrier or adhesive layers (eg SiN, TiN).

Preferred embodiments of the invention comprise (i) a substrate having an electrical conductor for connection to a circuit board, (ii) a plurality of insulating layers alternately placed on the substrate and at least one of the improved polyimide films of the invention. An integrated circuit for providing signals and current to one or more integrated circuit chips, the plurality of conductive layers, and (iii) a plurality of vias for electrically interconnecting the electrical conductors, the conductive layer and the integrated circuit chips. It relates to a packaging device (multi-chip module).

An integrated circuit packaging device is an intermediate packaging layer between an integrated circuit chip and a circuit board. The integrated circuit chip is placed on top of the integrated circuit packaging device and the integrated circuit packaging device is also located on the circuit board.

The substrate of the packaging device is generally an inert substrate such as glass, silicon or ceramic. The substrate optionally has an integrated circuit placed therein. The substrate has an electrical conductor such as an input / output pin (I / O pin) for electrically connecting the packaging device to the circuit board. Multiple electrically insulating layers and electrically conductive layers (layers with conductive circuits overlying dielectric insulating material) are alternately stacked on the substrate. The layers are generally produced on a substrate by the method of making each layer by a separate process step.

The packaging device also includes accommodating means for accommodating the integrated circuit chip. Suitable receiving means include pinboards for receiving chip I / O pins or metal pads to be soldered to the chip. In general, the packaging device also includes an integrated circuit chip in a plurality of electrical vias, conductive layers and integration receiving means generally vertically aligned to electrically interconnect the I / 0 pins. Methods of fabricating and fabricating integrated circuit packaging devices are well known to those skilled in the art as disclosed in US Pat. No. 4,489,364, US Pat. No. 4,508,981, US Pat. No. 4,628,411 and US Pat. Known.

Most important in the present invention is a dielectric material located above, around circuit lines and / or between circuit lines. In multilayer integrated circuit devices, the dielectric material is often planarized to serve as a substrate for fabricating the next layer of circuit lines. The dielectric material is (RO) _m (R) _n SiR'- where m is 1, 2 or 3; the sum of m and n is 3; R and R 'are hydrocarbyl groups and R is a hydrido or Hydrocarbyl group) (end group) imidized polyamic ester. Terminal groups are preferably mono, di or tri C ₁ -C ₆ alkoxysilyl C ₁ -C ₆ alkyl or aryl groups (eg phenylene, benzylene, naphthylene or anthracenylene) groups. Hydrocarbyl group, as used herein, refers to a (mono or bifunctional) hydrocarbon group having carbon atoms bonded to the rest of the molecule and having primarily hydrocarbon properties. Hydrocarbyl groups include:

(1) hydrocarbon groups: ie aliphatic (e.g., C ₁ -C ₁₀ alkyl or alkenyl and C ₅ -C ₁₀ cycloalkyl or cycloalkenyl), aromatic, aliphatic substituted aromatics, aromatic-substituted aliphatic and the like to be. Such groups are known to those skilled in the art and include, for example, methyl (methylene for bifunctional hydrocarbyl groups), ethyl, butyl, hexyl, octyl, decyl, dodecyl, tetradecyl, octadecyl, cyclohexyl, Phenyl, naphthyl, benzyl and anthracenyl (all isomers included).

(2) Substituted hydrocarbon groups: That is, groups containing non-hydrocarbon substituents which do not significantly change the hydrocarbon properties of the group, in accordance with the context of the present invention. Those skilled in the art will know suitable substituents (eg halo, alkoxy, carboalkoxy, nitro).

(3) Heterogroups: That is, a group having a hydrocarbon property in the context of the present invention but having atoms other than carbon atoms in a chain or ring consisting of carbon atoms. Suitable heteroatoms are apparent to those skilled in the art and include, for example, nitrogen, oxygen and sulfur.

Generally, up to about 3, preferably at least one substituent or hetero atom, is present for every 10 carbon atoms in a hydrocarbon-based group.

Polyamic esters having end groups are preferably (i) diamines; (ii) diester diacyl halides (e.g. chloride) and (iii) aminoalkoxysilanes.

Suitable diamines have the formula H ₂ NRNH ₂ , where R is the same as formula 1 and X is one to three carbon or halocarbon atoms, carbonyl, -O-, -S-, -SO ₂ -and -N Selected from the group consisting of alkylene chains with alkyl:

[Formula 1]

The alkylene chain may be further substituted with haloalkyl (eg trifluoromethyl) and phenyl. Aromatic rings may be optionally substituted, for example by trifluoromethoxy and the like. Suitable R for diamines include:

[Formula 2]

Wherein y is selected from trifluoromethyl, phenyl or substituted phenyl. Suitable aromatic diamines are p-phenylene diamine, 4,4'-diamino-diphenylamine, benzidine, 4,4'-diamino-diphenyl ether, 1,5-diamino-naphthalene, 3,3'- Dimethyl-4,4'-diamino-biphenyl, 3,3'-dimethoxy benzidine, 1,4-bis (p-aminophenoxy) benzene, 1,3-bis (p-aminophenoxy) benzene, 2,2-bis [4-aminophenyl] hexafluoropropane.

R in diamine may also be an aliphatic or cycloaliphatic group such as cycloalkylene, for example cyclohexylene. Suitable aliphatic diamines include 1,4-diaminocyclohexane and bis (4-aminocyclohexyl) methane.

Preferred diamines are the diamines in which X is C (phenyl) (trifluoromethyl). Preferred diamines include 9,9'-bis (4-aminophenyl) fluorene (FDA); 4,4'-oxydianiline and 1,1-bis (4-aminophenyl) -1-phenyl-2,2,2-trifluoroethane (3FDA).

Diester diacyl chlorides are suitably prepared from the corresponding suitable dianhydrides having the formula:

[Formula 3]

Wherein Ar is selected from

[Formula 4]

Suitable dianhydrides include pyromellitic dianhydride, benzophenone dianhydride, 2,2-bis (3,4-dicarboxyphenyl) propane dianhydride, 3,3 ', 4,4'-biphenyltetracarboxylic dianhydride, Bis (3,4-dicarboxyphenyl) ether dianhydride, bis (3,4-dicarboxyphenyl) thioether dianhydride, bisphenol A biester dianhydride, 2,2-bis (3,4-dicarboxylphenyl) Hexafluoropropane dianhydride, 2,3,6,7-naphthalenetetracarboxylic dianhydride, bis (3,4-dicarboxyphenyl) sulfone dianhydride, 1,2,5,6-naphthalene tetracarboxylic dianhydride, 2 , 2 ', 3,3'-biphenyl tetracarboxylic dianhydride, 3,4,3', 4'-benzophenone tetracarboxylic dianhydride and terphenyl dianhydride. Preferred diester diacyl chloride is diethyl pyromellitate diacyl chloride.

Diester diacyl chloride is prepared by reacting the corresponding anhydride with a suitable alcohol and oxalyl chloride. Suitable alcohol is ethanol. The imidation rate can be varied by the electron substituent effect of the ester group (eg ethyl ester substituents from ethanol), and other alcohols suitable for use in the present invention are described in High Performance Polymers by Hergenrother, which is incorporated herein by reference. (1994), p. 139, known to those skilled in the art. Suitable diester diacyl chlorides are diethyldichloropyromellitate, diethyl dichlorobiphenyl tetracarboxylate and diethyldichloro oxydiphthalate. Suitable other diamines and diester diacyl chlorides are those disclosed as disclosed in US Pat. No. 4,720,539, which is incorporated herein by reference, and in co-pending U.S. Patent Application Serial No. 08 / 053,303, filed May 10, 1992. It is known to those skilled in the art.

Suitable aminoalkoxysilanes are of the formula (H ₂ NR'Si (R) _m (OR) _n ), where the sum of m and n is 3 (n is preferably 3) and R is preferably C ₁ -C _{6 is} alkyl and R 'is a spacer group located between an amino group and a silicon atom, preferably a C ₁ -C ₆ alkylene (e.g. methylene) or non-heteroatom aryl group (hydrocarbon aromatic with no heteroatom) Group, for example phenylene, benzylene or naphthylene). Since R is cleaved and removed from the composition during the reaction, R can be any organic group that does not unacceptably interfere with the reaction, and these groups should be considered equivalent to the groups claimed herein. When n is less than 3, R is preferably hydrido or lower C ₁ -C ₆ alkyl. Preferred silanes are aminophenyltrimethoxysilane. Suitable other silane reactants are known to those skilled in the art.

To prepare the polyamic ester reactants, the three precursors are added in suitable stoichiometric amounts (e.g., diamine and diester diacyl chloride is 1: 1 and the amount of silane is sufficient to provide the molecular weight of the desired polymer product). The polyamic ester is alkoxy silylalkyl end capped by dissolving in a suitable solvent (eg NMP) in the amount calculated from the Carothers equation. The end capping polyamic ester reactant as alkoxysilylalkyl has a molecular weight (M _n ) of about 5,000 to 20,000 g / mol. Suitable alkoxysilylalkyl end capped polyamic esters have the structure:

[Formula 5]

Wherein R is phenyl or C ₁ -C ₆ alkyl and the polyamic ester substituent is ethyl.

Polyamic esters can be isolated and purified if necessary. Polyamic ester solutions have a high solids content (eg 40-50% by weight or more) and low viscosity. The polyamic ester can be placed on the substrate as a film by standard techniques known in the art.

The dielectric composition is prepared by curing the polyamic ester. Polyamic esters have a high imidization temperature higher than 375 ° C. To cure the composition, the composition can be warmed directly or stepwise to a high temperature (e.g., to 200 ° C. for 2 hours to cause chain extension and then rapidly warmed to 400 ° C. and left for 2 hours). Allows imidization and cross-condensation of silyl reactive groups.

The dielectric composition of the present invention has a dielectric constant at 80 ° C. of less than 3.2, preferably less than 3.0, more preferably less than 2.8. Because the dielectric composition has a low coefficient of thermal expansion at elevated temperatures (eg less than 1000 × 10 ⁻⁶ [ie 1000 ppm] at 450 ° C., preferably less than 500 × 10 ⁻⁵ , more preferably less than 100 × 10 ⁻⁶ ) Cracking of the film can be avoided in subsequent thermal process steps. The composition has improved mechanical and polishing properties and improved isotropic optical properties and dielectric properties. The composition also has a thermal stress of less than 100 MPa, preferably less than 50 MPa. In addition, because the dielectric composition has mechanical properties that resist cracking, the dielectric composition can be chemically / mechanically planarized to facilitate lithographically forming additional circuit layers in multilayer integrated circuit devices. Dielectric compositions have increased breakdown voltage, improved toughness and increased crack resistance as thin films at high ambient humidity. The dielectric composition is optically clear and adheres well to the substrate. The dielectric composition experiences minimal shrinkage during heating (eg less than 10%).

The invention also relates to a method of manufacturing an integrated circuit device. 2, the first step in one embodiment of the method involves placing a layer 10 of the dielectric composition of the invention comprising a trialkoxysilylalkyl end-capped polyamic ester on a substrate 2. do. Substrate 2 is shown with a vertical metal stud 8. The polyamic ester is dissolved in a suitable solvent such as dimethyl propylene urea (DMPU), NMP and the like and applied to the substrate according to methods known in the art, such as spinning or spray coating or doctor blading. The solution has a uniformly high solids content (for example 40-50%), so that the planarization is improved. The second step of the present invention involves heating the polyamic ester to a high temperature to extend the chain and imidize the polyamic ester. Preferably, the composition is heated in the presence of a base such as an amine or Bronsted base. The base promotes imidization and allows it to cure at lower initial cure temperatures, for example below 200 ° C. Suitably the base is an organic amine. The amines preferably have a high boiling point and can be removed by heating once the reaction is complete. Suitable base is N-methyldiethanolamine. Other suitable bases are well known to those skilled in the art as described in US Pat. No. 5,206,117, which is incorporated herein by reference.

3, the third step of the process involves lithographically patterning the dielectric composition layer 10 to make grooves 12 (ditches) in the composition layer. The groove 12 extends to the substrate 2 and the metal stud 8, as shown in FIG. 3. Lithographic patterning is generally a layer of dielectric composition with a positive or negative photoresist such as (i) sold by Shipley or Hoechst Celanese (AZ photoresist). Coating (10); (ii) imagewise exposing the photoresist to electromagnetic radiation (via a mask), for example radiation such as ultraviolet or far ultraviolet; (iii) developing the image in a resist using, for example, a suitable basic developer; And (iv) transferring the phase through the dielectric composition layer 10 to the substrate 2 using a suitable transfer technique such as reactive ion beam etching (RIE). Suitable lithographic patterning techniques are well known to those of skill in the art, such as Wawak, described in Thompson et al., Introduction to Microlithography (1994), which is incorporated herein by reference.

4, in the fourth step of the method of manufacturing the integrated circuit of the present invention, a metal film 14 is deposited on the patterned dielectric layer 10. Preferred metal materials include copper, tungsten and aluminum. Dielectric layers patterned by methods known in the art such as chemical vapor deposition (CVD), plasma-promoted CVD, electrodeposition and electroless deposition, sputtering, and the like It can deposit suitably.

5, the last step of the method is to remove excess metal material such that the film 14 is generally horizontal with the patterned dielectric layer 10 (e.g., planarizing the metal film 14). ). Planarization may be accomplished using chemical / mechanical polishing or selective wet or dry corrosion. Suitable chemical / mechanical polishing methods are well known to those skilled in the art.

6-8, another embodiment of the integrated circuit device fabrication method of the present invention is shown. The first step of this embodiment involves depositing a metal film 16 on the substrate 18. Substrate 18 also has a vertical metal stud 20. Referring to FIG. 7, in the second step of the present invention, the groove 22 is formed by lithographically patterning a metal film through a mask. 8, in the third step of the present invention, the polyamic ester layer 24 of the present invention is deposited on the patterned metal film 16. In the final step of the process, the polyamic ester is heated to imidize the polyamic ester. Optionally, the dielectric layer may be planarized for subsequent processing in a multilayer integrated circuit.

The following examples are intended to illustrate the invention in detail. Detailed preparation methods fall within the scope of the methods more generally described above and illustrate them. The examples are provided for illustrative purposes only and are not intended to limit the scope of the present invention.

Example 1

Synthesis of Poly (Amic Ethyl Ester) End-capped with Trimethoxysilane

9.48 mmol (3.2456 g) 3FDA (1,1-bis (4-aminophenyl) -1-phenyl-2,2,2-trifluoroethane) in a three-neck flask equipped with an overhead stirrer, nitrogen inlet, and addition funnel ), 1.04 mmol (0.2218 g) of aminophenyltrimethoxysilane, 25 mmol (2 g) of pyridine and 50 mL of distilled NMP. The system was maintained while purging with nitrogen. The reaction mixture was cooled to 0 ° C. PMDA (meta-diethylpyromellitate diacyl chloride) diethylester diacylchloride (10 mmol, 3.4716 g) was dissolved in 100 ml or less of methylene chloride and transferred quantitatively with an addition funnel. Methylene chloride solution was added dropwise to the reaction mixture. After the addition was complete, the polymerization was carried out overnight at room temperature. The poly (amic ethyl ester) oligomer was isolated by coagulation in methanol, filtered and dried in vacuo at 60 ° C. (M _n = 10,000).

Example 2

Film formation

The poly (amic ethyl ester) oligomer obtained from Example 1 was dissolved in NMP. Clear solutions were prepared with a solids content of 45% by weight. The solution was then cast on a glass plate by spin coating to form a film having a thickness of 1 to 10 microns. Imidization was carried out by heating the polymer membrane at 200 ° C., 300 ° C. and 400 ° C. for 1 hour under an N ₂ atmosphere. The cured polyimide film was then slowly cooled to room temperature. The cured polyimide was free of cracks and exhibited a dielectric constant of about 3.0 at 80 ° C., a thermal stress of about 45 MPa and a coefficient of thermal expansion of 75 × 10 ⁻⁶ at 450 ° C.

Although the present invention has been described in connection with specific embodiments, it is clear that this detailed description is not intended to limit the invention and that various embodiments, changes and modifications may be made therein without departing from the spirit and scope of the invention, Such equivalent embodiments are included within the scope of the present invention.

SUMMARY OF THE INVENTION An improved integrated circuit device is provided that includes an improved dielectric material.

Claims (15)

In an integrated circuit device, Board, Metal circuit lines located on a substrate, (RO) _m (R) _n SiR'- where R and R 'are independently a hydrocarbyl group, R is a hydrido or hydrocarbyl group, m is 1 or 2 or 3, and m and n And a dielectric composition positioned adjacent to the circuit line, the polyamic imidized ester terminated with a sum of 3) and having a coefficient of thermal expansion of less than 1000 × 10 ⁻⁶ . The method of claim 1, And said polyamic ester terminated with a tri C ₁ -C ₁₀ alkoxysilyl C ₁ -C ₁₀ alkyl group or a tri C ₁ -C ₁₀ alkoxysilylaryl group. The method of claim 2, The polyamic ester is. 9,9'-bis (4-aminophenyl) fluorene and 4,4'-oxydianiline and 1,1-bis (4-aminophenyl) -1-phenyl-2,2,2-trifluoroethane Selected from diamine and. A diester diacid halide selected from di C ₁ -C ₆ alkyl dichloro pyromellitate, di C ₁ -C ₆ alkyl dichlorooxydiphthalate and di C ₁ -C ₆ alkyl dichlorobiphenyl-tetracarboxylate Device comprising. The method of claim 2, Wherein said dielectric composition has a dielectric constant of less than 3.0. In the manufacturing method of an integrated circuit, (RO) _m (R) _n SiR'- where R and R 'are independently a hydrocarbyl group, R is a hydrido or hydrocarbyl group, m is 1 or 2 or 3, and m and n A layer of dielectric composition comprising the polyamic ester terminated on the substrate), The composition is heated to imidize the polyamic ester such that the imidized polyamic ester has a coefficient of thermal expansion of less than 1000 × 10 ⁻⁶ , Lithographically patterning the dielectric layer, Deposit a metal film on the patterned dielectric layer, Fabricating an integrated circuit by planarizing the film. The method of claim 5, Wherein the polyamic ester is terminated with a tri C ₁ -C ₁₀ alkoxysilyl C ₁ -C ₁₀ alkyl group or a tri C ₁ -C ₁₀ alkoxysilylaryl group. The method of claim 6, The polyamic esters are 9,9'-bis (4-aminophenyl) fluorene, 4,4'-oxydianiline and 1,1-bis (4-aminophenyl) -1-phenyl-2,2,2 - diamines and di-C ₁ -C ₆ alkyl-dichloro fatigue selected from ethane-trifluoromethyl trimellitate, and di-C ₁ -C ₆ alkyl-dichloro-oxydiphthalic phthalate and di-C ₁ -C ₆ alkyl-dichloro-biphenyl-carboxylate selected from the group consisting of tetra-di A method comprising an ester diacid halide. In the method of manufacturing an integrated circuit, A metal film is deposited on a substrate, Lithographically pattern the metal film, (RO) _m (R) _n SiR'- where R and R 'are independently a hydrocarbyl group, R is a hydrido or hydrocarbyl group, m is 1 or 2 or 3, and m and n A layer of dielectric composition comprising the polyamic ester terminated is deposited on the patterned metal film; Comprising heating the composition to imidize the polyamic ester such that the imidized polyamic ester has a coefficient of thermal expansion of less than 1000 × 10 ^−6. Method of manufacturing integrated circuit. The method of claim 8, Wherein the polyamic ester is terminated with a tri C ₁ -C ₆ alkoxysilyl C ₁ -C ₆ alkyl group or a tri C ₁ -C ₁₀ alkoxysilylaryl group. The method of claim 9, The polyamic esters are 9,9'-bis (4-aminophenyl) fluorene, 4,4'-oxydianiline and 1,1-bis (4-aminophenyl) -1-phenyl-2,2,2 - diamines and di-C ₁ -C ₆ alkyl-dichloro fatigue selected from ethane-trifluoromethyl trimellitate, and di-C ₁ -C ₆ alkyl-dichloro-oxydiphthalic phthalate and di-C ₁ -C ₆ alkyl-dichloro-biphenyl-carboxylate selected from the group consisting of tetra-di A method comprising an ester diacid halide. (RO) _m (R) _n SiR'- where R and R 'are independently C ₁ -C ₁₀ alkyl or phenyl, R is hydrido or C ₁ -C ₁₀ alkyl or phenyl, m is 1 Or 2 or 3 and the sum of m and n is 3). The method of claim 11, Wherein said ester is terminated with a tri C ₁ -C ₁₀ alkoxysilyl C ₁ -C ₁₀ alkyl group or a tri C ₁ -C ₁₀ alkoxysilylaryl group. An integrated circuit device packaging device, Substrates with electrical conductors for connection to circuit boards Multiple insulating and conductive layers alternately placed on a substrate—one or more of these layers having a coefficient of thermal expansion of less than 1000 × 10 ⁻⁶ and (RO) _m (R) _n SiR′- where R and R ′ are independent And a hydrocarbyl group, R is a hydrido or hydrocarbyl group, m is 1 or 2 or 3 and the sum of m and n is 3). A plurality of vias for electrically interconnecting electrical conductors, conductive layers, and integrated circuit chips. Integrated circuit packaging device for providing signals and current to an integrated circuit chip. The method of claim 13, Wherein the polyamic ester is terminated with a tri C ₁ -C ₁₀ alkoxysilyl C ₁ -C ₁₀ alkyl group or a tri C ₁ -C ₁₀ alkoxysilylaryl group. The method of claim 14, The polyamic esters are 9,9'-bis (4-aminophenyl) fluorene, 4,4'-oxydianiline and 1,1-bis (4-aminophenyl) -1-phenyl-2,2,2 -Trifluoro diamines and di-C ₁ -C ₆ alkyl-dichloro fatigue selected from ethane mellitic teyiteugwa di C ₁ -C ₆ alkyl-dichloro-oxydiphthalic phthalate and di-C ₁ -C ₆ alkyl-dichloro-biphenyl-tetracarboxylic acid diester selected from carboxylate A device comprising a discrete halide.