KR19980023075A - Wafer Etching Method - Google Patents
Wafer Etching Method Download PDFInfo
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- KR19980023075A KR19980023075A KR1019960042493A KR19960042493A KR19980023075A KR 19980023075 A KR19980023075 A KR 19980023075A KR 1019960042493 A KR1019960042493 A KR 1019960042493A KR 19960042493 A KR19960042493 A KR 19960042493A KR 19980023075 A KR19980023075 A KR 19980023075A
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Abstract
반도체 기판에 실리콘 산화막을 형성하고, 상기 기판에 이온을 주입하고, 이온주입된 기판을 열확산시키고, 열확산된 기판을 황산/과산화수소 용액에 5 내지 15분간 침지시켜 상기 산화막을 표면처리하고, 상기 표면처리된 산화막을 감광성 수지로 마스킹하고, 마스킹된 상기 산화막을 이방성 습식 식각하여 제조된 웨이퍼는 감광성 수지 마스크와 산화막의 접착성이 증대되어 과도한 산화막의 측면 식각이 방지될 수 있다.Forming a silicon oxide film on a semiconductor substrate, implanting ions into the substrate, thermally diffusing the ion implanted substrate, and immersing the thermally diffused substrate in a sulfuric acid / hydrogen peroxide solution for 5 to 15 minutes to surface treat the oxide film, and surface treatment. The wafer prepared by masking the oxide film with a photosensitive resin and anisotropic wet etching the masked oxide film may increase adhesion between the photosensitive resin mask and the oxide film, thereby preventing excessive side surface etching of the oxide film.
Description
본 발명은 웨이퍼의 식각 방법에 관한 것으로, 특히 산화막이 도포된 웨이퍼 습식 식각시 이온 주입 및 열확산 공정을 거친 산화막을 황산/과산화수소 용액에 침지한 후에 감광성 수지로 마스킹하여 감광성 수지 마스크와 산화막의 접착성을 증대시킴으로써 이후에 이방성 습식 식각시 산화막의 측면이 과도하게 식각되는 것을 방지하는 웨이퍼 습식 식각 방법에 관한 것이다.The present invention relates to a method of etching a wafer, and in particular, an oxide film is subjected to an ion implantation and a thermal diffusion process during wet etching of an oxide film, and then immersed in a sulfuric acid / hydrogen peroxide solution and then masked with a photosensitive resin to bond the photosensitive resin mask to the oxide film. The present invention relates to a wafer wet etching method for preventing excessive side etching of an oxide layer during anisotropic wet etching.
산화막이 형성된 웨이퍼를 식각하는 종래의 기술은 통상적으로 제1도에 나타낸 바와 같이 기판에 이온을 주입하고 열확산시킨 후 감광성 수지로 마스킹한 다음 산화막을 이방성 습식 식각하는 단계를 포함한다. 그러나, 이러한 방법에 의해 처리된 웨이퍼는 제2도의 측면 식각 정도(24)로부터 알 수 있듯이, 감광성 수지 마스크(21)와 산화막(22) 사이의 접착성이 불량하여 산화막(22)의 과도한 식각이 유발되는 문제점이 있다.Conventional techniques for etching an oxide film-formed wafer typically include implanting ions into a substrate, thermally diffusing, masking with a photosensitive resin and then anisotropic wet etching the oxide film as shown in FIG. However, the wafer processed by this method has poor adhesion between the photosensitive resin mask 21 and the oxide film 22, as can be seen from the side etching degree 24 of FIG. There is a problem that is caused.
이에, 본 발명자들은 상기한 단점을 해결하여 산화막의 과도한 식각을 개선하는 방법을 거듭 연구한 결과, 이온 주입된 기판을 열확산시킨 후, 황산/과산화수소 용액에 일정 시간동안 침전시킨 다음 감광성 수지로 마스킹함으로써 감광성 수지 마스크와 산화막의 접착성이 증대되어 산화막의 식각 불량이 개선됨을 알아 내어 본 발명을 완성하게 되었다.Accordingly, the present inventors have repeatedly studied a method of improving the excessive etching of the oxide film by solving the above disadvantages, and after thermally diffusing the ion-implanted substrate, it is precipitated in a sulfuric acid / hydrogen peroxide solution for a predetermined time and then masked with a photosensitive resin The adhesion between the photosensitive resin mask and the oxide film is increased to find that the etching defect of the oxide film is improved, thereby completing the present invention.
따라서, 본 발명의 목적은 산화막이 도포된 웨이퍼의 산화막 식각시 과도 식각을 개선하기 위한 웨이퍼 습식 식각 방법을 제공하는 것이다.Accordingly, an object of the present invention is to provide a wafer wet etching method for improving overetching during oxide etching of an oxide coated wafer.
상기 목적을 달성하기 위하여, 본 발명에서는 기판에 실리콘 산화막을 형성하고, 상기 기판에 이온을 주입하고, 이온주입된 기판을 열확산시키고, 열확산된 기판을 황산/과산화수소 용액에 5 내지 15분간 침전시켜 산화막을 표면처리하고, 표면처리된 산화막을 감광성 수지로 마스킹하고, 마스킹된 산화막을 이방성 습식 식각하는 단계를 포함하는, 웨이퍼 식각 방법을 제공한다.In order to achieve the above object, in the present invention, a silicon oxide film is formed on a substrate, ions are implanted into the substrate, the ion implanted substrate is thermally diffused, and the thermally diffused substrate is precipitated in a sulfuric acid / hydrogen peroxide solution for 5 to 15 minutes. Surface treatment, masking the surface treated oxide film with a photosensitive resin, and anisotropic wet etching the masked oxide film.
도 1은 종래 기술에 따른 웨이퍼 식각 공정의 개략도이고;1 is a schematic diagram of a wafer etching process according to the prior art;
도 2는 상기 공정에 따른 식각된 웨이퍼의 단면을 나타낸 것이며;2 shows a cross-section of an etched wafer according to the process;
도 3은 본 발명에 따른 웨이퍼 식각 공정의 개략도이고;3 is a schematic diagram of a wafer etching process according to the present invention;
도 4는 본 발명에 따라 식각된 웨이퍼의 단면을 나타낸 것이다.4 shows a cross-section of a wafer etched in accordance with the present invention.
*도면의 주요부호에 대한 설명** Description of the major symbols in the drawings *
21 : 감광성 수지22 : 산화막21 photosensitive resin 22 oxide film
23 : 기판24 : 측면 식각 정도23 substrate 24 side etching degree
44 : 측면식각정도44: side etching degree
본 발명에서는 제3도에 나타낸 바와 같이, 이온주입된 기판을 열확산시킨 다음, 감광성 수지로 마스킹하기 전에 3:1 내지 4:1, 바람직하게는 3:1 황산/과산화수소 용액에 5 내지 15분, 바람직하게는 10분간 침지시켜 산화막 표면 처리를 함으로써 감광성 수지 마스크와 산화막사이의 접착성을 증대시켜 산화막의 과도 식각을 방지할 수 있다. 제4도는 상기와 같은 본 발명의 공정에 따라 식각된 웨이퍼의 단면으로서, 여기에서 보듯이 산화막의 측면 식각 정도가 감소된 것을 알 수 있다.In the present invention, as shown in FIG. 3, 5 to 15 minutes in a 3: 1 to 4: 1, preferably 3: 1 sulfuric acid / hydrogen peroxide solution, before thermally diffusing the ion implanted substrate and then masking with a photosensitive resin, Preferably, by immersing for 10 minutes to perform an oxide film surface treatment, the adhesion between the photosensitive resin mask and the oxide film can be increased to prevent excessive etching of the oxide film. 4 is a cross-sectional view of the wafer etched according to the process of the present invention as described above, it can be seen that the side etching degree of the oxide film is reduced as shown here.
이하, 본 발명을 하기 실시예에 의거하여 보다 구체적으로 설명한다. 단, 이들 실시예는 본 발명을 예시하기 위한 것일 뿐, 본 발명이 이들 만으로 한정되는 것은 아니다.Hereinafter, the present invention will be described in more detail based on the following examples. However, these Examples are only for illustrating the present invention, the present invention is not limited to these.
[실시예]EXAMPLE
반도체 실리콘 기판에 습식 산화 방법으로 6,000Å 두께의 실리콘 산화막을 형성시킨 다음, 감광성 수지로 마스킹하고, 마스킹된 산화막을 B.O.E. 용액으로 식각하였다. 상기 식각된 웨이퍼를 황산/과산화수소 용액에 침지시켜 감광액 수지를 제거한 후 상기 기판에 소자 상호간의 전기적 절연을 위해 아세닉(As) 이온을 주입하였다. 이온주입된 기판을 열확산시키고, 열확산된 기판을 3:1 황산/과산화수소 용액에 10분간 침지시켜 산화막을 표면처리하였다. 표면처리된 산화막을 감광성 수지로 마스킹하고, 마스킹된 산화막을 B.O.E. 용액으로 9분 동안 습식 식각하였다. 수득된 웨이퍼의 산화막 측면 식각 정도는 2㎛였다.A silicon oxide film having a thickness of 6,000 Å was formed on the semiconductor silicon substrate by a wet oxidation method, and then masked with a photosensitive resin, and the masked oxide film was B.O.E. Etched into solution. The etched wafer was immersed in a sulfuric acid / hydrogen peroxide solution to remove the photoresist resin and then implanted ascetic (As) ions into the substrate for electrical insulation between the devices. The ion implanted substrate was thermally diffused, and the thermally diffused substrate was immersed in a 3: 1 sulfuric acid / hydrogen peroxide solution for 10 minutes to surface-treat the oxide film. The surface-treated oxide film was masked with a photosensitive resin, and the masked oxide film was B.O.E. The solution was wet etched for 9 minutes. The oxide film side etching degree of the obtained wafer was 2 micrometers.
[비교예][Comparative Example]
열확산된 기판을 바로 감광성 수지로 마스킹하는 것을 제외하고 실시예와 동일하게 실시하여 산화막이 식각된 웨이퍼를 얻었다. 수득된 웨이퍼의 산화막 측면 식각 정도는 6㎛였다.A wafer having an oxide film etched was obtained in the same manner as in Example, except that the thermally diffused substrate was directly masked with a photosensitive resin. The oxide film side etching degree of the obtained wafer was 6 micrometers.
이상에서와 같이, 반도체 기판상에 산화막을 형성하고 기판에 이온주입 및 열확산한 후 황산/과산화수소 용액에 일정 시간 동안 침지한 다음 감광성 수지로 마스킹하고 이방성 습식 식각하여 제조된 웨이퍼는 산화막의 측면 과도 식각이 방지된다.As described above, a wafer prepared by forming an oxide film on a semiconductor substrate, ion implantation and thermal diffusion into the substrate, and then immersed in a sulfuric acid / hydrogen peroxide solution for a predetermined time, masked with a photosensitive resin, and anisotropic wet etching is used for side etching of the oxide film. This is avoided.
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960042493A KR19980023075A (en) | 1996-09-25 | 1996-09-25 | Wafer Etching Method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960042493A KR19980023075A (en) | 1996-09-25 | 1996-09-25 | Wafer Etching Method |
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| KR19980023075A true KR19980023075A (en) | 1998-07-06 |
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| KR1019960042493A KR19980023075A (en) | 1996-09-25 | 1996-09-25 | Wafer Etching Method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100468667B1 (en) * | 1997-06-17 | 2005-03-16 | 삼성전자주식회사 | Forming of pattern for semiconductor device by photolithographic process |
| WO2010147308A2 (en) | 2009-06-18 | 2010-12-23 | 오스템임플란트 주식회사 | Implant coated with net-shaped or island-shaped low-crystallized hydroxyapatite and method for coating same |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0298133A (en) * | 1988-10-04 | 1990-04-10 | Matsushita Electron Corp | Cleaning method for semiconductor substrate |
| JPH0382127A (en) * | 1989-08-25 | 1991-04-08 | Sony Corp | Selective formation of metallic film |
| JPH06349769A (en) * | 1993-06-08 | 1994-12-22 | Matsushita Electron Corp | Semiconductor device and its manufacture |
| KR100264237B1 (en) * | 1995-11-03 | 2000-09-01 | 윤종용 | Method of forming hole |
-
1996
- 1996-09-25 KR KR1019960042493A patent/KR19980023075A/en active IP Right Grant
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0298133A (en) * | 1988-10-04 | 1990-04-10 | Matsushita Electron Corp | Cleaning method for semiconductor substrate |
| JPH0382127A (en) * | 1989-08-25 | 1991-04-08 | Sony Corp | Selective formation of metallic film |
| JPH06349769A (en) * | 1993-06-08 | 1994-12-22 | Matsushita Electron Corp | Semiconductor device and its manufacture |
| KR100264237B1 (en) * | 1995-11-03 | 2000-09-01 | 윤종용 | Method of forming hole |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100468667B1 (en) * | 1997-06-17 | 2005-03-16 | 삼성전자주식회사 | Forming of pattern for semiconductor device by photolithographic process |
| WO2010147308A2 (en) | 2009-06-18 | 2010-12-23 | 오스템임플란트 주식회사 | Implant coated with net-shaped or island-shaped low-crystallized hydroxyapatite and method for coating same |
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