KR19980011223U - Solder flow prevention structure of circuit board - Google Patents

Solder flow prevention structure of circuit board Download PDF

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Publication number
KR19980011223U
KR19980011223U KR2019960024725U KR19960024725U KR19980011223U KR 19980011223 U KR19980011223 U KR 19980011223U KR 2019960024725 U KR2019960024725 U KR 2019960024725U KR 19960024725 U KR19960024725 U KR 19960024725U KR 19980011223 U KR19980011223 U KR 19980011223U
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KR
South Korea
Prior art keywords
solder
circuit board
pattern
conductor layer
flow
Prior art date
Application number
KR2019960024725U
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Korean (ko)
Inventor
김득수
Original Assignee
조희재
엘지전자부품주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 조희재, 엘지전자부품주식회사 filed Critical 조희재
Priority to KR2019960024725U priority Critical patent/KR19980011223U/en
Publication of KR19980011223U publication Critical patent/KR19980011223U/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3489Composition of fluxes; Methods of application thereof; Other methods of activating the contact surfaces

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

본 고안은 각종 회로선상의 패턴에 전류의 흐름을 원할하게 하기 위한 도체층을 형성함에 있어서 상기 도체층을 납땜하는 과정에서 유발되는 액상의 땜납이 부품단자측으로 유동되는 것을 방지하도록 솔더땜을 가지는 회로기판의 땜납 유동 방지구조에 관한 것으로, 상기 회로기판과, 이 회로기판상에 형성된 소정형상의 패턴과 이 패턴의 경로상에 솔더링된 도체층 및 다수개의 부품단자를 포함하여 구성하는 회로 기판의 땜납 유동 방지구조에 있어서, 상기 회로기판 상에 소정간격으로 배치된 솔더땜이 솔더링 형성된 것이다. 따라서, 납땜 과정시 액상도체의 유동으로 인해 패턴의 범위를 벗어나 부근 부품단자를 손상하는 것을 방지하고, 회로상에 패턴을 따라 균일한 도체층의 형성으로 최대한의 저항감소 효과를 도모할 수 있는 유용한 고안이다.The present invention is a circuit having a solder solder to prevent the flow of the liquid solder caused in the process of soldering the conductor layer to the component terminal in forming a conductor layer for smooth flow of current in the pattern on the various circuit lines It relates to a solder flow prevention structure of a substrate, the circuit board comprising a circuit board, a predetermined shape pattern formed on the circuit board, a conductor layer soldered on the path of the pattern and a plurality of component terminals In the flow preventing structure, solder solder disposed at predetermined intervals on the circuit board is soldered. Therefore, during the soldering process, the liquid conductor is prevented from being damaged due to the flow of the liquid conductor out of the pattern range, and it is useful to achieve the maximum resistance reduction effect by forming a uniform conductor layer along the pattern on the circuit. It is devised.

Description

회로기판의 땜납 유동 방지구조Solder flow prevention structure of circuit board

본 고안은 선간 저항 회로기판의 땜납 유동 방지구조에 관한 것으로, 특히 각종 회로선상의 패턴에 전류의 흐름을 원할하게 하기 위한 도체층을 형성함에 있어서, 상기 도체층을 납땜하는 과정에서 유동성을 가진 액상의 땜납이 유동되는 것을 방지하도록 솔더땜을 가지는 회로기판의 땜납 유동 방지구조에 관한 것이다.The present invention relates to a solder flow prevention structure of a line resistance circuit board, and in particular, in forming a conductor layer for smoothly flowing current in various circuit line patterns, a liquid phase having fluidity in the process of soldering the conductor layer. The present invention relates to a solder flow preventing structure of a circuit board having solder solder to prevent the solder from flowing.

일반적으로 회로선상의 패턴에 흐르는 전류의 저항을 감소하기 위하여 전도율이 높은 도체층을 단자부위와 전류가 인가되는 단자 사이에 납땜하고 있다.In general, in order to reduce the resistance of the current flowing in the pattern on the circuit line, a high conductive layer is soldered between the terminal portion and the terminal to which the current is applied.

도 1을 참조하여 일반적인 회로선상의 구성에 대해서 설명하기로 한다.A configuration on a general circuit line will be described with reference to FIG. 1.

부호 10은 일반적인 전자기기의 기판상에 설치되는 부품을 포함하는 회로이다.Reference numeral 10 is a circuit including a component installed on a substrate of a general electronic device.

상기 회로(10)는 기판(12)과 이 기판(12)상에 소정의 패턴(16)이 형성되고, 이들 패턴(16)의 적당부위에는 다이오드, 저항 및 TR 등의 부품(50)이 실장된다. 상기 부품(50)은 저부에 도체적인 단자(52)를 이용하여 솔더링 방식에 의하여 상기 패턴(16)과 연결된다.In the circuit 10, a predetermined pattern 16 is formed on the substrate 12 and the substrate 12, and components 50 such as diodes, resistors, and TRs are mounted on appropriate portions of the patterns 16. do. The component 50 is connected to the pattern 16 by soldering using a conductive terminal 52 at the bottom.

그러나, 상기 도체층(13)을 납땜(soldering) 형성할 때 가열되어진 액상의 땜납은 그 유동성으로 인해 패턴(16)의 범위를 벗어나 다른 단자부위에 침투하여 손상을 입히거나 다른 부품을 삽입시 제약을 받게 되어 또다른 제거작업을 해야하는 번거로움과 또한 상기 도체층(13)이 부품(50) 부위에 과다하게 뭉쳐서 솔더링 정도(精度)가 나쁘게 된다.However, the liquid solder that is heated when soldering the conductor layer 13 penetrates other terminal portions beyond the range of the pattern 16 due to its fluidity, thereby damaging or inserting other components. The removal and the trouble of another removal work and the conductor layer 13 is excessively agglomerated in the part 50, so that the soldering degree is bad.

다시 설명하면, 종래의 납땜 구조에서는 제품단자(52)에 도체층(13)이 침투형성하여 각 종의 단자를 실장할 때 사용되는 기구물의 삽입에 어려움이 있고 땜납은 용융물이기 때문에 도체층(13)이 상기 부품단자(52) 부위에 과다하게 뭉치게 되어 도 1에 도시한 바와 같이 뭉침부(20)를 유발하게 됨으로써 설계높이(t1) 보다도 낮은 높이(t2)로 납땜이 되어, 결과적으로 선간저항의 감소효과가 현저하게 저하한다.In other words, in the conventional soldering structure, the conductor layer 13 penetrates into the product terminal 52, so that it is difficult to insert a mechanism used when mounting various types of terminals. ) Is excessively agglomerated in the part terminal 52 part and causes the agglomerate part 20 as shown in FIG. 1, thereby soldering at a height t 2 lower than the design height t 1 , resulting in As a result, the effect of reducing the line resistance is significantly reduced.

본 고안은 상기 제반 문제점을 감안하여 안출된 것으로, 회로선상의 도체층을 균일하게 납땜(soldering)함으로써 패턴상의 다른 부품단자를 삽입할 때 용이하게 하고 상기 도체층에 면적과 굴곡에 따라 발생되는 저항증가를 감소시키는데 그 목적이 있다.The present invention has been devised in view of the above problems, and it is easy to insert other component terminals in a pattern by uniformly soldering the conductor layer on a circuit line, and the resistance generated according to the area and bending in the conductor layer. The purpose is to reduce the increase.

도 1은 종래의 회로기판에 부품이 납땜된 일예의 상태를 나타낸 단면도.1 is a cross-sectional view showing an example in which a component is soldered to a conventional circuit board.

도 2은 본 고안의 회로기판에 땜납 유동방지 솔더땜이 형성된 상태를 나타낸 단면도.2 is a cross-sectional view showing a state in which solder flow preventing solder solder is formed on a circuit board of the present invention.

*도면의 주요부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *

10 : 회로11 : 솔더땜10 Circuit 11: Solder Solder

12 : 회로기판13 : 도체층12: circuit board 13: conductor layer

16 : 패턴20 : 뭉침부16: pattern 20: agglomeration

50 : 부품52 : 단자50: part 52: terminal

상기 목적을 달성하기 위한 본 고안에 따른 회로기판의 땜납 유동 방지구조는 기판과 이 기판상에 형성된 소정형상의 패턴과 이 패턴의 경로상에 솔더링된 도체층 및 다수개의 부품단자를 포함하여 구성하는 회로 기판의 땜납 유동 방지구조에 있어서, 상기 기판상에 소정간격으로 배치된 솔더땜이 솔더링된 것을 특징으로 한다.The solder flow prevention structure of the circuit board according to the present invention for achieving the above object comprises a substrate, a predetermined shape pattern formed on the substrate, a conductor layer soldered on the path of the pattern and a plurality of component terminals In the solder flow prevention structure of a circuit board, the soldering solder arrange | positioned at predetermined intervals on the said board | substrate is characterized by soldering.

(실시예)(Example)

이하, 도2를 참조하여 본 고안의 회로기판의 땜납 유동 방지구조에 대하여 자세하게 설명한다.Hereinafter, the solder flow prevention structure of the circuit board of the present invention will be described in detail with reference to FIG.

종래 설명과 같은 부품에 대해서는 설명상의 번잡함을 피하기 위하여 동일 부호를 사용한다.For the same parts as the conventional description, the same reference numerals are used to avoid descriptive troubles.

먼저, 상기 기판(12)상에 솔더땜의 납땜층을 형성한다. 즉 상기 여러개의 제품단자(52') 사이사이에 적당간격으로 소정개수의 솔더땜(11)을 형성하는 것이다.First, a solder layer of solder solder is formed on the substrate 12. That is, a predetermined number of solder solders 11 are formed at appropriate intervals between the plurality of product terminals 52 '.

그후 본격적으로 도체층(13)을 위한 솔더링을 실시하게 되는데, 이때 상기 1차 납땜 형성한 솔더땜(11)에 의하여 융용물인 땜납의 유동이 방지되어 균일한 도체층(13)이 형성된다.Thereafter, the soldering for the conductor layer 13 is performed in earnest. At this time, the flow of the solder, which is a melt, is prevented by the primary solder-forming solder 11, thereby forming a uniform conductor layer 13.

즉, 미리 형성한 솔더땜(11)은 고화되어 나중에 형성되는 도체층(13)과 그 물성(物性)이 다르므로 일시적으로 댐(dam) 역활을 하여 액상의 도체층(13)의 유동을 저지한다.That is, since the previously formed soldering solder 11 is solidified and has a different physical property from the conductor layer 13 formed later, it temporarily acts as a dam to block the flow of the liquid conductor layer 13. do.

따라서, 부품단자(52) 부근으로의 땜납의 뭉침이 적극 방지되어 선간 저항 감소회로(10)의 원래의 설계 목적치 대로 저항값이 얻어져 선간저항 감소효과가 기대될 수 있다.Therefore, agglomeration of the solder near the component terminal 52 is prevented actively, so that the resistance value is obtained according to the original design purpose of the line resistance reduction circuit 10, and the line resistance reduction effect can be expected.

이상 설명한 바와 같이, 본 고안의 회로기판의 땜납 유동 방지구조에 의하면 회로 기판의 패턴에 도체층을 형성할 때 미리 동일 재료인 땜납의 솔더땜을 형성함으로써, 납땜과정시 액상도체의 유동으로 인해 패턴의 범위를 벗어나 부근 부품단자가 손상되는 것을 방지하며 또한 회로상에 패턴을 따라 균일한 도체층의 형성으로 최대한의 저항감소 효과를 도모할 수 있는 유용한 고안이다.As described above, according to the solder flow prevention structure of the circuit board of the present invention, when the conductor layer is formed on the pattern of the circuit board, the solder material of the same material is formed beforehand, so that the pattern is caused by the flow of the liquid conductor during the soldering process. It is a useful design that can prevent the damage to nearby component terminals outside the range of and to achieve the maximum resistance reduction effect by forming a uniform conductor layer along the pattern on the circuit.

Claims (1)

기판과, 이 기판상에 형성된 소정 형상의 패턴과 상기 패턴의 경로상에 솔더링된 도체층 및 다수개의 부품단자를 포함하여 구성하는 회로기판의 땜납 유동 방지구조에 있어서,In the solder flow prevention structure of the circuit board which comprises a board | substrate, the pattern of the predetermined shape formed on this board | substrate, the conductor layer soldered on the said path | route, and a some component terminal, 상기 기판상에 소정간격으로 다수개의 솔더땜이 솔더링된 것을 특징으로 하는 회로기판의 땜납 유동 방지구조.A solder flow preventing structure of a circuit board, characterized in that a plurality of solder solder is soldered on the substrate at a predetermined interval.
KR2019960024725U 1996-08-19 1996-08-19 Solder flow prevention structure of circuit board KR19980011223U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019960024725U KR19980011223U (en) 1996-08-19 1996-08-19 Solder flow prevention structure of circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019960024725U KR19980011223U (en) 1996-08-19 1996-08-19 Solder flow prevention structure of circuit board

Publications (1)

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KR19980011223U true KR19980011223U (en) 1998-05-25

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Application Number Title Priority Date Filing Date
KR2019960024725U KR19980011223U (en) 1996-08-19 1996-08-19 Solder flow prevention structure of circuit board

Country Status (1)

Country Link
KR (1) KR19980011223U (en)

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