KR920004037B1 - Painting method for printed circuit board - Google Patents
Painting method for printed circuit board Download PDFInfo
- Publication number
- KR920004037B1 KR920004037B1 KR1019860003851A KR860003851A KR920004037B1 KR 920004037 B1 KR920004037 B1 KR 920004037B1 KR 1019860003851 A KR1019860003851 A KR 1019860003851A KR 860003851 A KR860003851 A KR 860003851A KR 920004037 B1 KR920004037 B1 KR 920004037B1
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- KR
- South Korea
- Prior art keywords
- pattern
- printed circuit
- circuit board
- lead
- painting
- Prior art date
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
Abstract
Description
제 1 도는 본 발명에 따른 공정도.1 is a process diagram according to the present invention.
제 2 도는 본 발명중 패턴밀집부의 확대도.Figure 2 is an enlarged view of the pattern dense portion of the present invention.
제 3 도는 본 발명에 의한 조립상태도로 (a)는 PCB와 전자소자의 조립전 상태도, (b)는 PCB와 전자소자의 조립후 상태도.3 is an assembly state road according to the present invention (a) is a state diagram before assembly of the PCB and the electronic device, (b) is a state diagram after assembly of the PCB and the electronic device.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 구멍 2-20 : 패턴1: hole 2-20: pattern
4 : 납분리층 5 : PCB판4: lead separation layer 5: PCB board
본 발명은 프린트인쇄된 기판에 전자소자를 연결시킬때 발생하는 쇼트(Short)현상을 방지하기 위한 인쇄회로기판의 페인팅방법에 관한 것이다. 종래에 여러가지 전자소자들을 인소된 회로에 연결시킬때 용융온도와 응고온도가 낮으면서 도전성이 좋은 연납을 사용하게 되었고 상기의 납땜처리과정에 있어 작업자의 숙련정도에 따라서 용융된 납이 근처의 도전체(동박면)으로 흐르는 좋지 못한 경우가 있을뿐만 아니라 이로인해 다른 전자소자의 다리들과 필요없이 도통되거나 또는 쇼트되는 현상이 있었다. 따라서 상기의 납땜처리를 자동으로 수행하는 공정을 선택하게 되었으나 자동납땜공정에서도 용융된 납이 다른 전자소자, 혹은 도전체에 묻는 경우가 있는 것으로 이는 인쇄된 도전체들이 평면상으로 노출되어 납땜위치가 확실하게 구분되지 않는 구조이기 때문에 본 발명에서는 근접한 특히 오밀조밀하게 밀집하여 구성된 도전체 사이가 페인트로서 확실하게 구분되어 도전체와 도전체를 보호하며 용융된 납의 흐름을 페인트로서 저지하여 납땜된 상태를 양호하게 회로기판에 구성하여 회로 및 소자를 보호하고자 한다.The present invention relates to a method of painting a printed circuit board to prevent short phenomenon that occurs when the electronic device is connected to a printed printed board. Conventionally, when connecting various electronic devices to an in-circuit circuit, a solder with good conductivity and low melting temperature and solidification temperature is used. According to the skill of the operator in the soldering process, the molten lead is a nearby conductor. Not only did it flow badly into the copper foil surface, but it also caused unnecessary or short-circuits with the legs of other electronic devices. Therefore, the process of performing the above soldering process is automatically selected, but even in the automatic soldering process, molten lead may be buried in other electronic devices or conductors. In the present invention, since the structure is not clearly distinguished, the adjacent and particularly densely packed conductors are clearly distinguished as paints to protect the conductors and the conductors, and the molten lead flow is prevented as paint to improve the soldered state. In order to protect the circuit and the device by configuring the circuit board.
따라서 본 발명의 공정은 인쇄회로기판의 제작공정중에 행하는 것이 공정수행상 번거럽지 않고 제작이 편리하여 이를 첨부도면을 참고하여 설명하면 다음과 같다. 우선 인쇄회로기판의 제작공정을 제 1 도의 공정도로 살피면 패턴을 그려서 촬영하고 그리고 재차 촬영하여서 패턴을 PCB판이 인쇄하는 제 1 공정을 거친다.Therefore, the process of the present invention is performed in the manufacturing process of the printed circuit board is not cumbersome in the performance of the process, and the production is convenient, as described with reference to the accompanying drawings as follows. First, if the manufacturing process of the printed circuit board is examined by the process diagram of FIG. 1, the pattern is drawn and photographed, and then photographed again to go through the first process of printing the pattern by the PCB board.
상기 패턴을 동박면에 부착하고 부식작업을 행하는 제 2 공정 그리고 제 2 공정에서 공급된 닥아내는 제 3 공정을 거치고 단선, 쇼트, 굴곡, 덧살등의 상태를 검토하는 제 4 공정 및 용융되는 납의 융착성 좋게하기 위하여 패턴의 삽입공 주위에 납을 살짝피복하는 제 5 공정을 거친후 패턴들의 구멍주위를 제외한 모든 면부분에 녹색의 납분리층을 도포하는 제 6 공정과 심볼마크를 인쇄하는 제 7 공정을 거쳐서 여러가지 전자소자를 조립하는 인쇄회로기판이 제작된다.The fourth step of examining the state of disconnection, short, bend, crushing, etc. after the second step of attaching the pattern to the copper foil surface and performing the corrosive work and the third step coming out of the second step, and the melting of lead A sixth step of applying a green lead separation layer to all face portions except the periphery of the patterns after the fifth step of lightly coating lead around the insertion hole of the pattern for good adhesion and the printing of the symbol mark Through a seven-step process, a printed circuit board for assembling various electronic devices is manufactured.
상기의 인쇄회로기판중 패턴들의 인쇄상태를 살피면 패턴사이의 간격이 매우 협소함을 알 수 있다. 그러나 상기의 패턴간격을 넓게 한다면 납땜시에 발생하는 쇼트현상을 방지할 수 있지만 간격이 넓어지면 면적이 확대되므로 면적을 넓히지 않고 패턴의 간격을 넓혀줄 것이 요구된다. 따라서 패턴과 패턴사이를 완전히 격리시키므로서 상기의 패턴사이간격을 넓혀주어야 하는 요건을 충족시켜주고자 한다.Looking at the printing state of the patterns in the printed circuit board it can be seen that the spacing between the patterns is very narrow. However, if the above pattern spacing is widened, short phenomenon occurring during soldering can be prevented, but if the spacing is widened, the area is enlarged, so it is required to widen the pattern spacing without widening the area. Therefore, it is to satisfy the requirement to widen the interval between the patterns while completely separating between the pattern and the pattern.
이러한 패턴과 패턴의 격리작업은 왼쇄회로기판의 제작공정 진행중 녹색의 납분리층 형성공정.This pattern and the isolation of the pattern is the process of forming a green lead separation layer during the manufacturing process of the left circuit board.
즉 제 6 공정후에 격리시켜야 할 장소에만 불연성 페인트를 일정한 높이로 공급하는 페인팅공정을 수행한 다음 제 7 공정을 수행한다. 이와같은 페인팅공정을 좀더 자세히 설명하면 제작하는 인쇄회로에서 페인팅해야할 위치를 선정하여 선정된 위치에서 페인트가 일정한 두께로 공급되게 기구적인 관계를 조절한다.That is, after performing the painting process of supplying the non-flammable paint to a certain height only in the place to be isolated after the sixth process, the seventh process is performed. To explain this painting process in more detail, we select the position to be painted in the printed circuit to manufacture and adjust the mechanical relationship so that the paint is supplied at a predetermined thickness at the selected position.
따라서 제작공정을 거치는 인새회로기판은 제 6 공정후 페인팅공정을 통과할때, 기구적인 구동으로 불연성 페인트가 선정된 패턴부위로 일시에 공급되게 한다.Therefore, the insa circuit board undergoing the manufacturing process causes the non-flammable paint to be temporarily supplied to the selected pattern portion by mechanical driving when passing through the painting process after the sixth process.
그러므로 동박을 부착하여 구멍(1)이 뚫린 PCB판(5)의 패턴(2)과 PCB면에는 납분리층(4)이 형성되는 구성을 이루고 납분리층(4)위에 0.3mm정도 두께의 페인트층(3)이 형성되어 패턴과 패턴사이는 격리되고 패턴(2)의 구멍(1)이 보호되는 구성을 이루게 된다.Therefore, a lead separation layer (4) is formed on the PCB surface (5) of the PCB board (5) through which holes (1) are drilled by attaching copper foil, and a paint having a thickness of about 0.3 mm on the lead separation layer (4) The
상기의 페인팅공정을 납분리층 공정후 행하는 것은 페인트의 화학적성분이 서로 융합되어 페인트의 접착성을 안정시키기 때문이며 납의 성분과는 근본적으로 달라 금속의 융착성을 배치하기 때문인 것이다.The above painting process is performed after the lead separation layer process because the chemical components of the paint are fused to each other to stabilize the adhesion of the paint, and are different from the components of the lead to arrange the adhesion of the metal.
이와같이 인쇄회로의 구멍(1)에 전자소자를 조립하여 납땜작업을 수행하면 용융된 납은 패턴(2)의 구멍(1) 주위로 모이면서 응고된다.In this way, when soldering is performed by assembling the electronic device into the
이때 용융된 납은 페인트의 상부럭에 걸쳐 흘러 다른 곳에 접촉하는 형상이 방지되고 그리고 용융량이 많으면 페이트선단에서 표면장력현상을 일으켜 상기와 같이 넘쳐흐르지 않으므로 회로의 구성을 보호해 줄뿐만 아니라 납땜된 상태가 미관상으로도 좋아진다.At this time, the molten lead is prevented from flowing to the top of the paint to contact the other place, and if the amount of melting is large, the surface tension phenomenon at the tip of the paint does not overflow as described above, so as not only protects the circuit configuration but also soldered state It looks good too.
특히, 납이 페인트내의 공감에서만 응고되어 소자의 견고성정도가 우수해지는 것이다. 이상에서와 같은 본 발명은 제작공정상에 페인팅공정을 거치게 함으로서 조밀한 간격들의 패턴과 패턴이 서로 격리되어 회로의 구조를 보호하게 되며 패턴과 패턴을 격리시키므로 납땜작업에 의한 쇼트현상을 방지할 수 있어서 취급상태에서 발생할 수 있는 불량조건들을 최대한으로 제거할 수 있는 것이어서 생산성이 높아지며 기판자체에 쇼트방지기능을 제공하여 조립작업시에 신뢰성을 주는 것이고 납의 절감효과와 납땜된 상태가 보기좋은 형태로 되는 인쇄회로기판의 페인팅방법에 대한 것이다.In particular, lead solidifies only in the sympathy in the paint, so that the degree of robustness of the device is excellent. As described above, the present invention protects the structure of the circuit by dividing the pattern and the pattern of dense intervals by passing the painting process in the fabrication process, and prevents the short phenomenon due to the soldering operation by separating the pattern and the pattern. As it can eliminate the bad conditions that can occur in handling condition to the maximum, productivity is increased, and short circuit prevention function is provided on the board itself to provide reliability during assembly work, and lead saving effect and soldered state are in good shape. It is about painting a printed circuit board.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019860003851A KR920004037B1 (en) | 1986-05-17 | 1986-05-17 | Painting method for printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019860003851A KR920004037B1 (en) | 1986-05-17 | 1986-05-17 | Painting method for printed circuit board |
Publications (2)
Publication Number | Publication Date |
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KR870011823A KR870011823A (en) | 1987-12-26 |
KR920004037B1 true KR920004037B1 (en) | 1992-05-22 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019860003851A KR920004037B1 (en) | 1986-05-17 | 1986-05-17 | Painting method for printed circuit board |
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KR (1) | KR920004037B1 (en) |
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1986
- 1986-05-17 KR KR1019860003851A patent/KR920004037B1/en not_active IP Right Cessation
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KR870011823A (en) | 1987-12-26 |
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