KR102665541B1 - Display device and method for manufacturing thereof - Google Patents

Abstract

The present invention provides a display device that can prevent cracks occurring at the edge of a substrate from propagating inside. A display device according to an embodiment of the present invention includes a buffer film disposed on a substrate, a thin film transistor disposed on the buffer film, and a protective film covering the thin film transistor. The formation area of the protective film is smaller than the formation area of the buffer film.

Description

Display device and its manufacturing method {DISPLAY DEVICE AND METHOD FOR MANUFACTURING THEREOF}

The present invention relates to a display device and a method of manufacturing the same.

As the information society develops, the demand for display devices for displaying images is increasing in various forms. Accordingly, recently, various display devices such as liquid crystal display (LCD), plasma display panel (PDP), and organic light emitting display (OLED) have been used.

Among display devices, organic light emitting displays are self-luminous and have superior viewing angles and contrast ratios compared to liquid crystal displays (LCDs). They do not require a separate backlight, so they can be lightweight and thin, and have the advantage of low power consumption. . In addition, organic light emitting display devices have the advantage of being capable of driving at low direct current voltages, having a fast response speed, and especially low manufacturing costs.

The organic light emitting display device includes pixels each containing an organic light emitting element, and banks dividing the pixels to define the pixels. The bank can serve as a pixel defining layer. The organic light emitting device includes an anode electrode, a hole transporting layer, an organic light emitting layer, an electron transporting layer, and a cathode electrode. In this case, when a high potential voltage is applied to the anode electrode and a low potential voltage is applied to the cathode electrode, holes and electrons move to the organic light-emitting layer through the hole transport layer and electron transport layer, respectively, and combine with each other in the organic light-emitting layer to emit light.

Organic light emitting devices have the disadvantage of being easily deteriorated by external factors such as external moisture and oxygen. To prevent this, the organic light emitting display device forms an encapsulation film to prevent external moisture and oxygen from penetrating into the organic light emitting device.

1 is a cross-sectional view schematically showing a conventional display device.

Referring to FIG. 1, a conventional display device forms an encapsulation film 30 on a first substrate 10 on which an organic light emitting device 20 is formed. At this time, the encapsulation film 30 includes a first inorganic film 30a, an organic film 30b, and a second inorganic film 30c, thereby preventing oxygen or moisture from penetrating into the organic light emitting layer and the electrode.

The first substrate 10 on which the encapsulation film 30 is formed is bonded to the second substrate 50 by the adhesive layer 40. At this time, when the first substrate 10 is not completely covered by the second substrate 50 as shown in FIG. 1, the edge area E of the first substrate 10 may be exposed to the outside.

The exposed edge area (E) may crack if it receives external shock during subsequent processing or transportation. In particular, since a plurality of inorganic films are stacked on the edge area E of the first substrate 10, cracks are more likely to occur. There is a problem that these cracks can propagate internally, and moisture or oxygen introduced along the propagated cracks causes black spots and black line stains.

The present invention provides a display device that can prevent cracks occurring at the edge of a substrate from propagating inside.

A display device according to an embodiment of the present invention includes a buffer film disposed on a substrate, a thin film transistor disposed on the buffer film, and a protective film covering the thin film transistor. The formation area of the protective film is smaller than the formation area of the buffer film.

A method of manufacturing a display device according to another embodiment of the present invention includes forming a buffer film on the entire surface of the substrate, forming thin film transistors on the buffer film, and forming a protective film covering the thin film transistors. The protective film is characterized by a smaller formation area than the buffer film.

In an embodiment of the present invention, the gate insulating film, interlayer insulating film, and protective film are formed to have a smaller area than the buffer film, so that the gate insulating film, interlayer insulating film, and protective film are not formed in the edge area and the buffer film is exposed. Accordingly, the embodiment of the present invention can prevent cracks from propagating to the gate insulating film, interlayer insulating film, and protective film even if a crack occurs in the buffer film.

Additionally, an embodiment of the present invention forms a groove at a predetermined distance from the edge of the buffer film, thereby preventing cracks generated at the edge of the buffer film from propagating toward the display area.

In addition, an embodiment of the present invention allows a groove to surround the area where the gate insulating film, interlayer insulating film, and protective film are formed, thereby preventing cracks generated at the edges of the buffer film from propagating to the area where the gate insulating film, interlayer insulating film, and protective film are formed.

Additionally, embodiments of the present invention can prevent cracks occurring at the edges of the buffer film from propagating not only in the left and right directions but also in the up and down directions. Accordingly, embodiments of the present invention can prevent moisture and oxygen introduced through cracks from propagating to the organic light emitting device.

1 is a cross-sectional view schematically showing a conventional display device.
Figure 2 is a perspective view showing a display device according to an embodiment of the present invention.
FIG. 3 is a plan view showing the first substrate, source drive IC, flexible film, circuit board, and timing control unit of FIG. 2.
Figure 4 is a plan view schematically showing a first substrate according to the first embodiment of the present invention.
FIG. 5 is a cross-sectional view showing an example of a pixel in the display area of FIG. 4.
FIG. 6 is a cross-sectional view schematically showing a cross section taken along line II-II' shown in FIG. 4.
Figure 7 is a plan view schematically showing the first substrate according to the second embodiment of the present invention.
FIG. 8 is a cross-sectional view schematically showing a cross section taken along line III-III' shown in FIG. 7.
Figure 9 is a flowchart for explaining a method of manufacturing a display device according to the first embodiment of the present invention.
10A to 10G are cross-sectional views for explaining a method of manufacturing a display device according to a first embodiment of the present invention.

The advantages and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms. These embodiments only serve to ensure that the disclosure of the present invention is complete, and those skilled in the art It is provided to fully inform the person of the scope of the invention, and the present invention is only defined by the scope of the claims.

The shape, size, ratio, angle, number, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative and the present invention is not limited to the matters shown. Like reference numerals refer to like elements throughout the specification. Additionally, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description will be omitted.

When 'includes', 'has', 'consists of', etc. mentioned in this specification are used, other parts may be added unless 'only' is used. In cases where a component is expressed in the singular, the plural is included unless specifically stated otherwise.

When interpreting a component, it is interpreted to include the margin of error even if there is no separate explicit description.

In the case of a description of a positional relationship, for example, if the positional relationship of two parts is described as 'on top', 'on the top', 'on the bottom', 'next to', etc., 'immediately' Alternatively, there may be one or more other parts placed between the two parts, unless 'directly' is used.

In the case of a description of a temporal relationship, for example, if a temporal relationship is described as 'after', 'successfully after', 'after', 'before', etc., 'immediately' or 'directly' Unless used, non-consecutive cases may also be included.

Although first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, the first component mentioned below may also be the second component within the technical spirit of the present invention.

“X-axis direction,” “Y-axis direction,” and “Z-axis direction” should not be interpreted as only geometrical relationships in which the relationship between each other is vertical, and should not be interpreted as a wider range within which the configuration of the present invention can function functionally. It can mean having direction.

The term “at least one” should be understood to include all possible combinations from one or more related items. For example, “at least one of the first, second, and third items” means each of the first, second, or third items, as well as two of the first, second, and third items. It can mean a combination of all items that can be presented from more than one.

Each feature of the various embodiments of the present invention can be partially or fully combined or combined with each other, various technological interconnections and operations are possible, and each embodiment may be implemented independently of each other or together in a related relationship. It may be possible.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings.

Figure 2 is a perspective view showing a display device according to an embodiment of the present invention. FIG. 3 is a plan view showing the first substrate, source drive IC, flexible film, circuit board, and timing control unit of FIG. 2. Below, the description focuses on the fact that the display device according to an embodiment of the present invention is an organic light emitting display, but the present invention is not limited thereto. That is, the display device according to an embodiment of the present invention is not only an organic light emitting display device, but also any one of a liquid crystal display device, a field emission display device, and an electrophoresis display device. It can also be implemented as one.

2 and 3, the display device 100 according to an embodiment of the present invention includes a display panel 110, a source drive integrated circuit (hereinafter referred to as “IC”) 180, and a flexible film. It includes 150, a circuit board 160, and a timing control unit 170.

The display panel 110 includes a first substrate 111 and a second substrate 112. The second substrate 112 may be an encapsulation substrate. The first substrate 111 may be a plastic film or a glass substrate. The second substrate 112 may be a plastic film, a glass substrate, or an encapsulation film.

Gate lines, data lines, and pixels are formed on one side of the first substrate 111 facing the second substrate 112. Pixels are provided in an area defined by the intersection structure of gate lines and data lines.

Each of the pixels may include an organic light emitting device including a thin film transistor, a first electrode, an organic light emitting layer, and a second electrode. Each of the pixels uses a thin film transistor to supply a predetermined current to the organic light emitting device according to the data voltage of the data line when a gate signal is input from the gate line. Because of this, the organic light emitting element of each pixel can emit light with a predetermined brightness according to a predetermined current. A description of the structure of each pixel will be described later in conjunction with FIGS. 4 and 5.

The display panel 110 can be divided into a display area (DA) in which pixels are formed to display images, and a non-display area (NDA) in which images are not displayed, as shown in FIG. 3 . Gate lines, data lines, and pixels may be formed in the display area DA. A gate driver and pads may be formed in the non-display area NDA.

The gate driver supplies gate signals to the gate lines according to the gate control signal input from the timing control unit 170. The gate driver may be formed in the non-display area (DA) outside the display area (DA) on one side or both sides of the display panel 110 using a gate driver in panel (GIP) method. Alternatively, the gate driver may be manufactured as a driving chip, mounted on a flexible film, and attached to the non-display area (DA) outside one or both sides of the display area (DA) of the display panel 110 using a TAB (tape automated bonding) method. It may be possible.

The source drive IC 180 receives digital video data and source control signals from the timing control unit 170. The source drive IC 180 converts digital video data into analog data voltages according to the source control signal and supplies them to the data lines. When the source drive IC 180 is manufactured as a driving chip, it may be mounted on the flexible film 150 using a chip on film (COF) or chip on plastic (COP) method.

Pads such as data pads may be formed in the non-display area NDA of the display panel 110. Wires connecting the pads and the source drive IC 180 and wires connecting the pads and the wires of the circuit board 160 may be formed in the flexible film 150. The flexible film 150 is attached to the pads using an anisotropic conducting film, so that the pads and the wiring of the flexible film 150 can be connected.

The circuit board 160 may be attached to the flexible films 150. The circuit board 160 may be equipped with multiple circuits implemented with driving chips. For example, the timing control unit 170 may be mounted on the circuit board 160. The circuit board 160 may be a printed circuit board or a flexible printed circuit board.

The timing control unit 170 receives digital video data and timing signals from an external system board through a cable of the circuit board 160. The timing control unit 170 generates a gate control signal for controlling the operation timing of the gate driver and a source control signal for controlling the source drive ICs 180 based on the timing signal. The timing control unit 170 supplies a gate control signal to the gate driver and a source control signal to the source drive ICs 180.

1st Example

Figure 4 is a plan view schematically showing a first substrate according to the first embodiment of the present invention.

Referring to FIG. 4, the first substrate 111 is divided into a display area (DA) and a non-display area (NDA), and a pad area (PA) where pads are formed may be formed in the non-display area (NDA). . The pad area PA includes a plurality of pads, and the plurality of pads may be electrically connected to wires of the flexible film 150 using an anisotropic conducting film.

Pixels P that display images are formed in the display area DA. Each of the pixels may include an organic light emitting device including a thin film transistor, a first electrode, an organic light emitting layer, and a second electrode. Each of the pixels uses a thin film transistor to supply a predetermined current to the organic light emitting device according to the data voltage of the data line when a gate signal is input from the gate line. Because of this, the organic light emitting element of each pixel can emit light with a predetermined brightness according to a predetermined current.

Hereinafter, the structure of the pixel P of the display area DA according to embodiments of the present invention will be examined in detail with reference to FIG. 5.

FIG. 5 is a cross-sectional view showing an example of a pixel in the display area of FIG. 4.

Referring to FIG. 5 , thin film transistors 210 and capacitors 220 are formed on one side of the first substrate 111 facing the second substrate 112 .

A buffer film 205 may be formed on the first substrate 111 to protect the thin film transistors 210 from moisture penetrating through the first substrate 111, which is vulnerable to moisture penetration. The buffer film 205 is formed on the first substrate 111 to separate the thin film trackistors 210 and capacitors 220 formed in a subsequent process from impurities such as alkali ions flowing out of the first substrate 111. protect This buffer film 205 may be formed of an inorganic film, for example, a silicon oxide film, a silicon nitride film, or a multilayer thereof.

Each of the thin film transistors 210 includes an active layer 211, a gate electrode 212, a source electrode 213, and a drain electrode 214. Although FIG. 5 illustrates that the gate electrodes 212 of the thin film transistors 210 are formed in a top gate manner located on top of the active layer 211, it should be noted that the present invention is not limited thereto. That is, the thin film transistors 210 are of the bottom gate type in which the gate electrode 212 is located at the bottom of the active layer 211, or the gate electrode 212 is located at the top and bottom of the active layer 211. It can be formed as a double gate method located in both.

An active layer 211 is formed on the buffer film 205 of the first substrate 110. The active layer 211 may be formed of a silicon-based semiconductor material or an oxide-based semiconductor material. A light blocking layer may be formed on the first substrate 110 to block external light incident on the active layer 211.

A gate insulating layer 230 may be formed on the active layer 211. The gate insulating layer 230 may be formed of an inorganic layer, for example, a silicon oxide layer, a silicon nitride layer, or a multilayer thereof.

A gate electrode 212 may be formed on the gate insulating film 230. The gate electrode 212 is made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It may be a single layer or a multi-layer made of an alloy, but is not limited thereto.

An interlayer insulating film 240 may be formed on the gate electrode 212. The interlayer insulating film 240 may be formed of an inorganic film, for example, a silicon oxide film, a silicon nitride film, or a multilayer thereof.

A source electrode 213 and a drain electrode 214 may be formed on the interlayer insulating film 240. Each of the source electrode 213 and the drain electrode 214 may be connected to the active layer 211 through contact holes CH1 and CH2 penetrating the gate insulating film 230 and the interlayer insulating film 240. The source electrode 213 and the drain electrode 214 each include molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper ( It may be a single layer or a multi-layer made of any one of (Cu) or an alloy thereof, but is not limited thereto.

Each of the capacitors 220 includes a lower electrode 221 and an upper electrode 222. The lower electrode 221 is formed on the gate insulating film 230 and may be formed of the same material as the gate electrode 212. The upper electrode 222 is formed on the interlayer insulating film 240 and may be formed of the same material as the source electrode 223 and the drain electrode 224.

A protective film 250 may be formed on the thin film transistor 210 and the capacitor 220. The protective film 250 may serve as an insulating film. The protective film 250 may be formed of an inorganic film, for example, a silicon oxide film, a silicon nitride film, or a multilayer thereof.

A planarization film 260 may be formed on the protective film 250 to flatten the step caused by the thin film transistor 210 and the capacitor 220. The planarization film 260 may be formed of an organic film such as acryl resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. there is.

An organic light emitting device 280 and a bank 284 are formed on the planarization film 260. The organic light emitting device 280 includes a first electrode 282, an organic light emitting layer 283, and a second electrode 281. The first electrode 282 may be a cathode electrode, and the second electrode 281 may be an anode electrode. The area where the first electrode 282, the organic light emitting layer 283, and the second electrode 281 are stacked may be defined as the light emitting area (EA).

The second electrode 281 may be formed on the planarization film 260 . The second electrode 281 is connected to the drain electrode 214 of the thin film transistor 210 through a contact hole (CH3) penetrating the protective film 250 and the planarization film 260. The second electrode 281 has a stacked structure of aluminum and titanium (Ti/Al/Ti), a stacked structure of aluminum and ITO (ITO/Al/ITO), an APC alloy, and a stacked structure of APC alloy and ITO (ITO/APC /ITO) can be made of a highly reflective metal material. APC alloy is an alloy of silver (Ag), palladium (Pd), and copper (Cu).

The bank 284 may be formed to cover the edge of the second electrode 281 on the planarization film 260 to partition the light emitting units EA. The bank 284 may be formed of an organic film such as acryl resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. .

An organic light emitting layer 283 is formed on the second electrode 281 and the bank 284. The organic light emitting layer 283 may include a hole transporting layer, at least one light emitting layer, and an electron transporting layer. In this case, when voltage is applied to the second electrode 281 and the first electrode 282, holes and electrons move to the light-emitting layer through the hole transport layer and the electron transport layer, respectively, and combine with each other in the light-emitting layer to emit light.

The organic light-emitting layer 283 may be made of a white light-emitting layer that emits white light. In this case, it may be formed to cover the second electrode 281 and the bank 284. In this case, a color filter (not shown) may be formed on the second substrate 112.

Alternatively, the organic light-emitting layer 283 may be made of a red light-emitting layer that emits red light, a green light-emitting layer that emits green light, or a blue light-emitting layer that emits blue light. In this case, the organic light emitting layer 283 may be formed in an area corresponding to the second electrode 281, and the color filter may not be formed on the second substrate 112.

The first electrode 282 is formed on the organic light emitting layer 283. When the organic light emitting display device is formed with a top emission structure, the first electrode 282 is made of a transparent conductive material (TCO) such as ITO or IZO that can transmit light, or magnesium (Mg). ), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). A capping layer may be formed on the first electrode 282.

An encapsulation film 290 is formed on the organic light emitting device 280. The encapsulation film 290 serves to prevent oxygen or moisture from penetrating into the organic light emitting layer 283 and the first electrode 282. To this end, the encapsulation film 290 may include at least one inorganic film and at least one organic film.

For example, the encapsulation film 290 may include a first inorganic film 291, a first organic film 292, and a second inorganic film 293. In this case, the first inorganic film 291 is formed to cover the first electrode 282. The first organic layer 292 is formed on the first inorganic layer 291. The first organic layer 292 is preferably formed with a sufficient thickness to prevent particles from penetrating the first inorganic layer 291 and being introduced into the organic light-emitting layer 283 and the first electrode 282. . The second inorganic layer 293 is formed to cover the first organic layer 292.

Although not shown in the drawing, first to third color filters (not shown) and a black matrix (not shown) may be formed on the encapsulation film 290. A red color filter may be formed in the red light-emitting part, a blue color filter may be formed in the blue light-emitting part, and a green color filter may be formed in the green light-emitting part.

The encapsulation film 290 of the first substrate 111 and the color filters (not shown) of the second substrate 112 are bonded using an adhesive layer, thereby forming a bond between the first substrate 111 and the second substrate 112. can be cemented. The adhesive layer may be a transparent adhesive resin.

Referring again to FIG. 4 , the first substrate 111 may include a first inorganic film formation area (IA1) and a second inorganic film formation area (IA2).

The first inorganic film formation area IA1 is an area where the buffer film 205 is formed and may include the entire surface of the first substrate 111 . The second inorganic film formation area IA2 is an area where at least one of the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 is formed, and the display area DA and It is formed to include a pad area (PA). This second inorganic film formation area (IA2) has a smaller area than the first inorganic film formation area (IA1).

Hereinafter, the formation areas of the buffer film 205, the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 according to the first embodiment of the present invention will be examined in more detail with reference to FIG. 6.

FIG. 6 is a cross-sectional view schematically showing a cross section along line II-II' shown in FIG. 4.

Referring to FIG. 6, the display device includes a buffer film 205, a gate insulating film 230, an interlayer insulating film 240, a protective film 250, an encapsulation film 290, and a dam 295 formed on the first substrate 111. ) includes. At this time, the first substrate 111 is divided into a display area DA where pixels P are formed, and a non-display area NDA surrounding the display area DA.

The buffer film 205 is formed on the first substrate 111 to protect the thin film trackistors 210 and capacitors 220 formed in a subsequent process from impurities such as alkali ions flowing out of the first substrate 111. do. The buffer film 205 may be formed of an inorganic film, for example, a silicon oxide film, a silicon nitride film, or a multilayer thereof. This buffer film 205 may be formed on the entire surface of the first substrate 111, including the display area DA as well as the non-display area NDA.

The gate insulating layer 230 is disposed on the active layer 211 and is formed to cover the display area DA. The gate insulating layer 230 may be formed of an inorganic layer, for example, a silicon oxide layer, a silicon nitride layer, or a multilayer thereof. This gate insulating layer 230 is formed to have a smaller area than the first inorganic layer formation area IA1 where the buffer layer 205 is formed. Accordingly, the gate insulating film 230 is not formed in the edge area of the first substrate 111 and the buffer film 205 is exposed, thereby generating a step.

The interlayer insulating film 240 is disposed on the gate electrode 212 and is formed to cover the display area DA. The interlayer insulating film 240 may be formed of an inorganic film, for example, a silicon oxide film, a silicon nitride film, or a multilayer thereof. This interlayer insulating film 240 is formed to have a smaller area than the first inorganic film formation area IA1 where the buffer film 205 is formed. Accordingly, the interlayer insulating film 240 is not formed in the edge area of the first substrate 111 and the buffer film 205 is exposed, thereby generating a step.

The protective film 250 is disposed on the thin film transistor 210 and the capacitor 220 and is formed to cover the display area DA. The protective film 250 may be formed of an inorganic film, for example, a silicon oxide film, a silicon nitride film, or a multilayer thereof. This protective film 250 is formed to have a smaller area than the first inorganic film formation area IA1 where the buffer film 205 is formed. Accordingly, the protective film 250 is not formed in the edge area of the first substrate 111 and the buffer film 205 is exposed, resulting in a step.

The gate insulating film 230, the interlayer insulating film 240, and the protective film 250 may be formed to have the same area as shown in FIG. 6. The gate insulating film 230, the interlayer insulating film 240, and the protective film 250 are sequentially stacked on the buffer film 205 and then etched using a dry etching method, for example, spatter etching or plasma etching. ) can be formed by en masse etching using the method. In this case, the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 may be formed to have the same area.

However, in this embodiment, the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 do not necessarily need to be formed to have the same area as long as they are formed to have an area smaller than the first inorganic film formation area IA1.

The gate insulating layer 230, the interlayer insulating layer 240, and the protective layer 250 may have different areas. For example, the protective film 250 may be formed to have a smaller area than the interlayer insulating film 240. The interlayer insulating film 240 may be formed to have a smaller area than the gate insulating film 230. Accordingly, the gate insulating film 230 may be exposed without the interlayer insulating film 240 being formed in the edge area. The interlayer insulating film 240 may be exposed without the protective film 250 being formed at the edge area.

For another example, the protective film 250 may have a larger area than the gate insulating film 230 and the interlayer insulating film 240. The gate insulating film 230 and the interlayer insulating film 240 may be formed to have the same area, and the protective film 250 may be formed to cover the gate insulating film 230 and the interlayer insulating film 240. Accordingly, the gate insulating film 230 and the interlayer insulating film 240 may not be exposed.

In an embodiment of the present invention, the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 are formed to have an area smaller than the buffer film 205, so that the gate insulating film 230 and the interlayer insulating film 240 are formed in the edge region. And the protective film 250 is not formed and the buffer film 205 is exposed. Accordingly, the embodiment of the present invention can prevent cracks from propagating to the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 even if cracks occur in the buffer film 205.

To be more specific, cracks easily occur in the buffer film 205 made of an inorganic film in the display device. In particular, cracks occur in the edge area of the buffer film 205 that is vulnerable to external shock. If a crack occurs in the buffer film 205, the crack may propagate not only in the left and right directions but also in the up and down directions. However, in the embodiment of the present invention, since the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 are not formed on the buffer film 205 in the edge area where cracks easily occur, the buffer film 205 Propagation of generated cracks to the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 can be prevented.

The encapsulation film 290 is formed to cover the organic light emitting device 280 formed in the display area DA and prevents oxygen or moisture from penetrating into the organic light emitting device 280. At this time, the encapsulation film 290 includes at least one inorganic film and at least one organic film. For example, the encapsulation film 290 may include a first inorganic film 291, an organic film 292, and a second inorganic film 293. In this case, the first inorganic film 291 is formed to cover the first electrode 282. The organic layer 292 is formed on the first inorganic layer 291, and the second inorganic layer 293 is formed to cover the organic layer 292. At this time, the second inorganic film 293 may be formed to cover the dam 295.

Each of the first and second inorganic layers 291 and 293 may be formed of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide. The first and second inorganic layers 291 and 293 may be deposited using a CVD (Chemical Vapor Deposition) technique or an ALD (Atomic Layer Deposition) technique, but are not limited thereto.

The organic layer 292 may be transparent to allow light emitted from the organic emission layer 283 to pass through. The organic film 292 is made of an organic material that can pass more than 99% of the light emitted from the organic light-emitting layer 283, such as acrylic resin, epoxy resin, phenolic resin, and polyamide. It may be formed of polyamide resin or polyimide resin. The organic film 292 may be formed using vapor deposition, printing, or slit coating techniques using organic materials, but is not limited thereto. The organic film 292 may be formed using an inkjet (ink-jet) technique. It can also be formed by the jet process.

The dam 295 is formed to surround the outside of the display area DA and blocks the flow of the organic layer 292 constituting the encapsulation layer 290. The dam 295 is disposed between the display area DA and the pad area PA to prevent the flow of the organic film 292 constituting the encapsulation film 290 from invading the pad area PA. Block. Through this, the dam 120 can prevent the organic layer 292 from being exposed to the outside of the display device or from invading the pad area PA.

This dam 295 is preferably formed outside the area where the organic light emitting device 280 is formed so that the organic film 292 can sufficiently cover the organic light emitting device 280 formed on the first substrate 111. In addition, the dam 295 is a planarization film so that components such as the planarization film 260 and the bank 284, which are made of organic materials vulnerable to the external environment, are sufficiently covered by the first and second inorganic films 291 and 293. It is preferable that 260 and bank 284 are formed outside the formed area.

At this time, the dam 295 may be formed on the protective film 250 as shown in FIG. 6. In this case, the first and second inorganic films 291 and 293 are formed to cover the dam 295, so the ends are formed on the protective film 250 or the buffer film ( 205). In order to prevent cracks generated in the buffer film 205 or cracks generated at the edges of the protective film 250 from propagating to the first and second inorganic films 291 and 293, the first and second inorganic films 291, 293), it is desirable to form the ends on the protective film 250 so as not to cover the protective film 250.

Meanwhile, the dam 295 may be formed simultaneously with the planarization film 260 or the bank 284 of the pixel P, and may be made of the same material as the planarization film 260 or the bank 284. In this case, the dam 295 is made of organic materials such as acryl resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin. can be formed.

2nd Example

Figure 7 is a plan view schematically showing a first substrate according to a second embodiment of the present invention.

The first substrate shown in FIG. 7 is different from the first substrate shown in FIGS. 4 to 6 in that it further includes grooves 310. Hereinafter, the same content as in FIGS. 4 to 6 will be omitted.

Referring to FIG. 7, the first substrate 111 is divided into a display area (DA) and a non-display area (NDA), and a pad area (PA) where pads are formed may be formed in the non-display area (NDA). . The pad area PA includes a plurality of pads, and the plurality of pads may be electrically connected to wires of the flexible film 150 using an anisotropic conducting film.

Meanwhile, the first substrate 111 may include a first inorganic film formation area (IA1) and a second inorganic film formation area (IA2).

The first inorganic film formation area IA1 is an area where the buffer film 205 is formed and may include the entire surface of the first substrate 111 . The second inorganic film formation area IA2 is an area where at least one of the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 is formed, and the display area DA and It is formed to include a pad area (PA). This second inorganic film formation area (IA2) has a smaller area than the first inorganic film formation area (IA1).

A groove 310 is formed in the first inorganic film formation area IA1 so as not to overlap the second inorganic film formation area IA2. The groove 310 may be formed outside the second inorganic film formation area IA2 to surround the second inorganic film formation area IA2.

Hereinafter, with reference to FIG. 8, the formation area of the buffer film 205, the gate insulating film 230, the interlayer insulating film 240, the protective film 250, and the groove 310 according to the second embodiment of the present invention will be examined in more detail. see.

FIG. 8 is a cross-sectional view schematically showing a cross section taken along line III-III' shown in FIG. 7.

Referring to FIG. 8, the display device includes a buffer film 205, a gate insulating film 230, an interlayer insulating film 240, a protective film 250, an encapsulation film 290, and a dam 295 formed on the first substrate 111. ) and groove 310. At this time, the first substrate 111 is divided into a display area DA where pixels P are formed, and a non-display area NDA surrounding the display area DA.

The buffer film 205 is formed on the first substrate 111. The buffer film 205 may be formed of an inorganic film, for example, a silicon oxide film, a silicon nitride film, or a multilayer thereof. This buffer film 205 may be formed on the entire surface of the first substrate 111, including the display area DA as well as the non-display area NDA.

The gate insulating layer 230 is disposed on the active layer 211 and is formed to cover the display area DA. The gate insulating layer 230 may be formed of an inorganic layer, for example, a silicon oxide layer, a silicon nitride layer, or a multilayer thereof. This gate insulating layer 230 is formed to have a smaller area than the first inorganic layer formation area IA1 where the buffer layer 205 is formed. Accordingly, the gate insulating film 230 is not formed in the edge area of the first substrate 111 and the buffer film 205 is exposed, thereby generating a step.

The interlayer insulating film 240 is disposed on the gate electrode 212 and is formed to cover the display area DA. The interlayer insulating film 240 may be formed of an inorganic film, for example, a silicon oxide film, a silicon nitride film, or a multilayer thereof. This interlayer insulating film 240 is formed to have a smaller area than the first inorganic film formation area IA1 where the buffer film 205 is formed. Accordingly, the interlayer insulating film 240 is not formed in the edge area of the first substrate 111 and the buffer film 205 is exposed, thereby generating a step.

The protective film 250 is disposed on the thin film transistor 210 and the capacitor 220 and is formed to cover the display area DA. The protective film 250 may be formed of an inorganic film, for example, a silicon oxide film, a silicon nitride film, or a multilayer thereof. This protective film 250 is formed to have a smaller area than the first inorganic film formation area IA1 where the buffer film 205 is formed. Accordingly, the protective film 250 is not formed in the edge area of the first substrate 111 and the buffer film 205 is exposed, resulting in a step.

The gate insulating film 230, the interlayer insulating film 240, and the protective film 250 may be formed to have the same area as shown in FIG. 6, but are not limited to this. In another embodiment, the gate insulating layer 230, the interlayer insulating layer 240, and the protective layer 250 may have different areas.

In an embodiment of the present invention, the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 are formed to have an area smaller than the buffer film 205, so that the gate insulating film 230 and the interlayer insulating film 240 are formed in the edge region. And the protective film 250 is not formed and the buffer film 205 is exposed. Accordingly, the embodiment of the present invention can prevent cracks from propagating to the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 even if cracks occur in the buffer film 205.

To be more specific, cracks easily occur in the buffer film 205 made of an inorganic film in the display device. In particular, cracks occur in the edge area of the buffer film 205 that is vulnerable to external shock. If a crack occurs in the buffer film 205, the crack may propagate not only in the left and right directions but also in the up and down directions. However, in the embodiment of the present invention, since the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 are not formed on the buffer film 205 in the edge area where cracks easily occur, the buffer film 205 It is possible to prevent the generated crack from propagating to the gate insulating film 230, the interlayer insulating film 240, and the protective film 250.

The groove 310 is formed in the buffer layer 205 in which the gate insulating layer 230, the interlayer insulating layer 240, and the protective layer 250 are not formed. More specifically, the first inorganic film formation area IA1 where the buffer film 205 is formed has an area overlapping with the second inorganic film formation area IA2 and an area not overlapping with the second inorganic film formation area IA2. Includes. The groove 310 is disposed in an area that does not overlap the second inorganic film formation area IA2. That is, the groove 310 is disposed between the edge of the first substrate 111 and the edges of each of the gate insulating film 230, the interlayer insulating film 240, and the protective film 250.

This groove 310 is formed in the buffer layer 205 that is exposed without the gate insulating layer 230, interlayer insulating layer 240, and protective layer 250, thereby exposing the first substrate 111. Accordingly, since the buffer film 205 according to this embodiment has a shape that is broken from the edge in the direction of the display area DA, it is possible to prevent cracks generated at the edge from propagating in the direction of the display area DA.

Meanwhile, the groove 310 is formed to surround the second inorganic film formation area IA2. Accordingly, the groove 310 can prevent cracks generated at the edge of the buffer film 205 from propagating to the second inorganic film formation area IA2.

Meanwhile, Figures 7 and 8 show that there is only one groove 310, but the present invention is not limited thereto. In another embodiment, there may be a plurality of grooves 310.

The encapsulation film 290 is formed to cover the organic light emitting device 280 formed in the display area DA and prevents oxygen or moisture from penetrating into the organic light emitting device 280. At this time, the encapsulation film 290 includes at least one inorganic film and at least one organic film. For example, the encapsulation film 290 may include a first inorganic film 291, an organic film 292, and a second inorganic film 293. In this case, the first inorganic film 291 is formed to cover the first electrode 282. The organic layer 292 is formed on the first inorganic layer 291, and the second inorganic layer 293 is formed to cover the organic layer 292. At this time, the second inorganic film 293 may be formed to cover the dam 295.

Meanwhile, the first and second inorganic layers 291 and 293 may be formed so as not to overlap the groove 310 formed in the buffer layer 205. Accordingly, cracks occurring at the edges of the buffer film 205 can be prevented from propagating to the first and second inorganic films 291 and 293.

The dam 295 is formed to surround the outside of the display area DA and blocks the flow of the organic layer 292 constituting the encapsulation layer 290. The dam 295 is disposed between the display area DA and the pad area PA to prevent the flow of the organic film 292 constituting the encapsulation film 290 from invading the pad area PA. Block. Through this, the dam 120 can prevent the organic layer 292 from being exposed to the outside of the display device or from invading the pad area PA.

This dam 295 is preferably formed outside the area where the organic light emitting device 280 is formed so that the organic film 292 can sufficiently cover the organic light emitting device 280 formed on the first substrate 111. In addition, the dam 295 is a planarization film so that components such as the planarization film 260 and the bank 284, which are made of organic materials vulnerable to the external environment, are sufficiently covered by the first and second inorganic films 291 and 293. It is preferable that 260 and bank 284 are formed outside the formed area.

At this time, the dam 295 may be formed on the protective film 250. In this case, the first and second inorganic films 291 and 293 are formed to cover the dam 295, so the ends are formed on the protective film 250, or the protective film 250 is not formed and the exposed buffer film ( 205), and when formed on the buffer film 205, it can be disposed between the protective film 250 and the groove 310. In order to prevent cracks generated in the buffer film 205 or cracks generated at the edges of the protective film 250 from propagating to the first and second inorganic films 291 and 293, the first and second inorganic films 291, 293), it is desirable to form the ends on the protective film 250 so as not to cover the protective film 250.

Meanwhile, the dam 295 may be formed simultaneously with the planarization film 260 or the bank 284 of the pixel P, and may be made of the same material as the planarization film 260 or the bank 284. In this case, the dam 295 is made of organic materials such as acryl resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin. can be formed.

FIG. 9 is a flowchart for explaining the manufacturing method of the display device according to the first embodiment of the present invention, and FIGS. 10A to 10G are cross-sectional views for explaining the manufacturing method for the display device according to the first embodiment of the present invention. .

First, a buffer film 205 is formed on the first substrate 111 (S901). Specifically, a buffer film 205 is formed on the entire surface of the first substrate 111 as shown in FIG. 10A. The buffer film 205 may be formed of an inorganic film, for example, a silicon oxide film, a silicon nitride film, or a multilayer thereof.

Next, at least one groove 310 is formed in the buffer film 205 (S902). Specifically, as shown in FIG. 10B, at least one groove 310 is formed at a predetermined distance from the edge of the buffer film 205. At this time, the groove 310 may be formed by etching the first substrate 111 using a dry etching method, for example, a spatter etching method or a plasma etching method.

Next, the thin film transistor 210 and the capacitor 220 are formed on the buffer film 205, and a protective film 250 is formed to cover the thin film transistor 210 and the capacitor 220 (S903).

As shown in FIG. 10C, a thin film transistor 210 and a capacitor 220 are formed on the buffer film 205. Specifically, the active layer 211 is formed on the buffer film 205. The active layer 211 may be formed of a silicon-based semiconductor material or an oxide-based semiconductor material.

Then, a gate insulating film 230 is formed on the active layer 211. At this time, the gate insulating layer 230 may be formed to have the same area as the buffer layer 205. The gate insulating layer 230 may be formed of an inorganic layer, for example, a silicon oxide layer, a silicon nitride layer, or a multilayer thereof.

Then, the gate electrode 212 and the lower electrode 221 of the capacitor 220 are formed on the gate insulating film 230. The gate electrode 212 and the lower electrode 221 are made of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). ) may be a single layer or a multi-layer made of any one of these or an alloy thereof, but is not limited thereto.

Then, an interlayer insulating film 240 is formed on the gate electrode 212 and the lower electrode 221. At this time, the interlayer insulating film 240 may be formed to have the same area as the buffer film 205. The interlayer insulating film 240 may be formed of an inorganic film, for example, a silicon oxide film, a silicon nitride film, or a multilayer thereof.

Then, contact holes CH1 and CH2 are formed through the gate insulating film 230 and the interlayer insulating film 240 to expose the active layer 212.

Then, the source electrode 213, the drain electrode 214, and the upper electrode 222 of the capacitor 220 are formed on the interlayer insulating film 240. The source electrode 213, drain electrode 214, and upper electrode 222 are each made of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium. It may be a single layer or a multilayer made of either (Nd) and copper (Cu) or an alloy thereof, but is not limited thereto.

Then, a protective film 250 is formed on the thin film transistor 210 and the capacitor 220. The protective film 250 may serve as an insulating film. At this time, the protective film 250 may be formed to have the same area as the buffer film 205. The protective film 250 may be formed of an inorganic film, for example, a silicon oxide film, a silicon nitride film, or a multilayer thereof.

Next, parts of the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 are removed (S904).

Specifically, as shown in FIG. 10D, portions of the gate insulating film 230, the interlayer insulating film 240, and the protective film 250 are removed by etching so that the groove 310 formed in the buffer film 205 is exposed. The gate insulating film 230, the interlayer insulating film 240, and the protective film 250 may be formed by collectively etching using a dry etching method, for example, a spatter etching method or a plasma etching method. there is.

Next, the organic light emitting device 280 and the dam 295 are formed on the protective film 250 (S905).

As shown in FIG. 10E, the organic light emitting device 280 and the dam 295 are formed on the protective film 250. Specifically, a planarization film 260 and a dam 295 are formed on the protective film 250. At this time, the planarization film 260 and the dam 120 are formed to have a predetermined distance. The planarization film 260 and the dam 120 are each made of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc. It can be formed as an organic film.

According to one embodiment, the dam 120 is described as being formed simultaneously with the planarization film 260. However, according to another embodiment, the dam 120 may be formed simultaneously with the bank 284 to be formed later. .

Then, a contact hole (CH3) is formed through the protective film 250 and the planarization film 260 to expose the source or drain electrode 224 of the thin film transistor 210, and the second electrode 281 is formed. . The second electrode 281 has a stacked structure of aluminum and titanium (Ti/Al/Ti), a stacked structure of aluminum and ITO (ITO/Al/ITO), an APC alloy, and a stacked structure of APC alloy and ITO (ITO/APC /ITO) can be made of a highly reflective metal material. APC alloy is an alloy of silver (Ag), palladium (Pd), and copper (Cu).

Then, a bank 284 is formed to cover the edge of the second electrode 281 on the planarization film 260 to partition the light emitting portions EA. The bank 284 may be formed of an organic film such as acryl resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. .

Then, an organic light emitting layer 283 is formed on the second electrode 281 and the bank 284. Then, the first electrode 282 is formed on the organic light emitting layer 283. The first electrode 282 is made of a transparent metal material (TCO, Transparent Conductive Material) such as ITO or IZO that can transmit light, or magnesium (Mg), silver (Ag), or magnesium (Mg) and silver (Ag). It can be formed of a semi-transmissive conductive material such as an alloy. A capping layer may be formed on the first electrode 282.

Next, an encapsulation film 290 is formed to cover the organic light emitting device 280 (S906).

An encapsulation film 290 is formed as shown in Figure 10f. Specifically, the first inorganic layer 291 is formed to cover the organic light emitting device 280. At this time, the first inorganic layer 291 is formed in an area excluding the area where the mask 140 is disposed using a CVD technique or an ALD technique. The first inorganic layer 291 may be formed of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide.

Then, an organic layer 292 is formed so as to cover the first inorganic layer 291 and not cover the dam 295 at the same time. The organic film 292 is made of an organic material that can pass more than 99% of the light emitted from the organic light-emitting layer 282, such as acrylic resin, epoxy resin, phenolic resin, and polyamide. It may be formed of polyamide resin or polyimide resin.

Then, a second inorganic layer 292 is formed to cover the organic layer 292 and the dam 295. The second inorganic layer 292 may be formed of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide.

Next, the first substrate 111 and the second substrate 112 are bonded (S907). As shown in Figure 10g, the first substrate 111 on which the organic light emitting device 280 and the encapsulation film 290 are formed is bonded to the second substrate 112 by the adhesive layer 320.

Although embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments, and various modifications may be made without departing from the technical spirit of the present invention. . Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but are for illustrative purposes, and the scope of the technical idea of the present invention is not limited by these embodiments. Therefore, the embodiments described above should be understood in all respects as illustrative and not restrictive. The scope of protection of the present invention should be interpreted in accordance with the claims, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of rights of the present invention.

100: display device 110: display panel
111: first substrate 112: second substrate
140: Second groove 150: Flexible film
160: circuit board 170: timing control unit
180: source drive IC 205: buffer film
210: thin film transistor 211: active layer
212: gate electrode 213: source electrode
214: drain electrode 220: capacitor
221: lower electrode 222: upper electrode
230: gate insulating film 240: interlayer insulating film
250: protective film 260: flattening film
280: Organic light emitting device 281: First electrode
282: organic light emitting layer 283: second electrode
284: Bank 290: Encapsulation membrane
291: first inorganic layer 292: organic layer
293: second inorganic membrane 295: dam
310: Home

Claims (12)

A buffer film disposed on the substrate and formed of an inorganic film;
a thin film transistor disposed on the buffer film;
a protective film covering the thin film transistor and formed of an inorganic film; and
Comprising an organic light emitting element disposed on the protective film,
The formation area of the protective film is smaller than the formation area of the buffer film.
The display device wherein the buffer layer forms at least one groove between an edge of the substrate and an edge of the protective layer. delete According to paragraph 1,
A display device, wherein the at least one groove is formed to surround the protective film. According to paragraph 1,
The display device, wherein the at least one groove exposes the substrate. According to paragraph 1,
A display device covering the organic light emitting element and further comprising an encapsulation film including at least one inorganic film. According to clause 5,
The display device wherein the encapsulation film does not overlap the at least one groove. According to clause 5,
A display device, wherein an end of the encapsulation film is disposed on the protective film. According to clause 5,
A display device wherein an end of the encapsulation film is disposed between the protective film and the at least one groove. According to paragraph 1,
The thin film transistor is,
an active layer disposed on the buffer film;
a gate insulating layer disposed on the active layer;
a gate electrode disposed on the gate insulating film;
an interlayer insulating film disposed on the gate electrode; and
Comprising a source electrode and a drain electrode disposed on the interlayer insulating film,
A display device, wherein a formation area of each of the gate insulating film and the interlayer insulating film is smaller than a formation area of the buffer film. Forming a buffer film on the entire surface of the substrate;
forming thin film transistors on the buffer film; and
Forming a protective film covering the thin film transistors,
A method of manufacturing a display device, wherein the protective film has a smaller formation area than the buffer film and forms at least one hole at a predetermined distance from an edge. delete The method of claim 10, wherein forming the protective film comprises:
Forming the protective film to have the same area as the buffer film; and
A method of manufacturing a display device comprising etching and removing a portion of the protective film to expose the at least one groove.

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